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authorWade Farnsworth <wfarnsworth@mvista.com>2007-06-04 16:24:47 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-06-29 02:58:19 -0400
commitdfac6faf8f42d5a9dd6919d7a2a41ef91eb77b4f (patch)
treefb2ccf0cc20f7504bd5e7f1f6d585dcb2214c160 /arch/powerpc
parentbf7c036fb48a6176635f2e7b749d7398728d4b7d (diff)
[POWERPC] 86xx: Add uli1575 pci-bridge sector to MPC8641HPCN dts file.
This adds device nodes for the PCI bridges as well as the ISA devices on the newer revision MPC8641HPCN. It also adds the PCI ranges to the soc node so that address translation for the ISA devices works properly. Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts97
1 files changed, 84 insertions, 13 deletions
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 748f7b90f5db..393cfdf92ff5 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -56,8 +56,12 @@
56 #size-cells = <1>; 56 #size-cells = <1>;
57 #interrupt-cells = <2>; 57 #interrupt-cells = <2>;
58 device_type = "soc"; 58 device_type = "soc";
59 ranges = <0 f8000000 00100000>; 59 ranges = <00001000 f8001000 000ff000
60 reg = <f8000000 00100000>; // CCSRBAR 1M 60 80000000 80000000 20000000
61 e2000000 e2000000 00100000
62 a0000000 a0000000 20000000
63 e3000000 e3000000 00100000>;
64 reg = <f8000000 00001000>; // CCSRBAR
61 bus-frequency = <0>; 65 bus-frequency = <0>;
62 66
63 i2c@3000 { 67 i2c@3000 {
@@ -285,17 +289,84 @@
285 f800 0 0 3 &i8259 0 0 289 f800 0 0 3 &i8259 0 0
286 f800 0 0 4 &i8259 0 0 290 f800 0 0 4 &i8259 0 0
287 >; 291 >;
288 i8259: i8259@4d0 { 292 uli1575@0 {
289 clock-frequency = <0>; 293 reg = <0 0 0 0 0>;
290 interrupt-controller; 294 #size-cells = <2>;
291 device_type = "interrupt-controller"; 295 #address-cells = <3>;
292 #address-cells = <0>; 296 ranges = <02000000 0 80000000
293 #interrupt-cells = <2>; 297 02000000 0 80000000
294 built-in; 298 0 20000000
295 compatible = "chrp,iic"; 299 01000000 0 00000000
296 big-endian; 300 01000000 0 00000000
297 interrupts = <49 2>; 301 0 00100000>;
298 interrupt-parent = <&mpic>; 302
303 pci_bridge@0 {
304 reg = <0 0 0 0 0>;
305 #size-cells = <2>;
306 #address-cells = <3>;
307 ranges = <02000000 0 80000000
308 02000000 0 80000000
309 0 20000000
310 01000000 0 00000000
311 01000000 0 00000000
312 0 00100000>;
313
314 isa@1e {
315 device_type = "isa";
316 #interrupt-cells = <2>;
317 #size-cells = <1>;
318 #address-cells = <2>;
319 reg = <f000 0 0 0 0>;
320 ranges = <1 0 01000000 0 0
321 00001000>;
322 interrupt-parent = <&i8259>;
323
324 i8259: interrupt-controller@20 {
325 reg = <1 20 2
326 1 a0 2
327 1 4d0 2>;
328 clock-frequency = <0>;
329 interrupt-controller;
330 device_type = "interrupt-controller";
331 #address-cells = <0>;
332 #interrupt-cells = <2>;
333 built-in;
334 compatible = "chrp,iic";
335 interrupts = <49 2>;
336 interrupt-parent =
337 <&mpic>;
338 };
339
340 i8042@60 {
341 #size-cells = <0>;
342 #address-cells = <1>;
343 reg = <1 60 1 1 64 1>;
344 interrupts = <1 3 c 3>;
345 interrupt-parent =
346 <&i8259>;
347
348 keyboard@0 {
349 reg = <0>;
350 compatible = "pnpPNP,303";
351 };
352
353 mouse@1 {
354 reg = <1>;
355 compatible = "pnpPNP,f03";
356 };
357 };
358
359 rtc@70 {
360 compatible =
361 "pnpPNP,b00";
362 reg = <1 70 2>;
363 };
364
365 gpio@400 {
366 reg = <1 400 80>;
367 };
368 };
369 };
299 }; 370 };
300 371
301 }; 372 };