diff options
author | Timur Tabi <timur@freescale.com> | 2007-02-16 23:31:21 -0500 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-02-17 17:12:54 -0500 |
commit | 5af68af5bcd34e3569fd82ef4676de5bc03e18c0 (patch) | |
tree | e69dab3cc4548c73d2c9367a6458da59f0fe2290 /arch/powerpc | |
parent | be156bed9ebfe365c6d95f715eae3529cf694fcb (diff) |
[POWERPC] QE: clean up ucc_slow.c and ucc_fast.c
Refactored and cleaned up ucc_fast.c and ucc_slow.c so that the two files
look more alike and are easier to read. Removed uccf_printk() and related
functions, because they were just front-ends to printk(). Fixed some
spacing and tabbing issues. Minor optimizations of some code. Changed
the type of some variables to their proper type (mostly buffer
descriptors).
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/sysdev/qe_lib/ucc_fast.c | 163 | ||||
-rw-r--r-- | arch/powerpc/sysdev/qe_lib/ucc_slow.c | 137 |
2 files changed, 114 insertions, 186 deletions
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_fast.c b/arch/powerpc/sysdev/qe_lib/ucc_fast.c index e657559bea93..a457ac1c6639 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc_fast.c +++ b/arch/powerpc/sysdev/qe_lib/ucc_fast.c | |||
@@ -1,13 +1,12 @@ | |||
1 | /* | 1 | /* |
2 | * arch/powerpc/sysdev/qe_lib/ucc_fast.c | ||
3 | * | ||
4 | * QE UCC Fast API Set - UCC Fast specific routines implementations. | ||
5 | * | ||
6 | * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. | 2 | * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. |
7 | * | 3 | * |
8 | * Authors: Shlomi Gridish <gridish@freescale.com> | 4 | * Authors: Shlomi Gridish <gridish@freescale.com> |
9 | * Li Yang <leoli@freescale.com> | 5 | * Li Yang <leoli@freescale.com> |
10 | * | 6 | * |
7 | * Description: | ||
8 | * QE UCC Fast API Set - UCC Fast specific routines implementations. | ||
9 | * | ||
11 | * This program is free software; you can redistribute it and/or modify it | 10 | * This program is free software; you can redistribute it and/or modify it |
12 | * under the terms of the GNU General Public License as published by the | 11 | * under the terms of the GNU General Public License as published by the |
13 | * Free Software Foundation; either version 2 of the License, or (at your | 12 | * Free Software Foundation; either version 2 of the License, or (at your |
@@ -27,79 +26,61 @@ | |||
27 | #include <asm/ucc.h> | 26 | #include <asm/ucc.h> |
28 | #include <asm/ucc_fast.h> | 27 | #include <asm/ucc_fast.h> |
29 | 28 | ||
30 | #define uccf_printk(level, format, arg...) \ | ||
31 | printk(level format "\n", ## arg) | ||
32 | |||
33 | #define uccf_dbg(format, arg...) \ | ||
34 | uccf_printk(KERN_DEBUG , format , ## arg) | ||
35 | #define uccf_err(format, arg...) \ | ||
36 | uccf_printk(KERN_ERR , format , ## arg) | ||
37 | #define uccf_info(format, arg...) \ | ||
38 | uccf_printk(KERN_INFO , format , ## arg) | ||
39 | #define uccf_warn(format, arg...) \ | ||
40 | uccf_printk(KERN_WARNING , format , ## arg) | ||
41 | |||
42 | #ifdef UCCF_VERBOSE_DEBUG | ||
43 | #define uccf_vdbg uccf_dbg | ||
44 | #else | ||
45 | #define uccf_vdbg(fmt, args...) do { } while (0) | ||
46 | #endif /* UCCF_VERBOSE_DEBUG */ | ||
47 | |||
48 | void ucc_fast_dump_regs(struct ucc_fast_private * uccf) | 29 | void ucc_fast_dump_regs(struct ucc_fast_private * uccf) |
49 | { | 30 | { |
50 | uccf_info("UCC%d Fast registers:", uccf->uf_info->ucc_num); | 31 | printk(KERN_INFO "UCC%d Fast registers:", uccf->uf_info->ucc_num); |
51 | uccf_info("Base address: 0x%08x", (u32) uccf->uf_regs); | 32 | printk(KERN_INFO "Base address: 0x%08x", (u32) uccf->uf_regs); |
52 | 33 | ||
53 | uccf_info("gumr : addr - 0x%08x, val - 0x%08x", | 34 | printk(KERN_INFO "gumr : addr - 0x%08x, val - 0x%08x", |
54 | (u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr)); | 35 | (u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr)); |
55 | uccf_info("upsmr : addr - 0x%08x, val - 0x%08x", | 36 | printk(KERN_INFO "upsmr : addr - 0x%08x, val - 0x%08x", |
56 | (u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr)); | 37 | (u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr)); |
57 | uccf_info("utodr : addr - 0x%08x, val - 0x%04x", | 38 | printk(KERN_INFO "utodr : addr - 0x%08x, val - 0x%04x", |
58 | (u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr)); | 39 | (u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr)); |
59 | uccf_info("udsr : addr - 0x%08x, val - 0x%04x", | 40 | printk(KERN_INFO "udsr : addr - 0x%08x, val - 0x%04x", |
60 | (u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr)); | 41 | (u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr)); |
61 | uccf_info("ucce : addr - 0x%08x, val - 0x%08x", | 42 | printk(KERN_INFO "ucce : addr - 0x%08x, val - 0x%08x", |
62 | (u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce)); | 43 | (u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce)); |
63 | uccf_info("uccm : addr - 0x%08x, val - 0x%08x", | 44 | printk(KERN_INFO "uccm : addr - 0x%08x, val - 0x%08x", |
64 | (u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm)); | 45 | (u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm)); |
65 | uccf_info("uccs : addr - 0x%08x, val - 0x%02x", | 46 | printk(KERN_INFO "uccs : addr - 0x%08x, val - 0x%02x", |
66 | (u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs); | 47 | (u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs); |
67 | uccf_info("urfb : addr - 0x%08x, val - 0x%08x", | 48 | printk(KERN_INFO "urfb : addr - 0x%08x, val - 0x%08x", |
68 | (u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb)); | 49 | (u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb)); |
69 | uccf_info("urfs : addr - 0x%08x, val - 0x%04x", | 50 | printk(KERN_INFO "urfs : addr - 0x%08x, val - 0x%04x", |
70 | (u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs)); | 51 | (u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs)); |
71 | uccf_info("urfet : addr - 0x%08x, val - 0x%04x", | 52 | printk(KERN_INFO "urfet : addr - 0x%08x, val - 0x%04x", |
72 | (u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet)); | 53 | (u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet)); |
73 | uccf_info("urfset: addr - 0x%08x, val - 0x%04x", | 54 | printk(KERN_INFO "urfset: addr - 0x%08x, val - 0x%04x", |
74 | (u32) & uccf->uf_regs->urfset, | 55 | (u32) & uccf->uf_regs->urfset, |
75 | in_be16(&uccf->uf_regs->urfset)); | 56 | in_be16(&uccf->uf_regs->urfset)); |
76 | uccf_info("utfb : addr - 0x%08x, val - 0x%08x", | 57 | printk(KERN_INFO "utfb : addr - 0x%08x, val - 0x%08x", |
77 | (u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb)); | 58 | (u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb)); |
78 | uccf_info("utfs : addr - 0x%08x, val - 0x%04x", | 59 | printk(KERN_INFO "utfs : addr - 0x%08x, val - 0x%04x", |
79 | (u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs)); | 60 | (u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs)); |
80 | uccf_info("utfet : addr - 0x%08x, val - 0x%04x", | 61 | printk(KERN_INFO "utfet : addr - 0x%08x, val - 0x%04x", |
81 | (u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet)); | 62 | (u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet)); |
82 | uccf_info("utftt : addr - 0x%08x, val - 0x%04x", | 63 | printk(KERN_INFO "utftt : addr - 0x%08x, val - 0x%04x", |
83 | (u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt)); | 64 | (u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt)); |
84 | uccf_info("utpt : addr - 0x%08x, val - 0x%04x", | 65 | printk(KERN_INFO "utpt : addr - 0x%08x, val - 0x%04x", |
85 | (u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt)); | 66 | (u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt)); |
86 | uccf_info("urtry : addr - 0x%08x, val - 0x%08x", | 67 | printk(KERN_INFO "urtry : addr - 0x%08x, val - 0x%08x", |
87 | (u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry)); | 68 | (u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry)); |
88 | uccf_info("guemr : addr - 0x%08x, val - 0x%02x", | 69 | printk(KERN_INFO "guemr : addr - 0x%08x, val - 0x%02x", |
89 | (u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr); | 70 | (u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr); |
90 | } | 71 | } |
91 | 72 | ||
92 | u32 ucc_fast_get_qe_cr_subblock(int uccf_num) | 73 | u32 ucc_fast_get_qe_cr_subblock(int uccf_num) |
93 | { | 74 | { |
94 | switch (uccf_num) { | 75 | switch (uccf_num) { |
95 | case 0: return QE_CR_SUBBLOCK_UCCFAST1; | 76 | case 0: return QE_CR_SUBBLOCK_UCCFAST1; |
96 | case 1: return QE_CR_SUBBLOCK_UCCFAST2; | 77 | case 1: return QE_CR_SUBBLOCK_UCCFAST2; |
97 | case 2: return QE_CR_SUBBLOCK_UCCFAST3; | 78 | case 2: return QE_CR_SUBBLOCK_UCCFAST3; |
98 | case 3: return QE_CR_SUBBLOCK_UCCFAST4; | 79 | case 3: return QE_CR_SUBBLOCK_UCCFAST4; |
99 | case 4: return QE_CR_SUBBLOCK_UCCFAST5; | 80 | case 4: return QE_CR_SUBBLOCK_UCCFAST5; |
100 | case 5: return QE_CR_SUBBLOCK_UCCFAST6; | 81 | case 5: return QE_CR_SUBBLOCK_UCCFAST6; |
101 | case 6: return QE_CR_SUBBLOCK_UCCFAST7; | 82 | case 6: return QE_CR_SUBBLOCK_UCCFAST7; |
102 | case 7: return QE_CR_SUBBLOCK_UCCFAST8; | 83 | case 7: return QE_CR_SUBBLOCK_UCCFAST8; |
103 | default: return QE_CR_SUBBLOCK_INVALID; | 84 | default: return QE_CR_SUBBLOCK_INVALID; |
104 | } | 85 | } |
105 | } | 86 | } |
@@ -153,84 +134,72 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc | |||
153 | { | 134 | { |
154 | struct ucc_fast_private *uccf; | 135 | struct ucc_fast_private *uccf; |
155 | struct ucc_fast *uf_regs; | 136 | struct ucc_fast *uf_regs; |
156 | u32 gumr = 0; | 137 | u32 gumr; |
157 | int ret; | 138 | int ret; |
158 | 139 | ||
159 | uccf_vdbg("%s: IN", __FUNCTION__); | ||
160 | |||
161 | if (!uf_info) | 140 | if (!uf_info) |
162 | return -EINVAL; | 141 | return -EINVAL; |
163 | 142 | ||
164 | /* check if the UCC port number is in range. */ | 143 | /* check if the UCC port number is in range. */ |
165 | if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) { | 144 | if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) { |
166 | uccf_err("ucc_fast_init: Illegal UCC number!"); | 145 | printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__); |
167 | return -EINVAL; | 146 | return -EINVAL; |
168 | } | 147 | } |
169 | 148 | ||
170 | /* Check that 'max_rx_buf_length' is properly aligned (4). */ | 149 | /* Check that 'max_rx_buf_length' is properly aligned (4). */ |
171 | if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) { | 150 | if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) { |
172 | uccf_err("ucc_fast_init: max_rx_buf_length not aligned."); | 151 | printk(KERN_ERR "%s: max_rx_buf_length not aligned", __FUNCTION__); |
173 | return -EINVAL; | 152 | return -EINVAL; |
174 | } | 153 | } |
175 | 154 | ||
176 | /* Validate Virtual Fifo register values */ | 155 | /* Validate Virtual Fifo register values */ |
177 | if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) { | 156 | if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) { |
178 | uccf_err | 157 | printk(KERN_ERR "%s: urfs is too small", __FUNCTION__); |
179 | ("ucc_fast_init: Virtual Fifo register urfs too small."); | ||
180 | return -EINVAL; | 158 | return -EINVAL; |
181 | } | 159 | } |
182 | 160 | ||
183 | if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { | 161 | if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { |
184 | uccf_err | 162 | printk(KERN_ERR "%s: urfs is not aligned", __FUNCTION__); |
185 | ("ucc_fast_init: Virtual Fifo register urfs not aligned."); | ||
186 | return -EINVAL; | 163 | return -EINVAL; |
187 | } | 164 | } |
188 | 165 | ||
189 | if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { | 166 | if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { |
190 | uccf_err | 167 | printk(KERN_ERR "%s: urfet is not aligned.", __FUNCTION__); |
191 | ("ucc_fast_init: Virtual Fifo register urfet not aligned."); | ||
192 | return -EINVAL; | 168 | return -EINVAL; |
193 | } | 169 | } |
194 | 170 | ||
195 | if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { | 171 | if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { |
196 | uccf_err | 172 | printk(KERN_ERR "%s: urfset is not aligned", __FUNCTION__); |
197 | ("ucc_fast_init: Virtual Fifo register urfset not aligned."); | ||
198 | return -EINVAL; | 173 | return -EINVAL; |
199 | } | 174 | } |
200 | 175 | ||
201 | if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { | 176 | if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { |
202 | uccf_err | 177 | printk(KERN_ERR "%s: utfs is not aligned", __FUNCTION__); |
203 | ("ucc_fast_init: Virtual Fifo register utfs not aligned."); | ||
204 | return -EINVAL; | 178 | return -EINVAL; |
205 | } | 179 | } |
206 | 180 | ||
207 | if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { | 181 | if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { |
208 | uccf_err | 182 | printk(KERN_ERR "%s: utfet is not aligned", __FUNCTION__); |
209 | ("ucc_fast_init: Virtual Fifo register utfet not aligned."); | ||
210 | return -EINVAL; | 183 | return -EINVAL; |
211 | } | 184 | } |
212 | 185 | ||
213 | if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { | 186 | if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { |
214 | uccf_err | 187 | printk(KERN_ERR "%s: utftt is not aligned", __FUNCTION__); |
215 | ("ucc_fast_init: Virtual Fifo register utftt not aligned."); | ||
216 | return -EINVAL; | 188 | return -EINVAL; |
217 | } | 189 | } |
218 | 190 | ||
219 | uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL); | 191 | uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL); |
220 | if (!uccf) { | 192 | if (!uccf) { |
221 | uccf_err | 193 | printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__); |
222 | ("ucc_fast_init: No memory for UCC slow data structure!"); | ||
223 | return -ENOMEM; | 194 | return -ENOMEM; |
224 | } | 195 | } |
225 | 196 | ||
226 | /* Fill fast UCC structure */ | 197 | /* Fill fast UCC structure */ |
227 | uccf->uf_info = uf_info; | 198 | uccf->uf_info = uf_info; |
228 | /* Set the PHY base address */ | 199 | /* Set the PHY base address */ |
229 | uccf->uf_regs = | 200 | uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast)); |
230 | (struct ucc_fast *) ioremap(uf_info->regs, sizeof(struct ucc_fast)); | ||
231 | if (uccf->uf_regs == NULL) { | 201 | if (uccf->uf_regs == NULL) { |
232 | uccf_err | 202 | printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__); |
233 | ("ucc_fast_init: No memory map for UCC slow controller!"); | ||
234 | return -ENOMEM; | 203 | return -ENOMEM; |
235 | } | 204 | } |
236 | 205 | ||
@@ -249,7 +218,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc | |||
249 | 218 | ||
250 | /* Init Guemr register */ | 219 | /* Init Guemr register */ |
251 | if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) { | 220 | if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) { |
252 | uccf_err("ucc_fast_init: Could not init the guemr register."); | 221 | printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__); |
253 | ucc_fast_free(uccf); | 222 | ucc_fast_free(uccf); |
254 | return ret; | 223 | return ret; |
255 | } | 224 | } |
@@ -258,7 +227,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc | |||
258 | if ((ret = ucc_set_type(uf_info->ucc_num, | 227 | if ((ret = ucc_set_type(uf_info->ucc_num, |
259 | (struct ucc_common *) (uf_regs), | 228 | (struct ucc_common *) (uf_regs), |
260 | UCC_SPEED_TYPE_FAST))) { | 229 | UCC_SPEED_TYPE_FAST))) { |
261 | uccf_err("ucc_fast_init: Could not set type to fast."); | 230 | printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__); |
262 | ucc_fast_free(uccf); | 231 | ucc_fast_free(uccf); |
263 | return ret; | 232 | return ret; |
264 | } | 233 | } |
@@ -267,10 +236,9 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc | |||
267 | 236 | ||
268 | /* Set GUMR */ | 237 | /* Set GUMR */ |
269 | /* For more details see the hardware spec. */ | 238 | /* For more details see the hardware spec. */ |
270 | /* gumr starts as zero. */ | 239 | gumr = uf_info->ttx_trx; |
271 | if (uf_info->tci) | 240 | if (uf_info->tci) |
272 | gumr |= UCC_FAST_GUMR_TCI; | 241 | gumr |= UCC_FAST_GUMR_TCI; |
273 | gumr |= uf_info->ttx_trx; | ||
274 | if (uf_info->cdp) | 242 | if (uf_info->cdp) |
275 | gumr |= UCC_FAST_GUMR_CDP; | 243 | gumr |= UCC_FAST_GUMR_CDP; |
276 | if (uf_info->ctsp) | 244 | if (uf_info->ctsp) |
@@ -298,9 +266,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc | |||
298 | uccf->ucc_fast_tx_virtual_fifo_base_offset = | 266 | uccf->ucc_fast_tx_virtual_fifo_base_offset = |
299 | qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); | 267 | qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); |
300 | if (IS_MURAM_ERR(uccf->ucc_fast_tx_virtual_fifo_base_offset)) { | 268 | if (IS_MURAM_ERR(uccf->ucc_fast_tx_virtual_fifo_base_offset)) { |
301 | uccf_err | 269 | printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__); |
302 | ("ucc_fast_init: Can not allocate MURAM memory for " | ||
303 | "struct ucc_fastx_virtual_fifo_base_offset."); | ||
304 | uccf->ucc_fast_tx_virtual_fifo_base_offset = 0; | 270 | uccf->ucc_fast_tx_virtual_fifo_base_offset = 0; |
305 | ucc_fast_free(uccf); | 271 | ucc_fast_free(uccf); |
306 | return -ENOMEM; | 272 | return -ENOMEM; |
@@ -308,14 +274,11 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc | |||
308 | 274 | ||
309 | /* Allocate memory for Rx Virtual Fifo */ | 275 | /* Allocate memory for Rx Virtual Fifo */ |
310 | uccf->ucc_fast_rx_virtual_fifo_base_offset = | 276 | uccf->ucc_fast_rx_virtual_fifo_base_offset = |
311 | qe_muram_alloc(uf_info->urfs + | 277 | qe_muram_alloc(uf_info->urfs + |
312 | (u32) | ||
313 | UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR, | 278 | UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR, |
314 | UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); | 279 | UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); |
315 | if (IS_MURAM_ERR(uccf->ucc_fast_rx_virtual_fifo_base_offset)) { | 280 | if (IS_MURAM_ERR(uccf->ucc_fast_rx_virtual_fifo_base_offset)) { |
316 | uccf_err | 281 | printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__); |
317 | ("ucc_fast_init: Can not allocate MURAM memory for " | ||
318 | "ucc_fast_rx_virtual_fifo_base_offset."); | ||
319 | uccf->ucc_fast_rx_virtual_fifo_base_offset = 0; | 282 | uccf->ucc_fast_rx_virtual_fifo_base_offset = 0; |
320 | ucc_fast_free(uccf); | 283 | ucc_fast_free(uccf); |
321 | return -ENOMEM; | 284 | return -ENOMEM; |
@@ -342,26 +305,22 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc | |||
342 | /* If NMSI (not Tsa), set Tx and Rx clock. */ | 305 | /* If NMSI (not Tsa), set Tx and Rx clock. */ |
343 | if (!uf_info->tsa) { | 306 | if (!uf_info->tsa) { |
344 | /* Rx clock routing */ | 307 | /* Rx clock routing */ |
345 | if (uf_info->rx_clock != QE_CLK_NONE) { | 308 | if ((uf_info->rx_clock != QE_CLK_NONE) && |
346 | if (ucc_set_qe_mux_rxtx | 309 | ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock, |
347 | (uf_info->ucc_num, uf_info->rx_clock, | 310 | COMM_DIR_RX)) { |
348 | COMM_DIR_RX)) { | 311 | printk(KERN_ERR "%s: illegal value for RX clock", |
349 | uccf_err | 312 | __FUNCTION__); |
350 | ("ucc_fast_init: Illegal value for parameter 'RxClock'."); | 313 | ucc_fast_free(uccf); |
351 | ucc_fast_free(uccf); | 314 | return -EINVAL; |
352 | return -EINVAL; | ||
353 | } | ||
354 | } | 315 | } |
355 | /* Tx clock routing */ | 316 | /* Tx clock routing */ |
356 | if (uf_info->tx_clock != QE_CLK_NONE) { | 317 | if ((uf_info->tx_clock != QE_CLK_NONE) && |
357 | if (ucc_set_qe_mux_rxtx | 318 | ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock, |
358 | (uf_info->ucc_num, uf_info->tx_clock, | 319 | COMM_DIR_TX)) { |
359 | COMM_DIR_TX)) { | 320 | printk(KERN_ERR "%s: illegal value for TX clock", |
360 | uccf_err | 321 | __FUNCTION__); |
361 | ("ucc_fast_init: Illegal value for parameter 'TxClock'."); | 322 | ucc_fast_free(uccf); |
362 | ucc_fast_free(uccf); | 323 | return -EINVAL; |
363 | return -EINVAL; | ||
364 | } | ||
365 | } | 324 | } |
366 | } | 325 | } |
367 | 326 | ||
@@ -370,9 +329,9 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc | |||
370 | 329 | ||
371 | /* First, clear anything pending at UCC level, | 330 | /* First, clear anything pending at UCC level, |
372 | * otherwise, old garbage may come through | 331 | * otherwise, old garbage may come through |
373 | * as soon as the dam is opened | 332 | * as soon as the dam is opened. */ |
374 | * Writing '1' clears | 333 | |
375 | */ | 334 | /* Writing '1' clears */ |
376 | out_be32(&uf_regs->ucce, 0xffffffff); | 335 | out_be32(&uf_regs->ucce, 0xffffffff); |
377 | 336 | ||
378 | *uccf_ret = uccf; | 337 | *uccf_ret = uccf; |
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_slow.c b/arch/powerpc/sysdev/qe_lib/ucc_slow.c index 0e97e5c94f8a..817df73ecf56 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc_slow.c +++ b/arch/powerpc/sysdev/qe_lib/ucc_slow.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/stddef.h> | 19 | #include <linux/stddef.h> |
20 | #include <linux/interrupt.h> | 20 | #include <linux/interrupt.h> |
21 | 21 | ||
22 | #include <asm/irq.h> | ||
23 | #include <asm/io.h> | 22 | #include <asm/io.h> |
24 | #include <asm/immap_qe.h> | 23 | #include <asm/immap_qe.h> |
25 | #include <asm/qe.h> | 24 | #include <asm/qe.h> |
@@ -27,24 +26,6 @@ | |||
27 | #include <asm/ucc.h> | 26 | #include <asm/ucc.h> |
28 | #include <asm/ucc_slow.h> | 27 | #include <asm/ucc_slow.h> |
29 | 28 | ||
30 | #define uccs_printk(level, format, arg...) \ | ||
31 | printk(level format "\n", ## arg) | ||
32 | |||
33 | #define uccs_dbg(format, arg...) \ | ||
34 | uccs_printk(KERN_DEBUG , format , ## arg) | ||
35 | #define uccs_err(format, arg...) \ | ||
36 | uccs_printk(KERN_ERR , format , ## arg) | ||
37 | #define uccs_info(format, arg...) \ | ||
38 | uccs_printk(KERN_INFO , format , ## arg) | ||
39 | #define uccs_warn(format, arg...) \ | ||
40 | uccs_printk(KERN_WARNING , format , ## arg) | ||
41 | |||
42 | #ifdef UCCS_VERBOSE_DEBUG | ||
43 | #define uccs_vdbg uccs_dbg | ||
44 | #else | ||
45 | #define uccs_vdbg(fmt, args...) do { } while (0) | ||
46 | #endif /* UCCS_VERBOSE_DEBUG */ | ||
47 | |||
48 | u32 ucc_slow_get_qe_cr_subblock(int uccs_num) | 29 | u32 ucc_slow_get_qe_cr_subblock(int uccs_num) |
49 | { | 30 | { |
50 | switch (uccs_num) { | 31 | switch (uccs_num) { |
@@ -135,51 +116,53 @@ void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode) | |||
135 | 116 | ||
136 | int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret) | 117 | int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret) |
137 | { | 118 | { |
119 | struct ucc_slow_private *uccs; | ||
138 | u32 i; | 120 | u32 i; |
139 | struct ucc_slow *us_regs; | 121 | struct ucc_slow *us_regs; |
140 | u32 gumr; | 122 | u32 gumr; |
141 | u8 function_code = 0; | 123 | struct qe_bd *bd; |
142 | u8 *bd; | ||
143 | struct ucc_slow_private *uccs; | ||
144 | u32 id; | 124 | u32 id; |
145 | u32 command; | 125 | u32 command; |
146 | int ret; | 126 | int ret = 0; |
147 | |||
148 | uccs_vdbg("%s: IN", __FUNCTION__); | ||
149 | 127 | ||
150 | if (!us_info) | 128 | if (!us_info) |
151 | return -EINVAL; | 129 | return -EINVAL; |
152 | 130 | ||
153 | /* check if the UCC port number is in range. */ | 131 | /* check if the UCC port number is in range. */ |
154 | if ((us_info->ucc_num < 0) || (us_info->ucc_num > UCC_MAX_NUM - 1)) { | 132 | if ((us_info->ucc_num < 0) || (us_info->ucc_num > UCC_MAX_NUM - 1)) { |
155 | uccs_err("ucc_slow_init: Illegal UCC number!"); | 133 | printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__); |
156 | return -EINVAL; | 134 | return -EINVAL; |
157 | } | 135 | } |
158 | 136 | ||
159 | /* | 137 | /* |
160 | * Set mrblr | 138 | * Set mrblr |
161 | * Check that 'max_rx_buf_length' is properly aligned (4), unless | 139 | * Check that 'max_rx_buf_length' is properly aligned (4), unless |
162 | * rfw is 1, meaning that QE accepts one byte at a time, unlike normal | 140 | * rfw is 1, meaning that QE accepts one byte at a time, unlike normal |
163 | * case when QE accepts 32 bits at a time. | 141 | * case when QE accepts 32 bits at a time. |
164 | */ | 142 | */ |
165 | if ((!us_info->rfw) && | 143 | if ((!us_info->rfw) && |
166 | (us_info->max_rx_buf_length & (UCC_SLOW_MRBLR_ALIGNMENT - 1))) { | 144 | (us_info->max_rx_buf_length & (UCC_SLOW_MRBLR_ALIGNMENT - 1))) { |
167 | uccs_err("max_rx_buf_length not aligned."); | 145 | printk(KERN_ERR "max_rx_buf_length not aligned."); |
168 | return -EINVAL; | 146 | return -EINVAL; |
169 | } | 147 | } |
170 | 148 | ||
171 | uccs = kzalloc(sizeof(struct ucc_slow_private), GFP_KERNEL); | 149 | uccs = kzalloc(sizeof(struct ucc_slow_private), GFP_KERNEL); |
172 | if (!uccs) { | 150 | if (!uccs) { |
173 | uccs_err | 151 | printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__); |
174 | ("ucc_slow_init: No memory for UCC slow data structure!"); | ||
175 | return -ENOMEM; | 152 | return -ENOMEM; |
176 | } | 153 | } |
177 | 154 | ||
178 | /* Fill slow UCC structure */ | 155 | /* Fill slow UCC structure */ |
179 | uccs->us_info = us_info; | 156 | uccs->us_info = us_info; |
157 | /* Set the PHY base address */ | ||
158 | uccs->us_regs = ioremap(us_info->regs, sizeof(struct ucc_slow)); | ||
159 | if (uccs->us_regs == NULL) { | ||
160 | printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__); | ||
161 | return -ENOMEM; | ||
162 | } | ||
163 | |||
180 | uccs->saved_uccm = 0; | 164 | uccs->saved_uccm = 0; |
181 | uccs->p_rx_frame = 0; | 165 | uccs->p_rx_frame = 0; |
182 | uccs->us_regs = us_info->regs; | ||
183 | us_regs = uccs->us_regs; | 166 | us_regs = uccs->us_regs; |
184 | uccs->p_ucce = (u16 *) & (us_regs->ucce); | 167 | uccs->p_ucce = (u16 *) & (us_regs->ucce); |
185 | uccs->p_uccm = (u16 *) & (us_regs->uccm); | 168 | uccs->p_uccm = (u16 *) & (us_regs->uccm); |
@@ -190,24 +173,22 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
190 | #endif /* STATISTICS */ | 173 | #endif /* STATISTICS */ |
191 | 174 | ||
192 | /* Get PRAM base */ | 175 | /* Get PRAM base */ |
193 | uccs->us_pram_offset = qe_muram_alloc(UCC_SLOW_PRAM_SIZE, | 176 | uccs->us_pram_offset = |
194 | ALIGNMENT_OF_UCC_SLOW_PRAM); | 177 | qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM); |
195 | if (IS_MURAM_ERR(uccs->us_pram_offset)) { | 178 | if (IS_MURAM_ERR(uccs->us_pram_offset)) { |
196 | uccs_err | 179 | printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __FUNCTION__); |
197 | ("ucc_slow_init: Can not allocate MURAM memory " | ||
198 | "for Slow UCC."); | ||
199 | ucc_slow_free(uccs); | 180 | ucc_slow_free(uccs); |
200 | return -ENOMEM; | 181 | return -ENOMEM; |
201 | } | 182 | } |
202 | id = ucc_slow_get_qe_cr_subblock(us_info->ucc_num); | 183 | id = ucc_slow_get_qe_cr_subblock(us_info->ucc_num); |
203 | qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, id, QE_CR_PROTOCOL_UNSPECIFIED, | 184 | qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, id, QE_CR_PROTOCOL_UNSPECIFIED, |
204 | (u32) uccs->us_pram_offset); | 185 | uccs->us_pram_offset); |
205 | 186 | ||
206 | uccs->us_pram = qe_muram_addr(uccs->us_pram_offset); | 187 | uccs->us_pram = qe_muram_addr(uccs->us_pram_offset); |
207 | 188 | ||
208 | /* Init Guemr register */ | 189 | /* Init Guemr register */ |
209 | if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->regs)))) { | 190 | if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->regs)))) { |
210 | uccs_err("ucc_slow_init: Could not init the guemr register."); | 191 | printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__); |
211 | ucc_slow_free(uccs); | 192 | ucc_slow_free(uccs); |
212 | return ret; | 193 | return ret; |
213 | } | 194 | } |
@@ -216,7 +197,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
216 | if ((ret = ucc_set_type(us_info->ucc_num, | 197 | if ((ret = ucc_set_type(us_info->ucc_num, |
217 | (struct ucc_common *) (us_info->regs), | 198 | (struct ucc_common *) (us_info->regs), |
218 | UCC_SPEED_TYPE_SLOW))) { | 199 | UCC_SPEED_TYPE_SLOW))) { |
219 | uccs_err("ucc_slow_init: Could not init the guemr register."); | 200 | printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__); |
220 | ucc_slow_free(uccs); | 201 | ucc_slow_free(uccs); |
221 | return ret; | 202 | return ret; |
222 | } | 203 | } |
@@ -230,7 +211,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
230 | qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd), | 211 | qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd), |
231 | QE_ALIGNMENT_OF_BD); | 212 | QE_ALIGNMENT_OF_BD); |
232 | if (IS_MURAM_ERR(uccs->rx_base_offset)) { | 213 | if (IS_MURAM_ERR(uccs->rx_base_offset)) { |
233 | uccs_err("ucc_slow_init: No memory for Rx BD's."); | 214 | printk(KERN_ERR "%s: cannot allocate RX BDs", __FUNCTION__); |
234 | uccs->rx_base_offset = 0; | 215 | uccs->rx_base_offset = 0; |
235 | ucc_slow_free(uccs); | 216 | ucc_slow_free(uccs); |
236 | return -ENOMEM; | 217 | return -ENOMEM; |
@@ -240,7 +221,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
240 | qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd), | 221 | qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd), |
241 | QE_ALIGNMENT_OF_BD); | 222 | QE_ALIGNMENT_OF_BD); |
242 | if (IS_MURAM_ERR(uccs->tx_base_offset)) { | 223 | if (IS_MURAM_ERR(uccs->tx_base_offset)) { |
243 | uccs_err("ucc_slow_init: No memory for Tx BD's."); | 224 | printk(KERN_ERR "%s: cannot allocate TX BDs", __FUNCTION__); |
244 | uccs->tx_base_offset = 0; | 225 | uccs->tx_base_offset = 0; |
245 | ucc_slow_free(uccs); | 226 | ucc_slow_free(uccs); |
246 | return -ENOMEM; | 227 | return -ENOMEM; |
@@ -248,34 +229,33 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
248 | 229 | ||
249 | /* Init Tx bds */ | 230 | /* Init Tx bds */ |
250 | bd = uccs->confBd = uccs->tx_bd = qe_muram_addr(uccs->tx_base_offset); | 231 | bd = uccs->confBd = uccs->tx_bd = qe_muram_addr(uccs->tx_base_offset); |
251 | for (i = 0; i < us_info->tx_bd_ring_len; i++) { | 232 | for (i = 0; i < us_info->tx_bd_ring_len - 1; i++) { |
252 | /* clear bd buffer */ | 233 | /* clear bd buffer */ |
253 | out_be32(&(((struct qe_bd *)bd)->buf), 0); | 234 | out_be32(&bd->buf, 0); |
254 | /* set bd status and length */ | 235 | /* set bd status and length */ |
255 | out_be32((u32*)bd, 0); | 236 | out_be32((u32 *) bd, 0); |
256 | bd += sizeof(struct qe_bd); | 237 | bd++; |
257 | } | 238 | } |
258 | bd -= sizeof(struct qe_bd); | 239 | /* for last BD set Wrap bit */ |
259 | /* set bd status and length */ | 240 | out_be32(&bd->buf, 0); |
260 | out_be32((u32*)bd, T_W); /* for last BD set Wrap bit */ | 241 | out_be32((u32 *) bd, cpu_to_be32(T_W)); |
261 | 242 | ||
262 | /* Init Rx bds */ | 243 | /* Init Rx bds */ |
263 | bd = uccs->rx_bd = qe_muram_addr(uccs->rx_base_offset); | 244 | bd = uccs->rx_bd = qe_muram_addr(uccs->rx_base_offset); |
264 | for (i = 0; i < us_info->rx_bd_ring_len; i++) { | 245 | for (i = 0; i < us_info->rx_bd_ring_len - 1; i++) { |
265 | /* set bd status and length */ | 246 | /* set bd status and length */ |
266 | out_be32((u32*)bd, 0); | 247 | out_be32((u32*)bd, 0); |
267 | /* clear bd buffer */ | 248 | /* clear bd buffer */ |
268 | out_be32(&(((struct qe_bd *)bd)->buf), 0); | 249 | out_be32(&bd->buf, 0); |
269 | bd += sizeof(struct qe_bd); | 250 | bd++; |
270 | } | 251 | } |
271 | bd -= sizeof(struct qe_bd); | 252 | /* for last BD set Wrap bit */ |
272 | /* set bd status and length */ | 253 | out_be32((u32*)bd, cpu_to_be32(R_W)); |
273 | out_be32((u32*)bd, R_W); /* for last BD set Wrap bit */ | 254 | out_be32(&bd->buf, 0); |
274 | 255 | ||
275 | /* Set GUMR (For more details see the hardware spec.). */ | 256 | /* Set GUMR (For more details see the hardware spec.). */ |
276 | /* gumr_h */ | 257 | /* gumr_h */ |
277 | gumr = 0; | 258 | gumr = us_info->tcrc; |
278 | gumr |= us_info->tcrc; | ||
279 | if (us_info->cdp) | 259 | if (us_info->cdp) |
280 | gumr |= UCC_SLOW_GUMR_H_CDP; | 260 | gumr |= UCC_SLOW_GUMR_H_CDP; |
281 | if (us_info->ctsp) | 261 | if (us_info->ctsp) |
@@ -295,7 +275,8 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
295 | out_be32(&us_regs->gumr_h, gumr); | 275 | out_be32(&us_regs->gumr_h, gumr); |
296 | 276 | ||
297 | /* gumr_l */ | 277 | /* gumr_l */ |
298 | gumr = 0; | 278 | gumr = us_info->tdcr | us_info->rdcr | us_info->tenc | us_info->renc | |
279 | us_info->diag | us_info->mode; | ||
299 | if (us_info->tci) | 280 | if (us_info->tci) |
300 | gumr |= UCC_SLOW_GUMR_L_TCI; | 281 | gumr |= UCC_SLOW_GUMR_L_TCI; |
301 | if (us_info->rinv) | 282 | if (us_info->rinv) |
@@ -304,23 +285,14 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
304 | gumr |= UCC_SLOW_GUMR_L_TINV; | 285 | gumr |= UCC_SLOW_GUMR_L_TINV; |
305 | if (us_info->tend) | 286 | if (us_info->tend) |
306 | gumr |= UCC_SLOW_GUMR_L_TEND; | 287 | gumr |= UCC_SLOW_GUMR_L_TEND; |
307 | gumr |= us_info->tdcr; | ||
308 | gumr |= us_info->rdcr; | ||
309 | gumr |= us_info->tenc; | ||
310 | gumr |= us_info->renc; | ||
311 | gumr |= us_info->diag; | ||
312 | gumr |= us_info->mode; | ||
313 | out_be32(&us_regs->gumr_l, gumr); | 288 | out_be32(&us_regs->gumr_l, gumr); |
314 | 289 | ||
315 | /* Function code registers */ | 290 | /* Function code registers */ |
316 | /* function_code has initial value 0 */ | ||
317 | 291 | ||
318 | /* if the data is in cachable memory, the 'global' */ | 292 | /* if the data is in cachable memory, the 'global' */ |
319 | /* in the function code should be set. */ | 293 | /* in the function code should be set. */ |
320 | function_code |= us_info->data_mem_part; | 294 | uccs->us_pram->tfcr = uccs->us_pram->rfcr = |
321 | function_code |= QE_BMR_BYTE_ORDER_BO_MOT; /* Required for QE */ | 295 | us_info->data_mem_part | QE_BMR_BYTE_ORDER_BO_MOT; |
322 | uccs->us_pram->tfcr = function_code; | ||
323 | uccs->us_pram->rfcr = function_code; | ||
324 | 296 | ||
325 | /* rbase, tbase are offsets from MURAM base */ | 297 | /* rbase, tbase are offsets from MURAM base */ |
326 | out_be16(&uccs->us_pram->rbase, uccs->us_pram_offset); | 298 | out_be16(&uccs->us_pram->rbase, uccs->us_pram_offset); |
@@ -336,34 +308,29 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
336 | /* If NMSI (not Tsa), set Tx and Rx clock. */ | 308 | /* If NMSI (not Tsa), set Tx and Rx clock. */ |
337 | if (!us_info->tsa) { | 309 | if (!us_info->tsa) { |
338 | /* Rx clock routing */ | 310 | /* Rx clock routing */ |
339 | if (ucc_set_qe_mux_rxtx | 311 | if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->rx_clock, |
340 | (us_info->ucc_num, us_info->rx_clock, COMM_DIR_RX)) { | 312 | COMM_DIR_RX)) { |
341 | uccs_err | 313 | printk(KERN_ERR "%s: illegal value for RX clock", |
342 | ("ucc_slow_init: Illegal value for parameter" | 314 | __FUNCTION__); |
343 | " 'RxClock'."); | ||
344 | ucc_slow_free(uccs); | 315 | ucc_slow_free(uccs); |
345 | return -EINVAL; | 316 | return -EINVAL; |
346 | } | 317 | } |
347 | /* Tx clock routing */ | 318 | /* Tx clock routing */ |
348 | if (ucc_set_qe_mux_rxtx(us_info->ucc_num, | 319 | if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->tx_clock, |
349 | us_info->tx_clock, COMM_DIR_TX)) { | 320 | COMM_DIR_TX)) { |
350 | uccs_err | 321 | printk(KERN_ERR "%s: illegal value for TX clock", |
351 | ("ucc_slow_init: Illegal value for parameter " | 322 | __FUNCTION__); |
352 | "'TxClock'."); | ||
353 | ucc_slow_free(uccs); | 323 | ucc_slow_free(uccs); |
354 | return -EINVAL; | 324 | return -EINVAL; |
355 | } | 325 | } |
356 | } | 326 | } |
357 | 327 | ||
358 | /* | ||
359 | * INTERRUPTS | ||
360 | */ | ||
361 | /* Set interrupt mask register at UCC level. */ | 328 | /* Set interrupt mask register at UCC level. */ |
362 | out_be16(&us_regs->uccm, us_info->uccm_mask); | 329 | out_be16(&us_regs->uccm, us_info->uccm_mask); |
363 | 330 | ||
364 | /* First, clear anything pending at UCC level, */ | 331 | /* First, clear anything pending at UCC level, |
365 | /* otherwise, old garbage may come through */ | 332 | * otherwise, old garbage may come through |
366 | /* as soon as the dam is opened. */ | 333 | * as soon as the dam is opened. */ |
367 | 334 | ||
368 | /* Writing '1' clears */ | 335 | /* Writing '1' clears */ |
369 | out_be16(&us_regs->ucce, 0xffff); | 336 | out_be16(&us_regs->ucce, 0xffff); |
@@ -400,3 +367,5 @@ void ucc_slow_free(struct ucc_slow_private * uccs) | |||
400 | 367 | ||
401 | kfree(uccs); | 368 | kfree(uccs); |
402 | } | 369 | } |
370 | |||
371 | |||