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authorKumar Gala <galak@kernel.crashing.org>2007-02-17 17:32:41 -0500
committerKumar Gala <galak@kernel.crashing.org>2007-02-17 17:32:41 -0500
commitffd84881711a4cc98018cd540167c1ba2212bc0d (patch)
tree0b137abc428065dd93fe2ef3aa729cffc7b7a501 /arch/powerpc
parent834aba09598022f898eec651c0584b8b5d177e0a (diff)
parent5af68af5bcd34e3569fd82ef4676de5bc03e18c0 (diff)
Merge branch '83xx' into for_paulus
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts62
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts (renamed from arch/powerpc/boot/dts/mpc8323emds.dts)119
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts60
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts39
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts164
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts (renamed from arch/powerpc/boot/dts/mpc8360emds.dts)123
-rw-r--r--arch/powerpc/configs/mpc832x_mds_defconfig (renamed from arch/powerpc/configs/mpc832xemds_defconfig)0
-rw-r--r--arch/powerpc/configs/mpc836x_mds_defconfig (renamed from arch/powerpc/configs/mpc8360emds_defconfig)29
-rw-r--r--arch/powerpc/configs/ppc64_defconfig4
-rw-r--r--arch/powerpc/configs/pseries_defconfig4
-rw-r--r--arch/powerpc/kernel/prom_parse.c40
-rw-r--r--arch/powerpc/platforms/83xx/Kconfig8
-rw-r--r--arch/powerpc/platforms/83xx/Makefile2
-rw-r--r--arch/powerpc/platforms/83xx/mpc8313_rdb.c11
-rw-r--r--arch/powerpc/platforms/83xx/mpc832x_mds.c65
-rw-r--r--arch/powerpc/platforms/83xx/mpc834x_itx.c23
-rw-r--r--arch/powerpc/platforms/83xx/mpc834x_mds.c27
-rw-r--r--arch/powerpc/platforms/83xx/mpc836x_mds.c (renamed from arch/powerpc/platforms/83xx/mpc8360e_pb.c)97
-rw-r--r--arch/powerpc/platforms/pseries/Makefile2
-rw-r--r--arch/powerpc/platforms/pseries/power.c87
-rw-r--r--arch/powerpc/platforms/pseries/pseries.h3
-rw-r--r--arch/powerpc/platforms/pseries/setup.c30
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c19
-rw-r--r--arch/powerpc/sysdev/qe_lib/ucc_fast.c163
-rw-r--r--arch/powerpc/sysdev/qe_lib/ucc_slow.c137
25 files changed, 638 insertions, 680 deletions
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 3d2f5a06df3f..6d721900d00e 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -11,7 +11,7 @@
11 11
12/ { 12/ {
13 model = "MPC8313ERDB"; 13 model = "MPC8313ERDB";
14 compatible = "MPC83xx"; 14 compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
15 #address-cells = <1>; 15 #address-cells = <1>;
16 #size-cells = <1>; 16 #size-cells = <1>;
17 17
@@ -59,7 +59,7 @@
59 compatible = "fsl-i2c"; 59 compatible = "fsl-i2c";
60 reg = <3000 100>; 60 reg = <3000 100>;
61 interrupts = <e 8>; 61 interrupts = <e 8>;
62 interrupt-parent = <700>; 62 interrupt-parent = < &ipic >;
63 dfsrr; 63 dfsrr;
64 }; 64 };
65 65
@@ -68,7 +68,7 @@
68 compatible = "fsl-i2c"; 68 compatible = "fsl-i2c";
69 reg = <3100 100>; 69 reg = <3100 100>;
70 interrupts = <f 8>; 70 interrupts = <f 8>;
71 interrupt-parent = <700>; 71 interrupt-parent = < &ipic >;
72 dfsrr; 72 dfsrr;
73 }; 73 };
74 74
@@ -77,7 +77,7 @@
77 compatible = "mpc83xx_spi"; 77 compatible = "mpc83xx_spi";
78 reg = <7000 1000>; 78 reg = <7000 1000>;
79 interrupts = <10 8>; 79 interrupts = <10 8>;
80 interrupt-parent = <700>; 80 interrupt-parent = < &ipic >;
81 mode = <0>; 81 mode = <0>;
82 }; 82 };
83 83
@@ -88,8 +88,8 @@
88 reg = <23000 1000>; 88 reg = <23000 1000>;
89 #address-cells = <1>; 89 #address-cells = <1>;
90 #size-cells = <0>; 90 #size-cells = <0>;
91 interrupt-parent = <700>; 91 interrupt-parent = < &ipic >;
92 interrupts = <26 2>; 92 interrupts = <26 8>;
93 phy_type = "utmi_wide"; 93 phy_type = "utmi_wide";
94 }; 94 };
95 95
@@ -99,18 +99,15 @@
99 reg = <24520 20>; 99 reg = <24520 20>;
100 #address-cells = <1>; 100 #address-cells = <1>;
101 #size-cells = <0>; 101 #size-cells = <0>;
102 linux,phandle = <24520>; 102 phy1: ethernet-phy@1 {
103 ethernet-phy@1 { 103 interrupt-parent = < &ipic >;
104 linux,phandle = <2452001>; 104 interrupts = <13 8>;
105 interrupt-parent = <700>;
106 interrupts = <13 2>;
107 reg = <1>; 105 reg = <1>;
108 device_type = "ethernet-phy"; 106 device_type = "ethernet-phy";
109 }; 107 };
110 ethernet-phy@4 { 108 phy4: ethernet-phy@4 {
111 linux,phandle = <2452004>; 109 interrupt-parent = < &ipic >;
112 interrupt-parent = <700>; 110 interrupts = <14 8>;
113 interrupts = <14 2>;
114 reg = <4>; 111 reg = <4>;
115 device_type = "ethernet-phy"; 112 device_type = "ethernet-phy";
116 }; 113 };
@@ -123,8 +120,8 @@
123 reg = <24000 1000>; 120 reg = <24000 1000>;
124 local-mac-address = [ 00 00 00 00 00 00 ]; 121 local-mac-address = [ 00 00 00 00 00 00 ];
125 interrupts = <25 8 24 8 23 8>; 122 interrupts = <25 8 24 8 23 8>;
126 interrupt-parent = <700>; 123 interrupt-parent = < &ipic >;
127 phy-handle = <2452001>; 124 phy-handle = < &phy1 >;
128 }; 125 };
129 126
130 ethernet@25000 { 127 ethernet@25000 {
@@ -134,8 +131,8 @@
134 reg = <25000 1000>; 131 reg = <25000 1000>;
135 local-mac-address = [ 00 00 00 00 00 00 ]; 132 local-mac-address = [ 00 00 00 00 00 00 ];
136 interrupts = <22 8 21 8 20 8>; 133 interrupts = <22 8 21 8 20 8>;
137 interrupt-parent = <700>; 134 interrupt-parent = < &ipic >;
138 phy-handle = <2452004>; 135 phy-handle = < &phy4 >;
139 }; 136 };
140 137
141 serial@4500 { 138 serial@4500 {
@@ -144,7 +141,7 @@
144 reg = <4500 100>; 141 reg = <4500 100>;
145 clock-frequency = <0>; 142 clock-frequency = <0>;
146 interrupts = <9 8>; 143 interrupts = <9 8>;
147 interrupt-parent = <700>; 144 interrupt-parent = < &ipic >;
148 }; 145 };
149 146
150 serial@4600 { 147 serial@4600 {
@@ -153,7 +150,7 @@
153 reg = <4600 100>; 150 reg = <4600 100>;
154 clock-frequency = <0>; 151 clock-frequency = <0>;
155 interrupts = <a 8>; 152 interrupts = <a 8>;
156 interrupt-parent = <700>; 153 interrupt-parent = < &ipic >;
157 }; 154 };
158 155
159 pci@8500 { 156 pci@8500 {
@@ -161,17 +158,17 @@
161 interrupt-map = < 158 interrupt-map = <
162 159
163 /* IDSEL 0x0E -mini PCI */ 160 /* IDSEL 0x0E -mini PCI */
164 7000 0 0 1 700 12 8 161 7000 0 0 1 &ipic 12 8
165 7000 0 0 2 700 12 8 162 7000 0 0 2 &ipic 12 8
166 7000 0 0 3 700 12 8 163 7000 0 0 3 &ipic 12 8
167 7000 0 0 4 700 12 8 164 7000 0 0 4 &ipic 12 8
168 165
169 /* IDSEL 0x0F - PCI slot */ 166 /* IDSEL 0x0F - PCI slot */
170 7800 0 0 1 700 11 8 167 7800 0 0 1 &ipic 11 8
171 7800 0 0 2 700 12 8 168 7800 0 0 2 &ipic 12 8
172 7800 0 0 3 700 11 8 169 7800 0 0 3 &ipic 11 8
173 7800 0 0 4 700 12 8>; 170 7800 0 0 4 &ipic 12 8>;
174 interrupt-parent = <700>; 171 interrupt-parent = < &ipic >;
175 interrupts = <42 8>; 172 interrupts = <42 8>;
176 bus-range = <0 0>; 173 bus-range = <0 0>;
177 ranges = <02000000 0 90000000 90000000 0 10000000 174 ranges = <02000000 0 90000000 90000000 0 10000000
@@ -192,7 +189,7 @@
192 compatible = "talitos"; 189 compatible = "talitos";
193 reg = <30000 7000>; 190 reg = <30000 7000>;
194 interrupts = <b 8>; 191 interrupts = <b 8>;
195 interrupt-parent = <700>; 192 interrupt-parent = < &ipic >;
196 /* Rev. 2.2 */ 193 /* Rev. 2.2 */
197 num-channels = <1>; 194 num-channels = <1>;
198 channel-fifo-len = <18>; 195 channel-fifo-len = <18>;
@@ -206,8 +203,7 @@
206 * sense == 8: Level, low assertion 203 * sense == 8: Level, low assertion
207 * sense == 2: Edge, high-to-low change 204 * sense == 2: Edge, high-to-low change
208 */ 205 */
209 pic@700 { 206 ipic: pic@700 {
210 linux,phandle = <700>;
211 interrupt-controller; 207 interrupt-controller;
212 #address-cells = <0>; 208 #address-cells = <0>;
213 #interrupt-cells = <2>; 209 #interrupt-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8323emds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 57a3665f82ed..06b310698a02 100644
--- a/arch/powerpc/boot/dts/mpc8323emds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -11,16 +11,14 @@
11 11
12/ { 12/ {
13 model = "MPC8323EMDS"; 13 model = "MPC8323EMDS";
14 compatible = "MPC83xx"; 14 compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS";
15 #address-cells = <1>; 15 #address-cells = <1>;
16 #size-cells = <1>; 16 #size-cells = <1>;
17 linux,phandle = <100>;
18 17
19 cpus { 18 cpus {
20 #cpus = <1>; 19 #cpus = <1>;
21 #address-cells = <1>; 20 #address-cells = <1>;
22 #size-cells = <0>; 21 #size-cells = <0>;
23 linux,phandle = <200>;
24 22
25 PowerPC,8323@0 { 23 PowerPC,8323@0 {
26 device_type = "cpu"; 24 device_type = "cpu";
@@ -33,13 +31,11 @@
33 bus-frequency = <0>; 31 bus-frequency = <0>;
34 clock-frequency = <0>; 32 clock-frequency = <0>;
35 32-bit; 33 32-bit;
36 linux,phandle = <201>;
37 }; 34 };
38 }; 35 };
39 36
40 memory { 37 memory {
41 device_type = "memory"; 38 device_type = "memory";
42 linux,phandle = <300>;
43 reg = <00000000 08000000>; 39 reg = <00000000 08000000>;
44 }; 40 };
45 41
@@ -68,7 +64,7 @@
68 compatible = "fsl-i2c"; 64 compatible = "fsl-i2c";
69 reg = <3000 100>; 65 reg = <3000 100>;
70 interrupts = <e 8>; 66 interrupts = <e 8>;
71 interrupt-parent = <700>; 67 interrupt-parent = < &ipic >;
72 dfsrr; 68 dfsrr;
73 }; 69 };
74 70
@@ -78,7 +74,7 @@
78 reg = <4500 100>; 74 reg = <4500 100>;
79 clock-frequency = <0>; 75 clock-frequency = <0>;
80 interrupts = <9 8>; 76 interrupts = <9 8>;
81 interrupt-parent = <700>; 77 interrupt-parent = < &ipic >;
82 }; 78 };
83 79
84 serial@4600 { 80 serial@4600 {
@@ -87,7 +83,7 @@
87 reg = <4600 100>; 83 reg = <4600 100>;
88 clock-frequency = <0>; 84 clock-frequency = <0>;
89 interrupts = <a 8>; 85 interrupts = <a 8>;
90 interrupt-parent = <700>; 86 interrupt-parent = < &ipic >;
91 }; 87 };
92 88
93 crypto@30000 { 89 crypto@30000 {
@@ -96,7 +92,7 @@
96 compatible = "talitos"; 92 compatible = "talitos";
97 reg = <30000 7000>; 93 reg = <30000 7000>;
98 interrupts = <b 8>; 94 interrupts = <b 8>;
99 interrupt-parent = <700>; 95 interrupt-parent = < &ipic >;
100 /* Rev. 2.2 */ 96 /* Rev. 2.2 */
101 num-channels = <1>; 97 num-channels = <1>;
102 channel-fifo-len = <18>; 98 channel-fifo-len = <18>;
@@ -105,51 +101,50 @@
105 }; 101 };
106 102
107 pci@8500 { 103 pci@8500 {
108 linux,phandle = <8500>;
109 interrupt-map-mask = <f800 0 0 7>; 104 interrupt-map-mask = <f800 0 0 7>;
110 interrupt-map = < 105 interrupt-map = <
111 /* IDSEL 0x11 AD17 */ 106 /* IDSEL 0x11 AD17 */
112 8800 0 0 1 700 14 8 107 8800 0 0 1 &ipic 14 8
113 8800 0 0 2 700 15 8 108 8800 0 0 2 &ipic 15 8
114 8800 0 0 3 700 16 8 109 8800 0 0 3 &ipic 16 8
115 8800 0 0 4 700 17 8 110 8800 0 0 4 &ipic 17 8
116 111
117 /* IDSEL 0x12 AD18 */ 112 /* IDSEL 0x12 AD18 */
118 9000 0 0 1 700 16 8 113 9000 0 0 1 &ipic 16 8
119 9000 0 0 2 700 17 8 114 9000 0 0 2 &ipic 17 8
120 9000 0 0 3 700 14 8 115 9000 0 0 3 &ipic 14 8
121 9000 0 0 4 700 15 8 116 9000 0 0 4 &ipic 15 8
122 117
123 /* IDSEL 0x13 AD19 */ 118 /* IDSEL 0x13 AD19 */
124 9800 0 0 1 700 17 8 119 9800 0 0 1 &ipic 17 8
125 9800 0 0 2 700 14 8 120 9800 0 0 2 &ipic 14 8
126 9800 0 0 3 700 15 8 121 9800 0 0 3 &ipic 15 8
127 9800 0 0 4 700 16 8 122 9800 0 0 4 &ipic 16 8
128 123
129 /* IDSEL 0x15 AD21*/ 124 /* IDSEL 0x15 AD21*/
130 a800 0 0 1 700 14 8 125 a800 0 0 1 &ipic 14 8
131 a800 0 0 2 700 15 8 126 a800 0 0 2 &ipic 15 8
132 a800 0 0 3 700 16 8 127 a800 0 0 3 &ipic 16 8
133 a800 0 0 4 700 17 8 128 a800 0 0 4 &ipic 17 8
134 129
135 /* IDSEL 0x16 AD22*/ 130 /* IDSEL 0x16 AD22*/
136 b000 0 0 1 700 17 8 131 b000 0 0 1 &ipic 17 8
137 b000 0 0 2 700 14 8 132 b000 0 0 2 &ipic 14 8
138 b000 0 0 3 700 15 8 133 b000 0 0 3 &ipic 15 8
139 b000 0 0 4 700 16 8 134 b000 0 0 4 &ipic 16 8
140 135
141 /* IDSEL 0x17 AD23*/ 136 /* IDSEL 0x17 AD23*/
142 b800 0 0 1 700 16 8 137 b800 0 0 1 &ipic 16 8
143 b800 0 0 2 700 17 8 138 b800 0 0 2 &ipic 17 8
144 b800 0 0 3 700 14 8 139 b800 0 0 3 &ipic 14 8
145 b800 0 0 4 700 15 8 140 b800 0 0 4 &ipic 15 8
146 141
147 /* IDSEL 0x18 AD24*/ 142 /* IDSEL 0x18 AD24*/
148 c000 0 0 1 700 15 8 143 c000 0 0 1 &ipic 15 8
149 c000 0 0 2 700 16 8 144 c000 0 0 2 &ipic 16 8
150 c000 0 0 3 700 17 8 145 c000 0 0 3 &ipic 17 8
151 c000 0 0 4 700 14 8>; 146 c000 0 0 4 &ipic 14 8>;
152 interrupt-parent = <700>; 147 interrupt-parent = < &ipic >;
153 interrupts = <42 8>; 148 interrupts = <42 8>;
154 bus-range = <0 0>; 149 bus-range = <0 0>;
155 ranges = <02000000 0 a0000000 90000000 0 10000000 150 ranges = <02000000 0 a0000000 90000000 0 10000000
@@ -164,8 +159,7 @@
164 device_type = "pci"; 159 device_type = "pci";
165 }; 160 };
166 161
167 pic@700 { 162 ipic: pic@700 {
168 linux,phandle = <700>;
169 interrupt-controller; 163 interrupt-controller;
170 #address-cells = <0>; 164 #address-cells = <0>;
171 #interrupt-cells = <2>; 165 #interrupt-cells = <2>;
@@ -179,8 +173,7 @@
179 device_type = "par_io"; 173 device_type = "par_io";
180 num-ports = <7>; 174 num-ports = <7>;
181 175
182 ucc_pin@03 { 176 pio3: ucc_pin@03 {
183 linux,phandle = <140003>;
184 pio-map = < 177 pio-map = <
185 /* port pin dir open_drain assignment has_irq */ 178 /* port pin dir open_drain assignment has_irq */
186 3 4 3 0 2 0 /* MDIO */ 179 3 4 3 0 2 0 /* MDIO */
@@ -203,8 +196,7 @@
203 1 c 1 0 1 0 /* TX_EN */ 196 1 c 1 0 1 0 /* TX_EN */
204 1 d 2 0 1 0>;/* CRS */ 197 1 d 2 0 1 0>;/* CRS */
205 }; 198 };
206 ucc_pin@04 { 199 pio4: ucc_pin@04 {
207 linux,phandle = <140004>;
208 pio-map = < 200 pio-map = <
209 /* port pin dir open_drain assignment has_irq */ 201 /* port pin dir open_drain assignment has_irq */
210 3 1f 2 0 1 0 /* RX_CLK (CLK7) */ 202 3 1f 2 0 1 0 /* RX_CLK (CLK7) */
@@ -251,7 +243,7 @@
251 compatible = "fsl_spi"; 243 compatible = "fsl_spi";
252 reg = <4c0 40>; 244 reg = <4c0 40>;
253 interrupts = <2>; 245 interrupts = <2>;
254 interrupt-parent = <80>; 246 interrupt-parent = < &qeic >;
255 mode = "cpu"; 247 mode = "cpu";
256 }; 248 };
257 249
@@ -260,7 +252,7 @@
260 compatible = "fsl_spi"; 252 compatible = "fsl_spi";
261 reg = <500 40>; 253 reg = <500 40>;
262 interrupts = <1>; 254 interrupts = <1>;
263 interrupt-parent = <80>; 255 interrupt-parent = < &qeic >;
264 mode = "cpu"; 256 mode = "cpu";
265 }; 257 };
266 258
@@ -269,7 +261,7 @@
269 compatible = "qe_udc"; 261 compatible = "qe_udc";
270 reg = <6c0 40 8B00 100>; 262 reg = <6c0 40 8B00 100>;
271 interrupts = <b>; 263 interrupts = <b>;
272 interrupt-parent = <80>; 264 interrupt-parent = < &qeic >;
273 mode = "slave"; 265 mode = "slave";
274 }; 266 };
275 267
@@ -280,12 +272,12 @@
280 device-id = <3>; 272 device-id = <3>;
281 reg = <2200 200>; 273 reg = <2200 200>;
282 interrupts = <22>; 274 interrupts = <22>;
283 interrupt-parent = <80>; 275 interrupt-parent = < &qeic >;
284 mac-address = [ 00 04 9f 00 23 23 ]; 276 mac-address = [ 00 04 9f 00 23 23 ];
285 rx-clock = <19>; 277 rx-clock = <19>;
286 tx-clock = <1a>; 278 tx-clock = <1a>;
287 phy-handle = <212003>; 279 phy-handle = < &phy3 >;
288 pio-handle = <140003>; 280 pio-handle = < &pio3 >;
289 }; 281 };
290 282
291 ucc@3200 { 283 ucc@3200 {
@@ -295,12 +287,12 @@
295 device-id = <4>; 287 device-id = <4>;
296 reg = <3000 200>; 288 reg = <3000 200>;
297 interrupts = <23>; 289 interrupts = <23>;
298 interrupt-parent = <80>; 290 interrupt-parent = < &qeic >;
299 mac-address = [ 00 11 22 33 44 55 ]; 291 mac-address = [ 00 11 22 33 44 55 ];
300 rx-clock = <17>; 292 rx-clock = <17>;
301 tx-clock = <18>; 293 tx-clock = <18>;
302 phy-handle = <212004>; 294 phy-handle = < &phy4 >;
303 pio-handle = <140004>; 295 pio-handle = < &pio4 >;
304 }; 296 };
305 297
306 mdio@2320 { 298 mdio@2320 {
@@ -310,26 +302,23 @@
310 device_type = "mdio"; 302 device_type = "mdio";
311 compatible = "ucc_geth_phy"; 303 compatible = "ucc_geth_phy";
312 304
313 ethernet-phy@03 { 305 phy3: ethernet-phy@03 {
314 linux,phandle = <212003>; 306 interrupt-parent = < &ipic >;
315 interrupt-parent = <700>; 307 interrupts = <11 8>;
316 interrupts = <11 2>;
317 reg = <3>; 308 reg = <3>;
318 device_type = "ethernet-phy"; 309 device_type = "ethernet-phy";
319 interface = <3>; //ENET_100_MII 310 interface = <3>; //ENET_100_MII
320 }; 311 };
321 ethernet-phy@04 { 312 phy4: ethernet-phy@04 {
322 linux,phandle = <212004>; 313 interrupt-parent = < &ipic >;
323 interrupt-parent = <700>; 314 interrupts = <12 8>;
324 interrupts = <12 2>;
325 reg = <4>; 315 reg = <4>;
326 device_type = "ethernet-phy"; 316 device_type = "ethernet-phy";
327 interface = <3>; 317 interface = <3>;
328 }; 318 };
329 }; 319 };
330 320
331 qeic@80 { 321 qeic: qeic@80 {
332 linux,phandle = <80>;
333 interrupt-controller; 322 interrupt-controller;
334 device_type = "qeic"; 323 device_type = "qeic";
335 #address-cells = <0>; 324 #address-cells = <0>;
@@ -338,7 +327,7 @@
338 built-in; 327 built-in;
339 big-endian; 328 big-endian;
340 interrupts = <20 8 21 8>; //high:32 low:33 329 interrupts = <20 8 21 8>; //high:32 low:33
341 interrupt-parent = <700>; 330 interrupt-parent = < &ipic >;
342 }; 331 };
343 }; 332 };
344}; 333};
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 27807fc45888..61b550bf1645 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -10,7 +10,7 @@
10 */ 10 */
11/ { 11/ {
12 model = "MPC8349EMITX"; 12 model = "MPC8349EMITX";
13 compatible = "MPC834xMITX"; 13 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
14 #address-cells = <1>; 14 #address-cells = <1>;
15 #size-cells = <1>; 15 #size-cells = <1>;
16 16
@@ -58,7 +58,7 @@
58 compatible = "fsl-i2c"; 58 compatible = "fsl-i2c";
59 reg = <3000 100>; 59 reg = <3000 100>;
60 interrupts = <e 8>; 60 interrupts = <e 8>;
61 interrupt-parent = <700>; 61 interrupt-parent = < &ipic >;
62 dfsrr; 62 dfsrr;
63 }; 63 };
64 64
@@ -67,7 +67,7 @@
67 compatible = "fsl-i2c"; 67 compatible = "fsl-i2c";
68 reg = <3100 100>; 68 reg = <3100 100>;
69 interrupts = <f 8>; 69 interrupts = <f 8>;
70 interrupt-parent = <700>; 70 interrupt-parent = < &ipic >;
71 dfsrr; 71 dfsrr;
72 }; 72 };
73 73
@@ -76,7 +76,7 @@
76 compatible = "mpc83xx_spi"; 76 compatible = "mpc83xx_spi";
77 reg = <7000 1000>; 77 reg = <7000 1000>;
78 interrupts = <10 8>; 78 interrupts = <10 8>;
79 interrupt-parent = <700>; 79 interrupt-parent = < &ipic >;
80 mode = <0>; 80 mode = <0>;
81 }; 81 };
82 82
@@ -86,8 +86,8 @@
86 reg = <22000 1000>; 86 reg = <22000 1000>;
87 #address-cells = <1>; 87 #address-cells = <1>;
88 #size-cells = <0>; 88 #size-cells = <0>;
89 interrupt-parent = <700>; 89 interrupt-parent = < &ipic >;
90 interrupts = <27 2>; 90 interrupts = <27 8>;
91 phy_type = "ulpi"; 91 phy_type = "ulpi";
92 port1; 92 port1;
93 }; 93 };
@@ -98,8 +98,8 @@
98 reg = <23000 1000>; 98 reg = <23000 1000>;
99 #address-cells = <1>; 99 #address-cells = <1>;
100 #size-cells = <0>; 100 #size-cells = <0>;
101 interrupt-parent = <700>; 101 interrupt-parent = < &ipic >;
102 interrupts = <26 2>; 102 interrupts = <26 8>;
103 phy_type = "ulpi"; 103 phy_type = "ulpi";
104 }; 104 };
105 105
@@ -109,22 +109,19 @@
109 reg = <24520 20>; 109 reg = <24520 20>;
110 #address-cells = <1>; 110 #address-cells = <1>;
111 #size-cells = <0>; 111 #size-cells = <0>;
112 linux,phandle = <24520>;
113 112
114 /* Vitesse 8201 */ 113 /* Vitesse 8201 */
115 ethernet-phy@1c { 114 phy1c: ethernet-phy@1c {
116 linux,phandle = <245201c>; 115 interrupt-parent = < &ipic >;
117 interrupt-parent = <700>; 116 interrupts = <12 8>;
118 interrupts = <12 2>;
119 reg = <1c>; 117 reg = <1c>;
120 device_type = "ethernet-phy"; 118 device_type = "ethernet-phy";
121 }; 119 };
122 120
123 /* Vitesse 7385 */ 121 /* Vitesse 7385 */
124 ethernet-phy@1f { 122 phy1f: ethernet-phy@1f {
125 linux,phandle = <245201f>; 123 interrupt-parent = < &ipic >;
126 interrupt-parent = <700>; 124 interrupts = <12 8>;
127 interrupts = <12 2>;
128 reg = <1f>; 125 reg = <1f>;
129 device_type = "ethernet-phy"; 126 device_type = "ethernet-phy";
130 }; 127 };
@@ -138,8 +135,8 @@
138 address = [ 00 00 00 00 00 00 ]; 135 address = [ 00 00 00 00 00 00 ];
139 local-mac-address = [ 00 00 00 00 00 00 ]; 136 local-mac-address = [ 00 00 00 00 00 00 ];
140 interrupts = <20 8 21 8 22 8>; 137 interrupts = <20 8 21 8 22 8>;
141 interrupt-parent = <700>; 138 interrupt-parent = < &ipic >;
142 phy-handle = <245201c>; 139 phy-handle = < &phy1c >;
143 }; 140 };
144 141
145 ethernet@25000 { 142 ethernet@25000 {
@@ -152,8 +149,8 @@
152 address = [ 00 00 00 00 00 00 ]; 149 address = [ 00 00 00 00 00 00 ];
153 local-mac-address = [ 00 00 00 00 00 00 ]; 150 local-mac-address = [ 00 00 00 00 00 00 ];
154 interrupts = <23 8 24 8 25 8>; 151 interrupts = <23 8 24 8 25 8>;
155 interrupt-parent = <700>; 152 interrupt-parent = < &ipic >;
156 phy-handle = <245201f>; 153 phy-handle = < &phy1f >;
157 }; 154 };
158 155
159 serial@4500 { 156 serial@4500 {
@@ -162,7 +159,7 @@
162 reg = <4500 100>; 159 reg = <4500 100>;
163 clock-frequency = <0>; // from bootloader 160 clock-frequency = <0>; // from bootloader
164 interrupts = <9 8>; 161 interrupts = <9 8>;
165 interrupt-parent = <700>; 162 interrupt-parent = < &ipic >;
166 }; 163 };
167 164
168 serial@4600 { 165 serial@4600 {
@@ -171,16 +168,16 @@
171 reg = <4600 100>; 168 reg = <4600 100>;
172 clock-frequency = <0>; // from bootloader 169 clock-frequency = <0>; // from bootloader
173 interrupts = <a 8>; 170 interrupts = <a 8>;
174 interrupt-parent = <700>; 171 interrupt-parent = < &ipic >;
175 }; 172 };
176 173
177 pci@8500 { 174 pci@8500 {
178 interrupt-map-mask = <f800 0 0 7>; 175 interrupt-map-mask = <f800 0 0 7>;
179 interrupt-map = < 176 interrupt-map = <
180 /* IDSEL 0x10 - SATA */ 177 /* IDSEL 0x10 - SATA */
181 8000 0 0 1 700 16 8 /* SATA_INTA */ 178 8000 0 0 1 &ipic 16 8 /* SATA_INTA */
182 >; 179 >;
183 interrupt-parent = <700>; 180 interrupt-parent = < &ipic >;
184 interrupts = <42 8>; 181 interrupts = <42 8>;
185 bus-range = <0 0>; 182 bus-range = <0 0>;
186 ranges = <42000000 0 80000000 80000000 0 10000000 183 ranges = <42000000 0 80000000 80000000 0 10000000
@@ -199,13 +196,13 @@
199 interrupt-map-mask = <f800 0 0 7>; 196 interrupt-map-mask = <f800 0 0 7>;
200 interrupt-map = < 197 interrupt-map = <
201 /* IDSEL 0x0E - MiniPCI Slot */ 198 /* IDSEL 0x0E - MiniPCI Slot */
202 7000 0 0 1 700 15 8 /* PCI_INTA */ 199 7000 0 0 1 &ipic 15 8 /* PCI_INTA */
203 200
204 /* IDSEL 0x0F - PCI Slot */ 201 /* IDSEL 0x0F - PCI Slot */
205 7800 0 0 1 700 14 8 /* PCI_INTA */ 202 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
206 7800 0 0 2 700 15 8 /* PCI_INTB */ 203 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
207 >; 204 >;
208 interrupt-parent = <700>; 205 interrupt-parent = < &ipic >;
209 interrupts = <43 8>; 206 interrupts = <43 8>;
210 bus-range = <1 1>; 207 bus-range = <1 1>;
211 ranges = <42000000 0 a0000000 a0000000 0 10000000 208 ranges = <42000000 0 a0000000 a0000000 0 10000000
@@ -226,15 +223,14 @@
226 compatible = "talitos"; 223 compatible = "talitos";
227 reg = <30000 10000>; 224 reg = <30000 10000>;
228 interrupts = <b 8>; 225 interrupts = <b 8>;
229 interrupt-parent = <700>; 226 interrupt-parent = < &ipic >;
230 num-channels = <4>; 227 num-channels = <4>;
231 channel-fifo-len = <18>; 228 channel-fifo-len = <18>;
232 exec-units-mask = <0000007e>; 229 exec-units-mask = <0000007e>;
233 descriptor-types-mask = <01010ebf>; 230 descriptor-types-mask = <01010ebf>;
234 }; 231 };
235 232
236 pic@700 { 233 ipic: pic@700 {
237 linux,phandle = <700>;
238 interrupt-controller; 234 interrupt-controller;
239 #address-cells = <0>; 235 #address-cells = <0>;
240 #interrupt-cells = <2>; 236 #interrupt-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index 3190774de1d8..b2e1a5ec3779 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -10,7 +10,7 @@
10 */ 10 */
11/ { 11/ {
12 model = "MPC8349EMITXGP"; 12 model = "MPC8349EMITXGP";
13 compatible = "MPC834xMITXGP"; 13 compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
14 #address-cells = <1>; 14 #address-cells = <1>;
15 #size-cells = <1>; 15 #size-cells = <1>;
16 16
@@ -58,7 +58,7 @@
58 compatible = "fsl-i2c"; 58 compatible = "fsl-i2c";
59 reg = <3000 100>; 59 reg = <3000 100>;
60 interrupts = <e 8>; 60 interrupts = <e 8>;
61 interrupt-parent = <700>; 61 interrupt-parent = < &ipic >;
62 dfsrr; 62 dfsrr;
63 }; 63 };
64 64
@@ -67,7 +67,7 @@
67 compatible = "fsl-i2c"; 67 compatible = "fsl-i2c";
68 reg = <3100 100>; 68 reg = <3100 100>;
69 interrupts = <f 8>; 69 interrupts = <f 8>;
70 interrupt-parent = <700>; 70 interrupt-parent = < &ipic >;
71 dfsrr; 71 dfsrr;
72 }; 72 };
73 73
@@ -76,7 +76,7 @@
76 compatible = "mpc83xx_spi"; 76 compatible = "mpc83xx_spi";
77 reg = <7000 1000>; 77 reg = <7000 1000>;
78 interrupts = <10 8>; 78 interrupts = <10 8>;
79 interrupt-parent = <700>; 79 interrupt-parent = < &ipic >;
80 mode = <0>; 80 mode = <0>;
81 }; 81 };
82 82
@@ -86,8 +86,8 @@
86 reg = <23000 1000>; 86 reg = <23000 1000>;
87 #address-cells = <1>; 87 #address-cells = <1>;
88 #size-cells = <0>; 88 #size-cells = <0>;
89 interrupt-parent = <700>; 89 interrupt-parent = < &ipic >;
90 interrupts = <26 2>; 90 interrupts = <26 8>;
91 dr_mode = "otg"; 91 dr_mode = "otg";
92 phy_type = "ulpi"; 92 phy_type = "ulpi";
93 }; 93 };
@@ -98,13 +98,11 @@
98 reg = <24520 20>; 98 reg = <24520 20>;
99 #address-cells = <1>; 99 #address-cells = <1>;
100 #size-cells = <0>; 100 #size-cells = <0>;
101 linux,phandle = <24520>;
102 101
103 /* Vitesse 8201 */ 102 /* Vitesse 8201 */
104 ethernet-phy@1c { 103 phy1c: ethernet-phy@1c {
105 linux,phandle = <245201c>; 104 interrupt-parent = < &ipic >;
106 interrupt-parent = <700>; 105 interrupts = <12 8>;
107 interrupts = <12 2>;
108 reg = <1c>; 106 reg = <1c>;
109 device_type = "ethernet-phy"; 107 device_type = "ethernet-phy";
110 }; 108 };
@@ -117,8 +115,8 @@
117 reg = <24000 1000>; 115 reg = <24000 1000>;
118 local-mac-address = [ 00 00 00 00 00 00 ]; 116 local-mac-address = [ 00 00 00 00 00 00 ];
119 interrupts = <20 8 21 8 22 8>; 117 interrupts = <20 8 21 8 22 8>;
120 interrupt-parent = <700>; 118 interrupt-parent = < &ipic >;
121 phy-handle = <245201c>; 119 phy-handle = < &phy1c >;
122 }; 120 };
123 121
124 serial@4500 { 122 serial@4500 {
@@ -127,7 +125,7 @@
127 reg = <4500 100>; 125 reg = <4500 100>;
128 clock-frequency = <0>; // from bootloader 126 clock-frequency = <0>; // from bootloader
129 interrupts = <9 8>; 127 interrupts = <9 8>;
130 interrupt-parent = <700>; 128 interrupt-parent = < &ipic >;
131 }; 129 };
132 130
133 serial@4600 { 131 serial@4600 {
@@ -136,17 +134,17 @@
136 reg = <4600 100>; 134 reg = <4600 100>;
137 clock-frequency = <0>; // from bootloader 135 clock-frequency = <0>; // from bootloader
138 interrupts = <a 8>; 136 interrupts = <a 8>;
139 interrupt-parent = <700>; 137 interrupt-parent = < &ipic >;
140 }; 138 };
141 139
142 pci@8600 { 140 pci@8600 {
143 interrupt-map-mask = <f800 0 0 7>; 141 interrupt-map-mask = <f800 0 0 7>;
144 interrupt-map = < 142 interrupt-map = <
145 /* IDSEL 0x0F - PCI Slot */ 143 /* IDSEL 0x0F - PCI Slot */
146 7800 0 0 1 700 14 8 /* PCI_INTA */ 144 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
147 7800 0 0 2 700 15 8 /* PCI_INTB */ 145 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
148 >; 146 >;
149 interrupt-parent = <700>; 147 interrupt-parent = < &ipic >;
150 interrupts = <43 8>; 148 interrupts = <43 8>;
151 bus-range = <1 1>; 149 bus-range = <1 1>;
152 ranges = <42000000 0 a0000000 a0000000 0 10000000 150 ranges = <42000000 0 a0000000 a0000000 0 10000000
@@ -167,15 +165,14 @@
167 compatible = "talitos"; 165 compatible = "talitos";
168 reg = <30000 10000>; 166 reg = <30000 10000>;
169 interrupts = <b 8>; 167 interrupts = <b 8>;
170 interrupt-parent = <700>; 168 interrupt-parent = < &ipic >;
171 num-channels = <4>; 169 num-channels = <4>;
172 channel-fifo-len = <18>; 170 channel-fifo-len = <18>;
173 exec-units-mask = <0000007e>; 171 exec-units-mask = <0000007e>;
174 descriptor-types-mask = <01010ebf>; 172 descriptor-types-mask = <01010ebf>;
175 }; 173 };
176 174
177 pic@700 { 175 ipic: pic@700 {
178 linux,phandle = <700>;
179 interrupt-controller; 176 interrupt-controller;
180 #address-cells = <0>; 177 #address-cells = <0>;
181 #interrupt-cells = <2>; 178 #interrupt-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index dc121b3cb4a9..e4b43c24bc0b 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -11,7 +11,7 @@
11 11
12/ { 12/ {
13 model = "MPC8349EMDS"; 13 model = "MPC8349EMDS";
14 compatible = "MPC834xMDS"; 14 compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
15 #address-cells = <1>; 15 #address-cells = <1>;
16 #size-cells = <1>; 16 #size-cells = <1>;
17 17
@@ -64,7 +64,7 @@
64 compatible = "fsl-i2c"; 64 compatible = "fsl-i2c";
65 reg = <3000 100>; 65 reg = <3000 100>;
66 interrupts = <e 8>; 66 interrupts = <e 8>;
67 interrupt-parent = <700>; 67 interrupt-parent = < &ipic >;
68 dfsrr; 68 dfsrr;
69 }; 69 };
70 70
@@ -73,7 +73,7 @@
73 compatible = "fsl-i2c"; 73 compatible = "fsl-i2c";
74 reg = <3100 100>; 74 reg = <3100 100>;
75 interrupts = <f 8>; 75 interrupts = <f 8>;
76 interrupt-parent = <700>; 76 interrupt-parent = < &ipic >;
77 dfsrr; 77 dfsrr;
78 }; 78 };
79 79
@@ -82,7 +82,7 @@
82 compatible = "mpc83xx_spi"; 82 compatible = "mpc83xx_spi";
83 reg = <7000 1000>; 83 reg = <7000 1000>;
84 interrupts = <10 8>; 84 interrupts = <10 8>;
85 interrupt-parent = <700>; 85 interrupt-parent = < &ipic >;
86 mode = <0>; 86 mode = <0>;
87 }; 87 };
88 88
@@ -94,8 +94,8 @@
94 reg = <22000 1000>; 94 reg = <22000 1000>;
95 #address-cells = <1>; 95 #address-cells = <1>;
96 #size-cells = <0>; 96 #size-cells = <0>;
97 interrupt-parent = <700>; 97 interrupt-parent = < &ipic >;
98 interrupts = <27 2>; 98 interrupts = <27 8>;
99 phy_type = "ulpi"; 99 phy_type = "ulpi";
100 port1; 100 port1;
101 }; 101 };
@@ -106,8 +106,8 @@
106 reg = <23000 1000>; 106 reg = <23000 1000>;
107 #address-cells = <1>; 107 #address-cells = <1>;
108 #size-cells = <0>; 108 #size-cells = <0>;
109 interrupt-parent = <700>; 109 interrupt-parent = < &ipic >;
110 interrupts = <26 2>; 110 interrupts = <26 8>;
111 dr_mode = "otg"; 111 dr_mode = "otg";
112 phy_type = "ulpi"; 112 phy_type = "ulpi";
113 }; 113 };
@@ -118,18 +118,15 @@
118 reg = <24520 20>; 118 reg = <24520 20>;
119 #address-cells = <1>; 119 #address-cells = <1>;
120 #size-cells = <0>; 120 #size-cells = <0>;
121 linux,phandle = <24520>; 121 phy0: ethernet-phy@0 {
122 ethernet-phy@0 { 122 interrupt-parent = < &ipic >;
123 linux,phandle = <2452000>; 123 interrupts = <11 8>;
124 interrupt-parent = <700>;
125 interrupts = <11 2>;
126 reg = <0>; 124 reg = <0>;
127 device_type = "ethernet-phy"; 125 device_type = "ethernet-phy";
128 }; 126 };
129 ethernet-phy@1 { 127 phy1: ethernet-phy@1 {
130 linux,phandle = <2452001>; 128 interrupt-parent = < &ipic >;
131 interrupt-parent = <700>; 129 interrupts = <12 8>;
132 interrupts = <12 2>;
133 reg = <1>; 130 reg = <1>;
134 device_type = "ethernet-phy"; 131 device_type = "ethernet-phy";
135 }; 132 };
@@ -143,8 +140,8 @@
143 address = [ 00 00 00 00 00 00 ]; 140 address = [ 00 00 00 00 00 00 ];
144 local-mac-address = [ 00 00 00 00 00 00 ]; 141 local-mac-address = [ 00 00 00 00 00 00 ];
145 interrupts = <20 8 21 8 22 8>; 142 interrupts = <20 8 21 8 22 8>;
146 interrupt-parent = <700>; 143 interrupt-parent = < &ipic >;
147 phy-handle = <2452000>; 144 phy-handle = < &phy0 >;
148 }; 145 };
149 146
150 ethernet@25000 { 147 ethernet@25000 {
@@ -157,8 +154,8 @@
157 address = [ 00 00 00 00 00 00 ]; 154 address = [ 00 00 00 00 00 00 ];
158 local-mac-address = [ 00 00 00 00 00 00 ]; 155 local-mac-address = [ 00 00 00 00 00 00 ];
159 interrupts = <23 8 24 8 25 8>; 156 interrupts = <23 8 24 8 25 8>;
160 interrupt-parent = <700>; 157 interrupt-parent = < &ipic >;
161 phy-handle = <2452001>; 158 phy-handle = < &phy1 >;
162 }; 159 };
163 160
164 serial@4500 { 161 serial@4500 {
@@ -167,7 +164,7 @@
167 reg = <4500 100>; 164 reg = <4500 100>;
168 clock-frequency = <0>; 165 clock-frequency = <0>;
169 interrupts = <9 8>; 166 interrupts = <9 8>;
170 interrupt-parent = <700>; 167 interrupt-parent = < &ipic >;
171 }; 168 };
172 169
173 serial@4600 { 170 serial@4600 {
@@ -176,7 +173,7 @@
176 reg = <4600 100>; 173 reg = <4600 100>;
177 clock-frequency = <0>; 174 clock-frequency = <0>;
178 interrupts = <a 8>; 175 interrupts = <a 8>;
179 interrupt-parent = <700>; 176 interrupt-parent = < &ipic >;
180 }; 177 };
181 178
182 pci@8500 { 179 pci@8500 {
@@ -184,47 +181,47 @@
184 interrupt-map = < 181 interrupt-map = <
185 182
186 /* IDSEL 0x11 */ 183 /* IDSEL 0x11 */
187 8800 0 0 1 700 14 8 184 8800 0 0 1 &ipic 14 8
188 8800 0 0 2 700 15 8 185 8800 0 0 2 &ipic 15 8
189 8800 0 0 3 700 16 8 186 8800 0 0 3 &ipic 16 8
190 8800 0 0 4 700 17 8 187 8800 0 0 4 &ipic 17 8
191 188
192 /* IDSEL 0x12 */ 189 /* IDSEL 0x12 */
193 9000 0 0 1 700 16 8 190 9000 0 0 1 &ipic 16 8
194 9000 0 0 2 700 17 8 191 9000 0 0 2 &ipic 17 8
195 9000 0 0 3 700 14 8 192 9000 0 0 3 &ipic 14 8
196 9000 0 0 4 700 15 8 193 9000 0 0 4 &ipic 15 8
197 194
198 /* IDSEL 0x13 */ 195 /* IDSEL 0x13 */
199 9800 0 0 1 700 17 8 196 9800 0 0 1 &ipic 17 8
200 9800 0 0 2 700 14 8 197 9800 0 0 2 &ipic 14 8
201 9800 0 0 3 700 15 8 198 9800 0 0 3 &ipic 15 8
202 9800 0 0 4 700 16 8 199 9800 0 0 4 &ipic 16 8
203 200
204 /* IDSEL 0x15 */ 201 /* IDSEL 0x15 */
205 a800 0 0 1 700 14 8 202 a800 0 0 1 &ipic 14 8
206 a800 0 0 2 700 15 8 203 a800 0 0 2 &ipic 15 8
207 a800 0 0 3 700 16 8 204 a800 0 0 3 &ipic 16 8
208 a800 0 0 4 700 17 8 205 a800 0 0 4 &ipic 17 8
209 206
210 /* IDSEL 0x16 */ 207 /* IDSEL 0x16 */
211 b000 0 0 1 700 17 8 208 b000 0 0 1 &ipic 17 8
212 b000 0 0 2 700 14 8 209 b000 0 0 2 &ipic 14 8
213 b000 0 0 3 700 15 8 210 b000 0 0 3 &ipic 15 8
214 b000 0 0 4 700 16 8 211 b000 0 0 4 &ipic 16 8
215 212
216 /* IDSEL 0x17 */ 213 /* IDSEL 0x17 */
217 b800 0 0 1 700 16 8 214 b800 0 0 1 &ipic 16 8
218 b800 0 0 2 700 17 8 215 b800 0 0 2 &ipic 17 8
219 b800 0 0 3 700 14 8 216 b800 0 0 3 &ipic 14 8
220 b800 0 0 4 700 15 8 217 b800 0 0 4 &ipic 15 8
221 218
222 /* IDSEL 0x18 */ 219 /* IDSEL 0x18 */
223 c000 0 0 1 700 15 8 220 c000 0 0 1 &ipic 15 8
224 c000 0 0 2 700 16 8 221 c000 0 0 2 &ipic 16 8
225 c000 0 0 3 700 17 8 222 c000 0 0 3 &ipic 17 8
226 c000 0 0 4 700 14 8>; 223 c000 0 0 4 &ipic 14 8>;
227 interrupt-parent = <700>; 224 interrupt-parent = < &ipic >;
228 interrupts = <42 8>; 225 interrupts = <42 8>;
229 bus-range = <0 0>; 226 bus-range = <0 0>;
230 ranges = <02000000 0 a0000000 a0000000 0 10000000 227 ranges = <02000000 0 a0000000 a0000000 0 10000000
@@ -244,47 +241,47 @@
244 interrupt-map = < 241 interrupt-map = <
245 242
246 /* IDSEL 0x11 */ 243 /* IDSEL 0x11 */
247 8800 0 0 1 700 14 8 244 8800 0 0 1 &ipic 14 8
248 8800 0 0 2 700 15 8 245 8800 0 0 2 &ipic 15 8
249 8800 0 0 3 700 16 8 246 8800 0 0 3 &ipic 16 8
250 8800 0 0 4 700 17 8 247 8800 0 0 4 &ipic 17 8
251 248
252 /* IDSEL 0x12 */ 249 /* IDSEL 0x12 */
253 9000 0 0 1 700 16 8 250 9000 0 0 1 &ipic 16 8
254 9000 0 0 2 700 17 8 251 9000 0 0 2 &ipic 17 8
255 9000 0 0 3 700 14 8 252 9000 0 0 3 &ipic 14 8
256 9000 0 0 4 700 15 8 253 9000 0 0 4 &ipic 15 8
257 254
258 /* IDSEL 0x13 */ 255 /* IDSEL 0x13 */
259 9800 0 0 1 700 17 8 256 9800 0 0 1 &ipic 17 8
260 9800 0 0 2 700 14 8 257 9800 0 0 2 &ipic 14 8
261 9800 0 0 3 700 15 8 258 9800 0 0 3 &ipic 15 8
262 9800 0 0 4 700 16 8 259 9800 0 0 4 &ipic 16 8
263 260
264 /* IDSEL 0x15 */ 261 /* IDSEL 0x15 */
265 a800 0 0 1 700 14 8 262 a800 0 0 1 &ipic 14 8
266 a800 0 0 2 700 15 8 263 a800 0 0 2 &ipic 15 8
267 a800 0 0 3 700 16 8 264 a800 0 0 3 &ipic 16 8
268 a800 0 0 4 700 17 8 265 a800 0 0 4 &ipic 17 8
269 266
270 /* IDSEL 0x16 */ 267 /* IDSEL 0x16 */
271 b000 0 0 1 700 17 8 268 b000 0 0 1 &ipic 17 8
272 b000 0 0 2 700 14 8 269 b000 0 0 2 &ipic 14 8
273 b000 0 0 3 700 15 8 270 b000 0 0 3 &ipic 15 8
274 b000 0 0 4 700 16 8 271 b000 0 0 4 &ipic 16 8
275 272
276 /* IDSEL 0x17 */ 273 /* IDSEL 0x17 */
277 b800 0 0 1 700 16 8 274 b800 0 0 1 &ipic 16 8
278 b800 0 0 2 700 17 8 275 b800 0 0 2 &ipic 17 8
279 b800 0 0 3 700 14 8 276 b800 0 0 3 &ipic 14 8
280 b800 0 0 4 700 15 8 277 b800 0 0 4 &ipic 15 8
281 278
282 /* IDSEL 0x18 */ 279 /* IDSEL 0x18 */
283 c000 0 0 1 700 15 8 280 c000 0 0 1 &ipic 15 8
284 c000 0 0 2 700 16 8 281 c000 0 0 2 &ipic 16 8
285 c000 0 0 3 700 17 8 282 c000 0 0 3 &ipic 17 8
286 c000 0 0 4 700 14 8>; 283 c000 0 0 4 &ipic 14 8>;
287 interrupt-parent = <700>; 284 interrupt-parent = < &ipic >;
288 interrupts = <42 8>; 285 interrupts = <42 8>;
289 bus-range = <0 0>; 286 bus-range = <0 0>;
290 ranges = <02000000 0 b0000000 b0000000 0 10000000 287 ranges = <02000000 0 b0000000 b0000000 0 10000000
@@ -306,7 +303,7 @@
306 compatible = "talitos"; 303 compatible = "talitos";
307 reg = <30000 10000>; 304 reg = <30000 10000>;
308 interrupts = <b 8>; 305 interrupts = <b 8>;
309 interrupt-parent = <700>; 306 interrupt-parent = < &ipic >;
310 num-channels = <4>; 307 num-channels = <4>;
311 channel-fifo-len = <18>; 308 channel-fifo-len = <18>;
312 exec-units-mask = <0000007e>; 309 exec-units-mask = <0000007e>;
@@ -321,8 +318,7 @@
321 * sense == 8: Level, low assertion 318 * sense == 8: Level, low assertion
322 * sense == 2: Edge, high-to-low change 319 * sense == 2: Edge, high-to-low change
323 */ 320 */
324 pic@700 { 321 ipic: pic@700 {
325 linux,phandle = <700>;
326 interrupt-controller; 322 interrupt-controller;
327 #address-cells = <0>; 323 #address-cells = <0>;
328 #interrupt-cells = <2>; 324 #interrupt-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8360emds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 303bd668deb7..4fe45c021848 100644
--- a/arch/powerpc/boot/dts/mpc8360emds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -15,17 +15,15 @@
15*/ 15*/
16 16
17/ { 17/ {
18 model = "MPC8360EPB"; 18 model = "MPC8360MDS";
19 compatible = "MPC83xx"; 19 compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
20 #address-cells = <1>; 20 #address-cells = <1>;
21 #size-cells = <1>; 21 #size-cells = <1>;
22 linux,phandle = <100>;
23 22
24 cpus { 23 cpus {
25 #cpus = <1>; 24 #cpus = <1>;
26 #address-cells = <1>; 25 #address-cells = <1>;
27 #size-cells = <0>; 26 #size-cells = <0>;
28 linux,phandle = <200>;
29 27
30 PowerPC,8360@0 { 28 PowerPC,8360@0 {
31 device_type = "cpu"; 29 device_type = "cpu";
@@ -38,13 +36,11 @@
38 bus-frequency = <FBC5200>; 36 bus-frequency = <FBC5200>;
39 clock-frequency = <1F78A400>; 37 clock-frequency = <1F78A400>;
40 32-bit; 38 32-bit;
41 linux,phandle = <201>;
42 }; 39 };
43 }; 40 };
44 41
45 memory { 42 memory {
46 device_type = "memory"; 43 device_type = "memory";
47 linux,phandle = <300>;
48 reg = <00000000 10000000>; 44 reg = <00000000 10000000>;
49 }; 45 };
50 46
@@ -73,7 +69,7 @@
73 compatible = "fsl-i2c"; 69 compatible = "fsl-i2c";
74 reg = <3000 100>; 70 reg = <3000 100>;
75 interrupts = <e 8>; 71 interrupts = <e 8>;
76 interrupt-parent = <700>; 72 interrupt-parent = < &ipic >;
77 dfsrr; 73 dfsrr;
78 }; 74 };
79 75
@@ -82,7 +78,7 @@
82 compatible = "fsl-i2c"; 78 compatible = "fsl-i2c";
83 reg = <3100 100>; 79 reg = <3100 100>;
84 interrupts = <f 8>; 80 interrupts = <f 8>;
85 interrupt-parent = <700>; 81 interrupt-parent = < &ipic >;
86 dfsrr; 82 dfsrr;
87 }; 83 };
88 84
@@ -92,7 +88,7 @@
92 reg = <4500 100>; 88 reg = <4500 100>;
93 clock-frequency = <FBC5200>; 89 clock-frequency = <FBC5200>;
94 interrupts = <9 8>; 90 interrupts = <9 8>;
95 interrupt-parent = <700>; 91 interrupt-parent = < &ipic >;
96 }; 92 };
97 93
98 serial@4600 { 94 serial@4600 {
@@ -101,7 +97,7 @@
101 reg = <4600 100>; 97 reg = <4600 100>;
102 clock-frequency = <FBC5200>; 98 clock-frequency = <FBC5200>;
103 interrupts = <a 8>; 99 interrupts = <a 8>;
104 interrupt-parent = <700>; 100 interrupt-parent = < &ipic >;
105 }; 101 };
106 102
107 crypto@30000 { 103 crypto@30000 {
@@ -110,7 +106,7 @@
110 compatible = "talitos"; 106 compatible = "talitos";
111 reg = <30000 10000>; 107 reg = <30000 10000>;
112 interrupts = <b 8>; 108 interrupts = <b 8>;
113 interrupt-parent = <700>; 109 interrupt-parent = < &ipic >;
114 num-channels = <4>; 110 num-channels = <4>;
115 channel-fifo-len = <18>; 111 channel-fifo-len = <18>;
116 exec-units-mask = <0000007e>; 112 exec-units-mask = <0000007e>;
@@ -119,52 +115,51 @@
119 }; 115 };
120 116
121 pci@8500 { 117 pci@8500 {
122 linux,phandle = <8500>;
123 interrupt-map-mask = <f800 0 0 7>; 118 interrupt-map-mask = <f800 0 0 7>;
124 interrupt-map = < 119 interrupt-map = <
125 120
126 /* IDSEL 0x11 AD17 */ 121 /* IDSEL 0x11 AD17 */
127 8800 0 0 1 700 14 8 122 8800 0 0 1 &ipic 14 8
128 8800 0 0 2 700 15 8 123 8800 0 0 2 &ipic 15 8
129 8800 0 0 3 700 16 8 124 8800 0 0 3 &ipic 16 8
130 8800 0 0 4 700 17 8 125 8800 0 0 4 &ipic 17 8
131 126
132 /* IDSEL 0x12 AD18 */ 127 /* IDSEL 0x12 AD18 */
133 9000 0 0 1 700 16 8 128 9000 0 0 1 &ipic 16 8
134 9000 0 0 2 700 17 8 129 9000 0 0 2 &ipic 17 8
135 9000 0 0 3 700 14 8 130 9000 0 0 3 &ipic 14 8
136 9000 0 0 4 700 15 8 131 9000 0 0 4 &ipic 15 8
137 132
138 /* IDSEL 0x13 AD19 */ 133 /* IDSEL 0x13 AD19 */
139 9800 0 0 1 700 17 8 134 9800 0 0 1 &ipic 17 8
140 9800 0 0 2 700 14 8 135 9800 0 0 2 &ipic 14 8
141 9800 0 0 3 700 15 8 136 9800 0 0 3 &ipic 15 8
142 9800 0 0 4 700 16 8 137 9800 0 0 4 &ipic 16 8
143 138
144 /* IDSEL 0x15 AD21*/ 139 /* IDSEL 0x15 AD21*/
145 a800 0 0 1 700 14 8 140 a800 0 0 1 &ipic 14 8
146 a800 0 0 2 700 15 8 141 a800 0 0 2 &ipic 15 8
147 a800 0 0 3 700 16 8 142 a800 0 0 3 &ipic 16 8
148 a800 0 0 4 700 17 8 143 a800 0 0 4 &ipic 17 8
149 144
150 /* IDSEL 0x16 AD22*/ 145 /* IDSEL 0x16 AD22*/
151 b000 0 0 1 700 17 8 146 b000 0 0 1 &ipic 17 8
152 b000 0 0 2 700 14 8 147 b000 0 0 2 &ipic 14 8
153 b000 0 0 3 700 15 8 148 b000 0 0 3 &ipic 15 8
154 b000 0 0 4 700 16 8 149 b000 0 0 4 &ipic 16 8
155 150
156 /* IDSEL 0x17 AD23*/ 151 /* IDSEL 0x17 AD23*/
157 b800 0 0 1 700 16 8 152 b800 0 0 1 &ipic 16 8
158 b800 0 0 2 700 17 8 153 b800 0 0 2 &ipic 17 8
159 b800 0 0 3 700 14 8 154 b800 0 0 3 &ipic 14 8
160 b800 0 0 4 700 15 8 155 b800 0 0 4 &ipic 15 8
161 156
162 /* IDSEL 0x18 AD24*/ 157 /* IDSEL 0x18 AD24*/
163 c000 0 0 1 700 15 8 158 c000 0 0 1 &ipic 15 8
164 c000 0 0 2 700 16 8 159 c000 0 0 2 &ipic 16 8
165 c000 0 0 3 700 17 8 160 c000 0 0 3 &ipic 17 8
166 c000 0 0 4 700 14 8>; 161 c000 0 0 4 &ipic 14 8>;
167 interrupt-parent = <700>; 162 interrupt-parent = < &ipic >;
168 interrupts = <42 8>; 163 interrupts = <42 8>;
169 bus-range = <0 0>; 164 bus-range = <0 0>;
170 ranges = <02000000 0 a0000000 a0000000 0 10000000 165 ranges = <02000000 0 a0000000 a0000000 0 10000000
@@ -179,8 +174,7 @@
179 device_type = "pci"; 174 device_type = "pci";
180 }; 175 };
181 176
182 pic@700 { 177 ipic: pic@700 {
183 linux,phandle = <700>;
184 interrupt-controller; 178 interrupt-controller;
185 #address-cells = <0>; 179 #address-cells = <0>;
186 #interrupt-cells = <2>; 180 #interrupt-cells = <2>;
@@ -194,8 +188,7 @@
194 device_type = "par_io"; 188 device_type = "par_io";
195 num-ports = <7>; 189 num-ports = <7>;
196 190
197 ucc_pin@01 { 191 pio1: ucc_pin@01 {
198 linux,phandle = <140001>;
199 pio-map = < 192 pio-map = <
200 /* port pin dir open_drain assignment has_irq */ 193 /* port pin dir open_drain assignment has_irq */
201 0 3 1 0 1 0 /* TxD0 */ 194 0 3 1 0 1 0 /* TxD0 */
@@ -222,8 +215,7 @@
222 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ 215 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
223 2 8 2 0 1 0>; /* GTX125 - CLK9 */ 216 2 8 2 0 1 0>; /* GTX125 - CLK9 */
224 }; 217 };
225 ucc_pin@02 { 218 pio2: ucc_pin@02 {
226 linux,phandle = <140002>;
227 pio-map = < 219 pio-map = <
228 /* port pin dir open_drain assignment has_irq */ 220 /* port pin dir open_drain assignment has_irq */
229 0 11 1 0 1 0 /* TxD0 */ 221 0 11 1 0 1 0 /* TxD0 */
@@ -280,7 +272,7 @@
280 compatible = "fsl_spi"; 272 compatible = "fsl_spi";
281 reg = <4c0 40>; 273 reg = <4c0 40>;
282 interrupts = <2>; 274 interrupts = <2>;
283 interrupt-parent = <80>; 275 interrupt-parent = < &qeic >;
284 mode = "cpu"; 276 mode = "cpu";
285 }; 277 };
286 278
@@ -289,7 +281,7 @@
289 compatible = "fsl_spi"; 281 compatible = "fsl_spi";
290 reg = <500 40>; 282 reg = <500 40>;
291 interrupts = <1>; 283 interrupts = <1>;
292 interrupt-parent = <80>; 284 interrupt-parent = < &qeic >;
293 mode = "cpu"; 285 mode = "cpu";
294 }; 286 };
295 287
@@ -298,7 +290,7 @@
298 compatible = "qe_udc"; 290 compatible = "qe_udc";
299 reg = <6c0 40 8B00 100>; 291 reg = <6c0 40 8B00 100>;
300 interrupts = <b>; 292 interrupts = <b>;
301 interrupt-parent = <80>; 293 interrupt-parent = < &qeic >;
302 mode = "slave"; 294 mode = "slave";
303 }; 295 };
304 296
@@ -309,12 +301,12 @@
309 device-id = <1>; 301 device-id = <1>;
310 reg = <2000 200>; 302 reg = <2000 200>;
311 interrupts = <20>; 303 interrupts = <20>;
312 interrupt-parent = <80>; 304 interrupt-parent = < &qeic >;
313 mac-address = [ 00 04 9f 00 23 23 ]; 305 mac-address = [ 00 04 9f 00 23 23 ];
314 rx-clock = <0>; 306 rx-clock = <0>;
315 tx-clock = <19>; 307 tx-clock = <19>;
316 phy-handle = <212000>; 308 phy-handle = < &phy0 >;
317 pio-handle = <140001>; 309 pio-handle = < &pio1 >;
318 }; 310 };
319 311
320 ucc@3000 { 312 ucc@3000 {
@@ -324,12 +316,12 @@
324 device-id = <2>; 316 device-id = <2>;
325 reg = <3000 200>; 317 reg = <3000 200>;
326 interrupts = <21>; 318 interrupts = <21>;
327 interrupt-parent = <80>; 319 interrupt-parent = < &qeic >;
328 mac-address = [ 00 11 22 33 44 55 ]; 320 mac-address = [ 00 11 22 33 44 55 ];
329 rx-clock = <0>; 321 rx-clock = <0>;
330 tx-clock = <14>; 322 tx-clock = <14>;
331 phy-handle = <212001>; 323 phy-handle = < &phy1 >;
332 pio-handle = <140002>; 324 pio-handle = < &pio2 >;
333 }; 325 };
334 326
335 mdio@2120 { 327 mdio@2120 {
@@ -339,26 +331,23 @@
339 device_type = "mdio"; 331 device_type = "mdio";
340 compatible = "ucc_geth_phy"; 332 compatible = "ucc_geth_phy";
341 333
342 ethernet-phy@00 { 334 phy0: ethernet-phy@00 {
343 linux,phandle = <212000>; 335 interrupt-parent = < &ipic >;
344 interrupt-parent = <700>; 336 interrupts = <11 8>;
345 interrupts = <11 2>;
346 reg = <0>; 337 reg = <0>;
347 device_type = "ethernet-phy"; 338 device_type = "ethernet-phy";
348 interface = <6>; //ENET_1000_GMII 339 interface = <6>; //ENET_1000_GMII
349 }; 340 };
350 ethernet-phy@01 { 341 phy1: ethernet-phy@01 {
351 linux,phandle = <212001>; 342 interrupt-parent = < &ipic >;
352 interrupt-parent = <700>; 343 interrupts = <12 8>;
353 interrupts = <12 2>;
354 reg = <1>; 344 reg = <1>;
355 device_type = "ethernet-phy"; 345 device_type = "ethernet-phy";
356 interface = <6>; 346 interface = <6>;
357 }; 347 };
358 }; 348 };
359 349
360 qeic@80 { 350 qeic: qeic@80 {
361 linux,phandle = <80>;
362 interrupt-controller; 351 interrupt-controller;
363 device_type = "qeic"; 352 device_type = "qeic";
364 #address-cells = <0>; 353 #address-cells = <0>;
@@ -367,7 +356,7 @@
367 built-in; 356 built-in;
368 big-endian; 357 big-endian;
369 interrupts = <20 8 21 8>; //high:32 low:33 358 interrupts = <20 8 21 8>; //high:32 low:33
370 interrupt-parent = <700>; 359 interrupt-parent = < &ipic >;
371 }; 360 };
372 361
373 }; 362 };
diff --git a/arch/powerpc/configs/mpc832xemds_defconfig b/arch/powerpc/configs/mpc832x_mds_defconfig
index e1b36de6b38c..e1b36de6b38c 100644
--- a/arch/powerpc/configs/mpc832xemds_defconfig
+++ b/arch/powerpc/configs/mpc832x_mds_defconfig
diff --git a/arch/powerpc/configs/mpc8360emds_defconfig b/arch/powerpc/configs/mpc836x_mds_defconfig
index bbe38ccc3d86..8eb475cd0df0 100644
--- a/arch/powerpc/configs/mpc8360emds_defconfig
+++ b/arch/powerpc/configs/mpc836x_mds_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20-rc5 3# Linux kernel version: 2.6.20
4# Fri Jan 26 00:19:45 2007 4# Sat Feb 17 10:09:26 2007
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7CONFIG_PPC32=y 7CONFIG_PPC32=y
@@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y
34CONFIG_PPC_83xx=y 34CONFIG_PPC_83xx=y
35# CONFIG_PPC_85xx is not set 35# CONFIG_PPC_85xx is not set
36# CONFIG_PPC_86xx is not set 36# CONFIG_PPC_86xx is not set
37# CONFIG_PPC_8xx is not set
37# CONFIG_40x is not set 38# CONFIG_40x is not set
38# CONFIG_44x is not set 39# CONFIG_44x is not set
39# CONFIG_8xx is not set
40# CONFIG_E200 is not set 40# CONFIG_E200 is not set
41CONFIG_6xx=y 41CONFIG_6xx=y
42CONFIG_83xx=y 42CONFIG_83xx=y
@@ -63,6 +63,7 @@ CONFIG_LOCALVERSION_AUTO=y
63CONFIG_SWAP=y 63CONFIG_SWAP=y
64CONFIG_SYSVIPC=y 64CONFIG_SYSVIPC=y
65# CONFIG_IPC_NS is not set 65# CONFIG_IPC_NS is not set
66CONFIG_SYSVIPC_SYSCTL=y
66# CONFIG_POSIX_MQUEUE is not set 67# CONFIG_POSIX_MQUEUE is not set
67# CONFIG_BSD_PROCESS_ACCT is not set 68# CONFIG_BSD_PROCESS_ACCT is not set
68# CONFIG_TASKSTATS is not set 69# CONFIG_TASKSTATS is not set
@@ -129,10 +130,11 @@ CONFIG_PPC_GEN550=y
129# 130#
130# Platform support 131# Platform support
131# 132#
133# CONFIG_MPC8313_RDB is not set
132# CONFIG_MPC832x_MDS is not set 134# CONFIG_MPC832x_MDS is not set
133# CONFIG_MPC834x_SYS is not set 135# CONFIG_MPC834x_MDS is not set
134# CONFIG_MPC834x_ITX is not set 136# CONFIG_MPC834x_ITX is not set
135CONFIG_MPC8360E_PB=y 137CONFIG_MPC836x_MDS=y
136CONFIG_PPC_MPC836x=y 138CONFIG_PPC_MPC836x=y
137# CONFIG_MPIC is not set 139# CONFIG_MPIC is not set
138 140
@@ -162,6 +164,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
162# CONFIG_SPARSEMEM_STATIC is not set 164# CONFIG_SPARSEMEM_STATIC is not set
163CONFIG_SPLIT_PTLOCK_CPUS=4 165CONFIG_SPLIT_PTLOCK_CPUS=4
164# CONFIG_RESOURCES_64BIT is not set 166# CONFIG_RESOURCES_64BIT is not set
167CONFIG_ZONE_DMA_FLAG=1
165CONFIG_PROC_DEVICETREE=y 168CONFIG_PROC_DEVICETREE=y
166# CONFIG_CMDLINE_BOOL is not set 169# CONFIG_CMDLINE_BOOL is not set
167# CONFIG_PM is not set 170# CONFIG_PM is not set
@@ -171,6 +174,7 @@ CONFIG_ISA_DMA_API=y
171# 174#
172# Bus options 175# Bus options
173# 176#
177CONFIG_ZONE_DMA=y
174CONFIG_GENERIC_ISA_DMA=y 178CONFIG_GENERIC_ISA_DMA=y
175# CONFIG_MPIC_WEIRD is not set 179# CONFIG_MPIC_WEIRD is not set
176# CONFIG_PPC_I8259 is not set 180# CONFIG_PPC_I8259 is not set
@@ -219,6 +223,7 @@ CONFIG_UNIX=y
219CONFIG_XFRM=y 223CONFIG_XFRM=y
220# CONFIG_XFRM_USER is not set 224# CONFIG_XFRM_USER is not set
221# CONFIG_XFRM_SUB_POLICY is not set 225# CONFIG_XFRM_SUB_POLICY is not set
226# CONFIG_XFRM_MIGRATE is not set
222# CONFIG_NET_KEY is not set 227# CONFIG_NET_KEY is not set
223CONFIG_INET=y 228CONFIG_INET=y
224CONFIG_IP_MULTICAST=y 229CONFIG_IP_MULTICAST=y
@@ -528,6 +533,7 @@ CONFIG_UCC_GETH=y
528# Ethernet (10000 Mbit) 533# Ethernet (10000 Mbit)
529# 534#
530# CONFIG_CHELSIO_T1 is not set 535# CONFIG_CHELSIO_T1 is not set
536# CONFIG_CHELSIO_T3 is not set
531# CONFIG_IXGB is not set 537# CONFIG_IXGB is not set
532# CONFIG_S2IO is not set 538# CONFIG_S2IO is not set
533# CONFIG_MYRI10GE is not set 539# CONFIG_MYRI10GE is not set
@@ -620,6 +626,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
620CONFIG_SERIAL_CORE=y 626CONFIG_SERIAL_CORE=y
621CONFIG_SERIAL_CORE_CONSOLE=y 627CONFIG_SERIAL_CORE_CONSOLE=y
622# CONFIG_SERIAL_JSM is not set 628# CONFIG_SERIAL_JSM is not set
629# CONFIG_SERIAL_OF_PLATFORM is not set
623CONFIG_UNIX98_PTYS=y 630CONFIG_UNIX98_PTYS=y
624CONFIG_LEGACY_PTYS=y 631CONFIG_LEGACY_PTYS=y
625CONFIG_LEGACY_PTY_COUNT=256 632CONFIG_LEGACY_PTY_COUNT=256
@@ -690,6 +697,7 @@ CONFIG_I2C_MPC=y
690# CONFIG_I2C_NFORCE2 is not set 697# CONFIG_I2C_NFORCE2 is not set
691# CONFIG_I2C_OCORES is not set 698# CONFIG_I2C_OCORES is not set
692# CONFIG_I2C_PARPORT_LIGHT is not set 699# CONFIG_I2C_PARPORT_LIGHT is not set
700# CONFIG_I2C_PASEMI is not set
693# CONFIG_I2C_PROSAVAGE is not set 701# CONFIG_I2C_PROSAVAGE is not set
694# CONFIG_I2C_SAVAGE4 is not set 702# CONFIG_I2C_SAVAGE4 is not set
695# CONFIG_I2C_SIS5595 is not set 703# CONFIG_I2C_SIS5595 is not set
@@ -804,6 +812,7 @@ CONFIG_FIRMWARE_EDID=y
804# HID Devices 812# HID Devices
805# 813#
806CONFIG_HID=y 814CONFIG_HID=y
815# CONFIG_HID_DEBUG is not set
807 816
808# 817#
809# USB support 818# USB support
@@ -868,6 +877,10 @@ CONFIG_USB_ARCH_HAS_EHCI=y
868# 877#
869 878
870# 879#
880# Auxiliary Display support
881#
882
883#
871# Virtualization 884# Virtualization
872# 885#
873 886
@@ -1011,7 +1024,8 @@ CONFIG_BITREVERSE=y
1011CONFIG_CRC32=y 1024CONFIG_CRC32=y
1012# CONFIG_LIBCRC32C is not set 1025# CONFIG_LIBCRC32C is not set
1013CONFIG_PLIST=y 1026CONFIG_PLIST=y
1014CONFIG_IOMAP_COPY=y 1027CONFIG_HAS_IOMEM=y
1028CONFIG_HAS_IOPORT=y
1015 1029
1016# 1030#
1017# Instrumentation Support 1031# Instrumentation Support
@@ -1060,8 +1074,10 @@ CONFIG_CRYPTO_MD5=y
1060# CONFIG_CRYPTO_GF128MUL is not set 1074# CONFIG_CRYPTO_GF128MUL is not set
1061CONFIG_CRYPTO_ECB=m 1075CONFIG_CRYPTO_ECB=m
1062CONFIG_CRYPTO_CBC=y 1076CONFIG_CRYPTO_CBC=y
1077CONFIG_CRYPTO_PCBC=m
1063# CONFIG_CRYPTO_LRW is not set 1078# CONFIG_CRYPTO_LRW is not set
1064CONFIG_CRYPTO_DES=y 1079CONFIG_CRYPTO_DES=y
1080# CONFIG_CRYPTO_FCRYPT is not set
1065# CONFIG_CRYPTO_BLOWFISH is not set 1081# CONFIG_CRYPTO_BLOWFISH is not set
1066# CONFIG_CRYPTO_TWOFISH is not set 1082# CONFIG_CRYPTO_TWOFISH is not set
1067# CONFIG_CRYPTO_SERPENT is not set 1083# CONFIG_CRYPTO_SERPENT is not set
@@ -1075,6 +1091,7 @@ CONFIG_CRYPTO_DES=y
1075# CONFIG_CRYPTO_DEFLATE is not set 1091# CONFIG_CRYPTO_DEFLATE is not set
1076# CONFIG_CRYPTO_MICHAEL_MIC is not set 1092# CONFIG_CRYPTO_MICHAEL_MIC is not set
1077# CONFIG_CRYPTO_CRC32C is not set 1093# CONFIG_CRYPTO_CRC32C is not set
1094# CONFIG_CRYPTO_CAMELLIA is not set
1078# CONFIG_CRYPTO_TEST is not set 1095# CONFIG_CRYPTO_TEST is not set
1079 1096
1080# 1097#
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index debac66e8258..a8da0aea3b87 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -500,7 +500,7 @@ CONFIG_BLK_DEV_AMD74XX=y
500# CONFIG_BLK_DEV_PDC202XX_NEW is not set 500# CONFIG_BLK_DEV_PDC202XX_NEW is not set
501# CONFIG_BLK_DEV_SVWKS is not set 501# CONFIG_BLK_DEV_SVWKS is not set
502# CONFIG_BLK_DEV_SIIMAGE is not set 502# CONFIG_BLK_DEV_SIIMAGE is not set
503CONFIG_BLK_DEV_SL82C105=y 503# CONFIG_BLK_DEV_SL82C105 is not set
504# CONFIG_BLK_DEV_SLC90E66 is not set 504# CONFIG_BLK_DEV_SLC90E66 is not set
505# CONFIG_BLK_DEV_TRM290 is not set 505# CONFIG_BLK_DEV_TRM290 is not set
506# CONFIG_BLK_DEV_VIA82CXXX is not set 506# CONFIG_BLK_DEV_VIA82CXXX is not set
@@ -646,7 +646,7 @@ CONFIG_SATA_SVW=y
646# CONFIG_PATA_SIL680 is not set 646# CONFIG_PATA_SIL680 is not set
647# CONFIG_PATA_SIS is not set 647# CONFIG_PATA_SIS is not set
648# CONFIG_PATA_VIA is not set 648# CONFIG_PATA_VIA is not set
649# CONFIG_PATA_WINBOND is not set 649CONFIG_PATA_WINBOND=y
650 650
651# 651#
652# Multi-device support (RAID and LVM) 652# Multi-device support (RAID and LVM)
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 1c794fe718fd..6e96e50c362d 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -483,7 +483,7 @@ CONFIG_BLK_DEV_AMD74XX=y
483# CONFIG_BLK_DEV_PDC202XX_NEW is not set 483# CONFIG_BLK_DEV_PDC202XX_NEW is not set
484# CONFIG_BLK_DEV_SVWKS is not set 484# CONFIG_BLK_DEV_SVWKS is not set
485# CONFIG_BLK_DEV_SIIMAGE is not set 485# CONFIG_BLK_DEV_SIIMAGE is not set
486CONFIG_BLK_DEV_SL82C105=y 486# CONFIG_BLK_DEV_SL82C105 is not set
487# CONFIG_BLK_DEV_SLC90E66 is not set 487# CONFIG_BLK_DEV_SLC90E66 is not set
488# CONFIG_BLK_DEV_TRM290 is not set 488# CONFIG_BLK_DEV_TRM290 is not set
489# CONFIG_BLK_DEV_VIA82CXXX is not set 489# CONFIG_BLK_DEV_VIA82CXXX is not set
@@ -628,7 +628,7 @@ CONFIG_ATA=y
628# CONFIG_PATA_SIL680 is not set 628# CONFIG_PATA_SIL680 is not set
629# CONFIG_PATA_SIS is not set 629# CONFIG_PATA_SIS is not set
630# CONFIG_PATA_VIA is not set 630# CONFIG_PATA_VIA is not set
631# CONFIG_PATA_WINBOND is not set 631CONFIG_PATA_WINBOND=y
632 632
633# 633#
634# Multi-device support (RAID and LVM) 634# Multi-device support (RAID and LVM)
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
index 12c51e4ad2b4..ea6fd552c7ea 100644
--- a/arch/powerpc/kernel/prom_parse.c
+++ b/arch/powerpc/kernel/prom_parse.c
@@ -5,6 +5,7 @@
5#include <linux/pci_regs.h> 5#include <linux/pci_regs.h>
6#include <linux/module.h> 6#include <linux/module.h>
7#include <linux/ioport.h> 7#include <linux/ioport.h>
8#include <linux/etherdevice.h>
8#include <asm/prom.h> 9#include <asm/prom.h>
9#include <asm/pci-bridge.h> 10#include <asm/pci-bridge.h>
10 11
@@ -1003,3 +1004,42 @@ int of_irq_map_one(struct device_node *device, int index, struct of_irq *out_irq
1003 return res; 1004 return res;
1004} 1005}
1005EXPORT_SYMBOL_GPL(of_irq_map_one); 1006EXPORT_SYMBOL_GPL(of_irq_map_one);
1007
1008/**
1009 * Search the device tree for the best MAC address to use. 'mac-address' is
1010 * checked first, because that is supposed to contain to "most recent" MAC
1011 * address. If that isn't set, then 'local-mac-address' is checked next,
1012 * because that is the default address. If that isn't set, then the obsolete
1013 * 'address' is checked, just in case we're using an old device tree.
1014 *
1015 * Note that the 'address' property is supposed to contain a virtual address of
1016 * the register set, but some DTS files have redefined that property to be the
1017 * MAC address.
1018 *
1019 * All-zero MAC addresses are rejected, because those could be properties that
1020 * exist in the device tree, but were not set by U-Boot. For example, the
1021 * DTS could define 'mac-address' and 'local-mac-address', with zero MAC
1022 * addresses. Some older U-Boots only initialized 'local-mac-address'. In
1023 * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
1024 * but is all zeros.
1025*/
1026const void *of_get_mac_address(struct device_node *np)
1027{
1028 struct property *pp;
1029
1030 pp = of_find_property(np, "mac-address", NULL);
1031 if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
1032 return pp->value;
1033
1034 pp = of_find_property(np, "local-mac-address", NULL);
1035 if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
1036 return pp->value;
1037
1038 pp = of_find_property(np, "address", NULL);
1039 if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
1040 return pp->value;
1041
1042 return NULL;
1043}
1044EXPORT_SYMBOL(of_get_mac_address);
1045
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 1aea1e69ff31..713b31a16ce9 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -38,12 +38,12 @@ config MPC834x_ITX
38 Be aware that PCI initialization is the bootloader's 38 Be aware that PCI initialization is the bootloader's
39 responsibility. 39 responsibility.
40 40
41config MPC8360E_PB 41config MPC836x_MDS
42 bool "Freescale MPC8360E PB" 42 bool "Freescale MPC836x MDS"
43 select DEFAULT_UIMAGE 43 select DEFAULT_UIMAGE
44 select QUICC_ENGINE 44 select QUICC_ENGINE
45 help 45 help
46 This option enables support for the MPC836x EMDS Processor Board. 46 This option enables support for the MPC836x MDS Processor Board.
47 47
48endchoice 48endchoice
49 49
@@ -69,6 +69,6 @@ config PPC_MPC836x
69 bool 69 bool
70 select PPC_UDBG_16550 70 select PPC_UDBG_16550
71 select PPC_INDIRECT_PCI 71 select PPC_INDIRECT_PCI
72 default y if MPC8360E_PB 72 default y if MPC836x_MDS
73 73
74endmenu 74endmenu
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 6c8199c4c382..dfc970d0df10 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -6,5 +6,5 @@ obj-$(CONFIG_PCI) += pci.o
6obj-$(CONFIG_MPC8313_RDB) += mpc8313_rdb.o 6obj-$(CONFIG_MPC8313_RDB) += mpc8313_rdb.o
7obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o 7obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
8obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o 8obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
9obj-$(CONFIG_MPC8360E_PB) += mpc8360e_pb.o 9obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
10obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o 10obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o
diff --git a/arch/powerpc/platforms/83xx/mpc8313_rdb.c b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
index c3b98c34eb6b..32e9e9492841 100644
--- a/arch/powerpc/platforms/83xx/mpc8313_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
@@ -74,16 +74,9 @@ void __init mpc8313_rdb_init_IRQ(void)
74 */ 74 */
75static int __init mpc8313_rdb_probe(void) 75static int __init mpc8313_rdb_probe(void)
76{ 76{
77 char *model = of_get_flat_dt_prop(of_get_flat_dt_root(), 77 unsigned long root = of_get_flat_dt_root();
78 "model", NULL);
79 if (model == NULL)
80 return 0;
81 if (strcmp(model, "MPC8313ERDB"))
82 return 0;
83 78
84 DBG("MPC8313 RDB found\n"); 79 return of_flat_dt_is_compatible(root, "MPC8313ERDB");
85
86 return 1;
87} 80}
88 81
89define_machine(mpc8313_rdb) { 82define_machine(mpc8313_rdb) {
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index 3ecb55f8a6e2..17e3a3c6d8b4 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -57,11 +57,6 @@ unsigned long isa_mem_base = 0;
57 57
58static u8 *bcsr_regs = NULL; 58static u8 *bcsr_regs = NULL;
59 59
60u8 *get_bcsr(void)
61{
62 return bcsr_regs;
63}
64
65/* ************************************************************************ 60/* ************************************************************************
66 * 61 *
67 * Setup the architecture 62 * Setup the architecture
@@ -74,17 +69,6 @@ static void __init mpc832x_sys_setup_arch(void)
74 if (ppc_md.progress) 69 if (ppc_md.progress)
75 ppc_md.progress("mpc832x_sys_setup_arch()", 0); 70 ppc_md.progress("mpc832x_sys_setup_arch()", 0);
76 71
77 np = of_find_node_by_type(NULL, "cpu");
78 if (np != 0) {
79 unsigned int *fp =
80 (int *)get_property(np, "clock-frequency", NULL);
81 if (fp != 0)
82 loops_per_jiffy = *fp / HZ;
83 else
84 loops_per_jiffy = 50000000 / HZ;
85 of_node_put(np);
86 }
87
88 /* Map BCSR area */ 72 /* Map BCSR area */
89 np = of_find_node_by_name(NULL, "bcsr"); 73 np = of_find_node_by_name(NULL, "bcsr");
90 if (np != 0) { 74 if (np != 0) {
@@ -121,34 +105,23 @@ static void __init mpc832x_sys_setup_arch(void)
121 iounmap(bcsr_regs); 105 iounmap(bcsr_regs);
122 of_node_put(np); 106 of_node_put(np);
123 } 107 }
124
125#endif /* CONFIG_QUICC_ENGINE */ 108#endif /* CONFIG_QUICC_ENGINE */
126
127#ifdef CONFIG_BLK_DEV_INITRD
128 if (initrd_start)
129 ROOT_DEV = Root_RAM0;
130 else
131#endif
132#ifdef CONFIG_ROOT_NFS
133 ROOT_DEV = Root_NFS;
134#else
135 ROOT_DEV = Root_HDA1;
136#endif
137} 109}
138 110
111static struct of_device_id mpc832x_ids[] = {
112 { .type = "soc", },
113 { .compatible = "soc", },
114 { .type = "qe", },
115 {},
116};
117
139static int __init mpc832x_declare_of_platform_devices(void) 118static int __init mpc832x_declare_of_platform_devices(void)
140{ 119{
141 struct device_node *np; 120 if (!machine_is(mpc832x_mds))
142 121 return 0;
143 for (np = NULL; (np = of_find_compatible_node(np, "network",
144 "ucc_geth")) != NULL;) {
145 int ucc_num;
146 char bus_id[BUS_ID_SIZE];
147 122
148 ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1; 123 /* Publish the QE devices */
149 snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num); 124 of_platform_bus_probe(NULL, mpc832x_ids, NULL);
150 of_platform_device_create(np, bus_id, NULL);
151 }
152 125
153 return 0; 126 return 0;
154} 127}
@@ -156,7 +129,6 @@ device_initcall(mpc832x_declare_of_platform_devices);
156 129
157static void __init mpc832x_sys_init_IRQ(void) 130static void __init mpc832x_sys_init_IRQ(void)
158{ 131{
159
160 struct device_node *np; 132 struct device_node *np;
161 133
162 np = of_find_node_by_type(NULL, "ipic"); 134 np = of_find_node_by_type(NULL, "ipic");
@@ -189,6 +161,9 @@ static int __init mpc832x_rtc_hookup(void)
189{ 161{
190 struct timespec tv; 162 struct timespec tv;
191 163
164 if (!machine_is(mpc832x_mds))
165 return 0;
166
192 ppc_md.get_rtc_time = ds1374_get_rtc_time; 167 ppc_md.get_rtc_time = ds1374_get_rtc_time;
193 ppc_md.set_rtc_time = ds1374_set_rtc_time; 168 ppc_md.set_rtc_time = ds1374_set_rtc_time;
194 169
@@ -207,17 +182,9 @@ late_initcall(mpc832x_rtc_hookup);
207 */ 182 */
208static int __init mpc832x_sys_probe(void) 183static int __init mpc832x_sys_probe(void)
209{ 184{
210 char *model = of_get_flat_dt_prop(of_get_flat_dt_root(), 185 unsigned long root = of_get_flat_dt_root();
211 "model", NULL);
212
213 if (model == NULL)
214 return 0;
215 if (strcmp(model, "MPC8323EMDS"))
216 return 0;
217
218 DBG("%s found\n", model);
219 186
220 return 1; 187 return of_flat_dt_is_compatible(root, "MPC832xMDS");
221} 188}
222 189
223define_machine(mpc832x_mds) { 190define_machine(mpc832x_mds) {
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
index 443a3172f370..3c009f6d4a4f 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_itx.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -55,28 +55,12 @@ static void __init mpc834x_itx_setup_arch(void)
55 if (ppc_md.progress) 55 if (ppc_md.progress)
56 ppc_md.progress("mpc834x_itx_setup_arch()", 0); 56 ppc_md.progress("mpc834x_itx_setup_arch()", 0);
57 57
58 np = of_find_node_by_type(NULL, "cpu");
59 if (np != 0) {
60 const unsigned int *fp =
61 get_property(np, "clock-frequency", NULL);
62 if (fp != 0)
63 loops_per_jiffy = *fp / HZ;
64 else
65 loops_per_jiffy = 50000000 / HZ;
66 of_node_put(np);
67 }
68#ifdef CONFIG_PCI 58#ifdef CONFIG_PCI
69 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) 59 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
70 add_bridge(np); 60 add_bridge(np);
71 61
72 ppc_md.pci_exclude_device = mpc83xx_exclude_device; 62 ppc_md.pci_exclude_device = mpc83xx_exclude_device;
73#endif 63#endif
74
75#ifdef CONFIG_ROOT_NFS
76 ROOT_DEV = Root_NFS;
77#else
78 ROOT_DEV = Root_HDA1;
79#endif
80} 64}
81 65
82static void __init mpc834x_itx_init_IRQ(void) 66static void __init mpc834x_itx_init_IRQ(void)
@@ -100,10 +84,9 @@ static void __init mpc834x_itx_init_IRQ(void)
100 */ 84 */
101static int __init mpc834x_itx_probe(void) 85static int __init mpc834x_itx_probe(void)
102{ 86{
103 /* We always match for now, eventually we should look at the flat 87 unsigned long root = of_get_flat_dt_root();
104 dev tree to ensure this is the board we are suppose to run on 88
105 */ 89 return of_flat_dt_is_compatible(root, "MPC834xMITX");
106 return 1;
107} 90}
108 91
109define_machine(mpc834x_itx) { 92define_machine(mpc834x_itx) {
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c
index d2736da76c46..e5d819166874 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c
@@ -125,17 +125,6 @@ static void __init mpc834x_mds_setup_arch(void)
125 if (ppc_md.progress) 125 if (ppc_md.progress)
126 ppc_md.progress("mpc834x_mds_setup_arch()", 0); 126 ppc_md.progress("mpc834x_mds_setup_arch()", 0);
127 127
128 np = of_find_node_by_type(NULL, "cpu");
129 if (np != 0) {
130 const unsigned int *fp =
131 get_property(np, "clock-frequency", NULL);
132 if (fp != 0)
133 loops_per_jiffy = *fp / HZ;
134 else
135 loops_per_jiffy = 50000000 / HZ;
136 of_node_put(np);
137 }
138
139#ifdef CONFIG_PCI 128#ifdef CONFIG_PCI
140 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) 129 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
141 add_bridge(np); 130 add_bridge(np);
@@ -144,12 +133,6 @@ static void __init mpc834x_mds_setup_arch(void)
144#endif 133#endif
145 134
146 mpc834x_usb_cfg(); 135 mpc834x_usb_cfg();
147
148#ifdef CONFIG_ROOT_NFS
149 ROOT_DEV = Root_NFS;
150#else
151 ROOT_DEV = Root_HDA1;
152#endif
153} 136}
154 137
155static void __init mpc834x_mds_init_IRQ(void) 138static void __init mpc834x_mds_init_IRQ(void)
@@ -176,6 +159,9 @@ static int __init mpc834x_rtc_hookup(void)
176{ 159{
177 struct timespec tv; 160 struct timespec tv;
178 161
162 if (!machine_is(mpc834x_mds))
163 return 0;
164
179 ppc_md.get_rtc_time = ds1374_get_rtc_time; 165 ppc_md.get_rtc_time = ds1374_get_rtc_time;
180 ppc_md.set_rtc_time = ds1374_set_rtc_time; 166 ppc_md.set_rtc_time = ds1374_set_rtc_time;
181 167
@@ -194,10 +180,9 @@ late_initcall(mpc834x_rtc_hookup);
194 */ 180 */
195static int __init mpc834x_mds_probe(void) 181static int __init mpc834x_mds_probe(void)
196{ 182{
197 /* We always match for now, eventually we should look at the flat 183 unsigned long root = of_get_flat_dt_root();
198 dev tree to ensure this is the board we are suppose to run on 184
199 */ 185 return of_flat_dt_is_compatible(root, "MPC834xMDS");
200 return 1;
201} 186}
202 187
203define_machine(mpc834x_mds) { 188define_machine(mpc834x_mds) {
diff --git a/arch/powerpc/platforms/83xx/mpc8360e_pb.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c
index ccce2f9f283d..526ed090a446 100644
--- a/arch/powerpc/platforms/83xx/mpc8360e_pb.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c
@@ -5,12 +5,12 @@
5 * Yin Olivia <Hong-hua.Yin@freescale.com> 5 * Yin Olivia <Hong-hua.Yin@freescale.com>
6 * 6 *
7 * Description: 7 * Description:
8 * MPC8360E MDS PB board specific routines. 8 * MPC8360E MDS board specific routines.
9 * 9 *
10 * Changelog: 10 * Changelog:
11 * Jun 21, 2006 Initial version 11 * Jun 21, 2006 Initial version
12 * 12 *
13 * This program is free software; you can redistribute it and/or modify it 13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the 14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your 15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version. 16 * option) any later version.
@@ -62,33 +62,17 @@ unsigned long isa_mem_base = 0;
62 62
63static u8 *bcsr_regs = NULL; 63static u8 *bcsr_regs = NULL;
64 64
65u8 *get_bcsr(void)
66{
67 return bcsr_regs;
68}
69
70/* ************************************************************************ 65/* ************************************************************************
71 * 66 *
72 * Setup the architecture 67 * Setup the architecture
73 * 68 *
74 */ 69 */
75static void __init mpc8360_sys_setup_arch(void) 70static void __init mpc836x_mds_setup_arch(void)
76{ 71{
77 struct device_node *np; 72 struct device_node *np;
78 73
79 if (ppc_md.progress) 74 if (ppc_md.progress)
80 ppc_md.progress("mpc8360_sys_setup_arch()", 0); 75 ppc_md.progress("mpc836x_mds_setup_arch()", 0);
81
82 np = of_find_node_by_type(NULL, "cpu");
83 if (np != 0) {
84 const unsigned int *fp =
85 get_property(np, "clock-frequency", NULL);
86 if (fp != 0)
87 loops_per_jiffy = *fp / HZ;
88 else
89 loops_per_jiffy = 50000000 / HZ;
90 of_node_put(np);
91 }
92 76
93 /* Map BCSR area */ 77 /* Map BCSR area */
94 np = of_find_node_by_name(NULL, "bcsr"); 78 np = of_find_node_by_name(NULL, "bcsr");
@@ -128,40 +112,29 @@ static void __init mpc8360_sys_setup_arch(void)
128 } 112 }
129 113
130#endif /* CONFIG_QUICC_ENGINE */ 114#endif /* CONFIG_QUICC_ENGINE */
131
132#ifdef CONFIG_BLK_DEV_INITRD
133 if (initrd_start)
134 ROOT_DEV = Root_RAM0;
135 else
136#endif
137#ifdef CONFIG_ROOT_NFS
138 ROOT_DEV = Root_NFS;
139#else
140 ROOT_DEV = Root_HDA1;
141#endif
142} 115}
143 116
144static int __init mpc8360_declare_of_platform_devices(void) 117static struct of_device_id mpc836x_ids[] = {
145{ 118 { .type = "soc", },
146 struct device_node *np; 119 { .compatible = "soc", },
120 { .type = "qe", },
121 {},
122};
147 123
148 for (np = NULL; (np = of_find_compatible_node(np, "network", 124static int __init mpc836x_declare_of_platform_devices(void)
149 "ucc_geth")) != NULL;) { 125{
150 int ucc_num; 126 if (!machine_is(mpc836x_mds))
151 char bus_id[BUS_ID_SIZE]; 127 return 0;
152 128
153 ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1; 129 /* Publish the QE devices */
154 snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num); 130 of_platform_bus_probe(NULL, mpc836x_ids, NULL);
155 of_platform_device_create(np, bus_id, NULL);
156 }
157 131
158 return 0; 132 return 0;
159} 133}
160device_initcall(mpc8360_declare_of_platform_devices); 134device_initcall(mpc836x_declare_of_platform_devices);
161 135
162static void __init mpc8360_sys_init_IRQ(void) 136static void __init mpc836x_mds_init_IRQ(void)
163{ 137{
164
165 struct device_node *np; 138 struct device_node *np;
166 139
167 np = of_find_node_by_type(NULL, "ipic"); 140 np = of_find_node_by_type(NULL, "ipic");
@@ -194,6 +167,9 @@ static int __init mpc8360_rtc_hookup(void)
194{ 167{
195 struct timespec tv; 168 struct timespec tv;
196 169
170 if (!machine_is(mpc836x_mds))
171 return 0;
172
197 ppc_md.get_rtc_time = ds1374_get_rtc_time; 173 ppc_md.get_rtc_time = ds1374_get_rtc_time;
198 ppc_md.set_rtc_time = ds1374_set_rtc_time; 174 ppc_md.set_rtc_time = ds1374_set_rtc_time;
199 175
@@ -210,28 +186,21 @@ late_initcall(mpc8360_rtc_hookup);
210/* 186/*
211 * Called very early, MMU is off, device-tree isn't unflattened 187 * Called very early, MMU is off, device-tree isn't unflattened
212 */ 188 */
213static int __init mpc8360_sys_probe(void) 189static int __init mpc836x_mds_probe(void)
214{ 190{
215 char *model = of_get_flat_dt_prop(of_get_flat_dt_root(), 191 unsigned long root = of_get_flat_dt_root();
216 "model", NULL);
217 if (model == NULL)
218 return 0;
219 if (strcmp(model, "MPC8360EPB"))
220 return 0;
221
222 DBG("MPC8360EMDS-PB found\n");
223 192
224 return 1; 193 return of_flat_dt_is_compatible(root, "MPC836xMDS");
225} 194}
226 195
227define_machine(mpc8360_sys) { 196define_machine(mpc836x_mds) {
228 .name = "MPC8360E PB", 197 .name = "MPC836x MDS",
229 .probe = mpc8360_sys_probe, 198 .probe = mpc836x_mds_probe,
230 .setup_arch = mpc8360_sys_setup_arch, 199 .setup_arch = mpc836x_mds_setup_arch,
231 .init_IRQ = mpc8360_sys_init_IRQ, 200 .init_IRQ = mpc836x_mds_init_IRQ,
232 .get_irq = ipic_get_irq, 201 .get_irq = ipic_get_irq,
233 .restart = mpc83xx_restart, 202 .restart = mpc83xx_restart,
234 .time_init = mpc83xx_time_init, 203 .time_init = mpc83xx_time_init,
235 .calibrate_decr = generic_calibrate_decr, 204 .calibrate_decr = generic_calibrate_decr,
236 .progress = udbg_progress, 205 .progress = udbg_progress,
237}; 206};
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index dc0583bdbc63..2dfd05095a25 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -4,7 +4,7 @@ endif
4 4
5obj-y := pci.o lpar.o hvCall.o nvram.o reconfig.o \ 5obj-y := pci.o lpar.o hvCall.o nvram.o reconfig.o \
6 setup.o iommu.o ras.o rtasd.o pci_dlpar.o \ 6 setup.o iommu.o ras.o rtasd.o pci_dlpar.o \
7 firmware.o 7 firmware.o power.o
8obj-$(CONFIG_SMP) += smp.o 8obj-$(CONFIG_SMP) += smp.o
9obj-$(CONFIG_XICS) += xics.o 9obj-$(CONFIG_XICS) += xics.o
10obj-$(CONFIG_SCANLOG) += scanlog.o 10obj-$(CONFIG_SCANLOG) += scanlog.o
diff --git a/arch/powerpc/platforms/pseries/power.c b/arch/powerpc/platforms/pseries/power.c
new file mode 100644
index 000000000000..2624b71df73d
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/power.c
@@ -0,0 +1,87 @@
1/*
2 * Interface for power-management for ppc64 compliant platform
3 *
4 * Manish Ahuja <mahuja@us.ibm.com>
5 *
6 * Feb 2007
7 *
8 * Copyright (C) 2007 IBM Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24#include <linux/kobject.h>
25#include <linux/string.h>
26#include <linux/errno.h>
27#include <linux/init.h>
28
29unsigned long rtas_poweron_auto; /* default and normal state is 0 */
30
31static ssize_t auto_poweron_show(struct subsystem *subsys, char *buf)
32{
33 return sprintf(buf, "%lu\n", rtas_poweron_auto);
34}
35
36static ssize_t
37auto_poweron_store(struct subsystem *subsys, const char *buf, size_t n)
38{
39 int ret;
40 unsigned long ups_restart;
41 ret = sscanf(buf, "%lu", &ups_restart);
42
43 if ((ret == 1) && ((ups_restart == 1) || (ups_restart == 0))){
44 rtas_poweron_auto = ups_restart;
45 return n;
46 }
47 return -EINVAL;
48}
49
50static struct subsys_attribute auto_poweron_attr = {
51 .attr = {
52 .name = __stringify(auto_poweron),
53 .mode = 0644,
54 },
55 .show = auto_poweron_show,
56 .store = auto_poweron_store,
57};
58
59#ifndef CONFIG_PM
60decl_subsys(power,NULL,NULL);
61
62static struct attribute *g[] = {
63 &auto_poweron_attr.attr,
64 NULL,
65};
66
67static struct attribute_group attr_group = {
68 .attrs = g,
69};
70
71static int __init pm_init(void)
72{
73 int error = subsystem_register(&power_subsys);
74 if (!error)
75 error = sysfs_create_group(&power_subsys.kset.kobj,&attr_group);
76 return error;
77}
78core_initcall(pm_init);
79#else
80extern struct subsystem power_subsys;
81
82static int __init apo_pm_init(void)
83{
84 return (subsys_create_file(&power_subsys, &auto_poweron_attr));
85}
86__initcall(apo_pm_init);
87#endif
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
index 35264f9af0ff..22bc01989749 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -33,4 +33,7 @@ static inline void setup_kexec_cpu_down_xics(void) { }
33static inline void setup_kexec_cpu_down_mpic(void) { } 33static inline void setup_kexec_cpu_down_mpic(void) { }
34#endif 34#endif
35 35
36/* Poweron flag used for enabling auto ups restart */
37extern unsigned long rtas_poweron_auto;
38
36#endif /* _PSERIES_PSERIES_H */ 39#endif /* _PSERIES_PSERIES_H */
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 435a04596526..34aff47b1f55 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -486,6 +486,34 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus)
486 return PCI_PROBE_NORMAL; 486 return PCI_PROBE_NORMAL;
487} 487}
488 488
489/**
490 * pSeries_power_off - tell firmware about how to power off the system.
491 *
492 * This function calls either the power-off rtas token in normal cases
493 * or the ibm,power-off-ups token (if present & requested) in case of
494 * a power failure. If power-off token is used, power on will only be
495 * possible with power button press. If ibm,power-off-ups token is used
496 * it will allow auto poweron after power is restored.
497 */
498void pSeries_power_off(void)
499{
500 int rc;
501 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
502
503 if (rtas_flash_term_hook)
504 rtas_flash_term_hook(SYS_POWER_OFF);
505
506 if (rtas_poweron_auto == 0 ||
507 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
508 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
509 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
510 } else {
511 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
512 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
513 }
514 for (;;);
515}
516
489define_machine(pseries) { 517define_machine(pseries) {
490 .name = "pSeries", 518 .name = "pSeries",
491 .probe = pSeries_probe, 519 .probe = pSeries_probe,
@@ -496,7 +524,7 @@ define_machine(pseries) {
496 .pcibios_fixup = pSeries_final_fixup, 524 .pcibios_fixup = pSeries_final_fixup,
497 .pci_probe_mode = pSeries_pci_probe_mode, 525 .pci_probe_mode = pSeries_pci_probe_mode,
498 .restart = rtas_restart, 526 .restart = rtas_restart,
499 .power_off = rtas_power_off, 527 .power_off = pSeries_power_off,
500 .halt = rtas_halt, 528 .halt = rtas_halt,
501 .panic = rtas_os_term, 529 .panic = rtas_os_term,
502 .get_boot_time = rtas_get_boot_time, 530 .get_boot_time = rtas_get_boot_time,
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 34161bc5a02f..d20f02927f72 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -233,14 +233,7 @@ static int __init gfar_of_init(void)
233 goto err; 233 goto err;
234 } 234 }
235 235
236 mac_addr = get_property(np, "local-mac-address", NULL); 236 mac_addr = of_get_mac_address(np);
237 if (mac_addr == NULL)
238 mac_addr = get_property(np, "mac-address", NULL);
239 if (mac_addr == NULL) {
240 /* Obsolete */
241 mac_addr = get_property(np, "address", NULL);
242 }
243
244 if (mac_addr) 237 if (mac_addr)
245 memcpy(gfar_data.mac_addr, mac_addr, 6); 238 memcpy(gfar_data.mac_addr, mac_addr, 6);
246 239
@@ -646,8 +639,9 @@ static int __init fs_enet_of_init(void)
646 goto unreg; 639 goto unreg;
647 } 640 }
648 641
649 mac_addr = get_property(np, "mac-address", NULL); 642 mac_addr = of_get_mac_address(np);
650 memcpy(fs_enet_data.macaddr, mac_addr, 6); 643 if (mac_addr)
644 memcpy(fs_enet_data.macaddr, mac_addr, 6);
651 645
652 ph = get_property(np, "phy-handle", NULL); 646 ph = get_property(np, "phy-handle", NULL);
653 phy = of_find_node_by_phandle(*ph); 647 phy = of_find_node_by_phandle(*ph);
@@ -931,8 +925,9 @@ static int __init fs_enet_of_init(void)
931 goto err; 925 goto err;
932 r[0].name = enet_regs; 926 r[0].name = enet_regs;
933 927
934 mac_addr = (void *)get_property(np, "mac-address", NULL); 928 mac_addr = of_get_mac_address(np);
935 memcpy(fs_enet_data.macaddr, mac_addr, 6); 929 if (mac_addr)
930 memcpy(fs_enet_data.macaddr, mac_addr, 6);
936 931
937 ph = (phandle *) get_property(np, "phy-handle", NULL); 932 ph = (phandle *) get_property(np, "phy-handle", NULL);
938 if (ph != NULL) 933 if (ph != NULL)
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_fast.c b/arch/powerpc/sysdev/qe_lib/ucc_fast.c
index e657559bea93..a457ac1c6639 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_fast.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc_fast.c
@@ -1,13 +1,12 @@
1/* 1/*
2 * arch/powerpc/sysdev/qe_lib/ucc_fast.c
3 *
4 * QE UCC Fast API Set - UCC Fast specific routines implementations.
5 *
6 * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. 2 * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
7 * 3 *
8 * Authors: Shlomi Gridish <gridish@freescale.com> 4 * Authors: Shlomi Gridish <gridish@freescale.com>
9 * Li Yang <leoli@freescale.com> 5 * Li Yang <leoli@freescale.com>
10 * 6 *
7 * Description:
8 * QE UCC Fast API Set - UCC Fast specific routines implementations.
9 *
11 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the 11 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your 12 * Free Software Foundation; either version 2 of the License, or (at your
@@ -27,79 +26,61 @@
27#include <asm/ucc.h> 26#include <asm/ucc.h>
28#include <asm/ucc_fast.h> 27#include <asm/ucc_fast.h>
29 28
30#define uccf_printk(level, format, arg...) \
31 printk(level format "\n", ## arg)
32
33#define uccf_dbg(format, arg...) \
34 uccf_printk(KERN_DEBUG , format , ## arg)
35#define uccf_err(format, arg...) \
36 uccf_printk(KERN_ERR , format , ## arg)
37#define uccf_info(format, arg...) \
38 uccf_printk(KERN_INFO , format , ## arg)
39#define uccf_warn(format, arg...) \
40 uccf_printk(KERN_WARNING , format , ## arg)
41
42#ifdef UCCF_VERBOSE_DEBUG
43#define uccf_vdbg uccf_dbg
44#else
45#define uccf_vdbg(fmt, args...) do { } while (0)
46#endif /* UCCF_VERBOSE_DEBUG */
47
48void ucc_fast_dump_regs(struct ucc_fast_private * uccf) 29void ucc_fast_dump_regs(struct ucc_fast_private * uccf)
49{ 30{
50 uccf_info("UCC%d Fast registers:", uccf->uf_info->ucc_num); 31 printk(KERN_INFO "UCC%d Fast registers:", uccf->uf_info->ucc_num);
51 uccf_info("Base address: 0x%08x", (u32) uccf->uf_regs); 32 printk(KERN_INFO "Base address: 0x%08x", (u32) uccf->uf_regs);
52 33
53 uccf_info("gumr : addr - 0x%08x, val - 0x%08x", 34 printk(KERN_INFO "gumr : addr - 0x%08x, val - 0x%08x",
54 (u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr)); 35 (u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr));
55 uccf_info("upsmr : addr - 0x%08x, val - 0x%08x", 36 printk(KERN_INFO "upsmr : addr - 0x%08x, val - 0x%08x",
56 (u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr)); 37 (u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr));
57 uccf_info("utodr : addr - 0x%08x, val - 0x%04x", 38 printk(KERN_INFO "utodr : addr - 0x%08x, val - 0x%04x",
58 (u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr)); 39 (u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr));
59 uccf_info("udsr : addr - 0x%08x, val - 0x%04x", 40 printk(KERN_INFO "udsr : addr - 0x%08x, val - 0x%04x",
60 (u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr)); 41 (u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr));
61 uccf_info("ucce : addr - 0x%08x, val - 0x%08x", 42 printk(KERN_INFO "ucce : addr - 0x%08x, val - 0x%08x",
62 (u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce)); 43 (u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce));
63 uccf_info("uccm : addr - 0x%08x, val - 0x%08x", 44 printk(KERN_INFO "uccm : addr - 0x%08x, val - 0x%08x",
64 (u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm)); 45 (u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm));
65 uccf_info("uccs : addr - 0x%08x, val - 0x%02x", 46 printk(KERN_INFO "uccs : addr - 0x%08x, val - 0x%02x",
66 (u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs); 47 (u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs);
67 uccf_info("urfb : addr - 0x%08x, val - 0x%08x", 48 printk(KERN_INFO "urfb : addr - 0x%08x, val - 0x%08x",
68 (u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb)); 49 (u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb));
69 uccf_info("urfs : addr - 0x%08x, val - 0x%04x", 50 printk(KERN_INFO "urfs : addr - 0x%08x, val - 0x%04x",
70 (u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs)); 51 (u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs));
71 uccf_info("urfet : addr - 0x%08x, val - 0x%04x", 52 printk(KERN_INFO "urfet : addr - 0x%08x, val - 0x%04x",
72 (u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet)); 53 (u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet));
73 uccf_info("urfset: addr - 0x%08x, val - 0x%04x", 54 printk(KERN_INFO "urfset: addr - 0x%08x, val - 0x%04x",
74 (u32) & uccf->uf_regs->urfset, 55 (u32) & uccf->uf_regs->urfset,
75 in_be16(&uccf->uf_regs->urfset)); 56 in_be16(&uccf->uf_regs->urfset));
76 uccf_info("utfb : addr - 0x%08x, val - 0x%08x", 57 printk(KERN_INFO "utfb : addr - 0x%08x, val - 0x%08x",
77 (u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb)); 58 (u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb));
78 uccf_info("utfs : addr - 0x%08x, val - 0x%04x", 59 printk(KERN_INFO "utfs : addr - 0x%08x, val - 0x%04x",
79 (u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs)); 60 (u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs));
80 uccf_info("utfet : addr - 0x%08x, val - 0x%04x", 61 printk(KERN_INFO "utfet : addr - 0x%08x, val - 0x%04x",
81 (u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet)); 62 (u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet));
82 uccf_info("utftt : addr - 0x%08x, val - 0x%04x", 63 printk(KERN_INFO "utftt : addr - 0x%08x, val - 0x%04x",
83 (u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt)); 64 (u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt));
84 uccf_info("utpt : addr - 0x%08x, val - 0x%04x", 65 printk(KERN_INFO "utpt : addr - 0x%08x, val - 0x%04x",
85 (u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt)); 66 (u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt));
86 uccf_info("urtry : addr - 0x%08x, val - 0x%08x", 67 printk(KERN_INFO "urtry : addr - 0x%08x, val - 0x%08x",
87 (u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry)); 68 (u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry));
88 uccf_info("guemr : addr - 0x%08x, val - 0x%02x", 69 printk(KERN_INFO "guemr : addr - 0x%08x, val - 0x%02x",
89 (u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr); 70 (u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr);
90} 71}
91 72
92u32 ucc_fast_get_qe_cr_subblock(int uccf_num) 73u32 ucc_fast_get_qe_cr_subblock(int uccf_num)
93{ 74{
94 switch (uccf_num) { 75 switch (uccf_num) {
95 case 0: return QE_CR_SUBBLOCK_UCCFAST1; 76 case 0: return QE_CR_SUBBLOCK_UCCFAST1;
96 case 1: return QE_CR_SUBBLOCK_UCCFAST2; 77 case 1: return QE_CR_SUBBLOCK_UCCFAST2;
97 case 2: return QE_CR_SUBBLOCK_UCCFAST3; 78 case 2: return QE_CR_SUBBLOCK_UCCFAST3;
98 case 3: return QE_CR_SUBBLOCK_UCCFAST4; 79 case 3: return QE_CR_SUBBLOCK_UCCFAST4;
99 case 4: return QE_CR_SUBBLOCK_UCCFAST5; 80 case 4: return QE_CR_SUBBLOCK_UCCFAST5;
100 case 5: return QE_CR_SUBBLOCK_UCCFAST6; 81 case 5: return QE_CR_SUBBLOCK_UCCFAST6;
101 case 6: return QE_CR_SUBBLOCK_UCCFAST7; 82 case 6: return QE_CR_SUBBLOCK_UCCFAST7;
102 case 7: return QE_CR_SUBBLOCK_UCCFAST8; 83 case 7: return QE_CR_SUBBLOCK_UCCFAST8;
103 default: return QE_CR_SUBBLOCK_INVALID; 84 default: return QE_CR_SUBBLOCK_INVALID;
104 } 85 }
105} 86}
@@ -153,84 +134,72 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
153{ 134{
154 struct ucc_fast_private *uccf; 135 struct ucc_fast_private *uccf;
155 struct ucc_fast *uf_regs; 136 struct ucc_fast *uf_regs;
156 u32 gumr = 0; 137 u32 gumr;
157 int ret; 138 int ret;
158 139
159 uccf_vdbg("%s: IN", __FUNCTION__);
160
161 if (!uf_info) 140 if (!uf_info)
162 return -EINVAL; 141 return -EINVAL;
163 142
164 /* check if the UCC port number is in range. */ 143 /* check if the UCC port number is in range. */
165 if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) { 144 if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) {
166 uccf_err("ucc_fast_init: Illegal UCC number!"); 145 printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
167 return -EINVAL; 146 return -EINVAL;
168 } 147 }
169 148
170 /* Check that 'max_rx_buf_length' is properly aligned (4). */ 149 /* Check that 'max_rx_buf_length' is properly aligned (4). */
171 if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) { 150 if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) {
172 uccf_err("ucc_fast_init: max_rx_buf_length not aligned."); 151 printk(KERN_ERR "%s: max_rx_buf_length not aligned", __FUNCTION__);
173 return -EINVAL; 152 return -EINVAL;
174 } 153 }
175 154
176 /* Validate Virtual Fifo register values */ 155 /* Validate Virtual Fifo register values */
177 if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) { 156 if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) {
178 uccf_err 157 printk(KERN_ERR "%s: urfs is too small", __FUNCTION__);
179 ("ucc_fast_init: Virtual Fifo register urfs too small.");
180 return -EINVAL; 158 return -EINVAL;
181 } 159 }
182 160
183 if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 161 if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
184 uccf_err 162 printk(KERN_ERR "%s: urfs is not aligned", __FUNCTION__);
185 ("ucc_fast_init: Virtual Fifo register urfs not aligned.");
186 return -EINVAL; 163 return -EINVAL;
187 } 164 }
188 165
189 if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 166 if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
190 uccf_err 167 printk(KERN_ERR "%s: urfet is not aligned.", __FUNCTION__);
191 ("ucc_fast_init: Virtual Fifo register urfet not aligned.");
192 return -EINVAL; 168 return -EINVAL;
193 } 169 }
194 170
195 if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 171 if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
196 uccf_err 172 printk(KERN_ERR "%s: urfset is not aligned", __FUNCTION__);
197 ("ucc_fast_init: Virtual Fifo register urfset not aligned.");
198 return -EINVAL; 173 return -EINVAL;
199 } 174 }
200 175
201 if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 176 if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
202 uccf_err 177 printk(KERN_ERR "%s: utfs is not aligned", __FUNCTION__);
203 ("ucc_fast_init: Virtual Fifo register utfs not aligned.");
204 return -EINVAL; 178 return -EINVAL;
205 } 179 }
206 180
207 if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 181 if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
208 uccf_err 182 printk(KERN_ERR "%s: utfet is not aligned", __FUNCTION__);
209 ("ucc_fast_init: Virtual Fifo register utfet not aligned.");
210 return -EINVAL; 183 return -EINVAL;
211 } 184 }
212 185
213 if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 186 if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
214 uccf_err 187 printk(KERN_ERR "%s: utftt is not aligned", __FUNCTION__);
215 ("ucc_fast_init: Virtual Fifo register utftt not aligned.");
216 return -EINVAL; 188 return -EINVAL;
217 } 189 }
218 190
219 uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL); 191 uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL);
220 if (!uccf) { 192 if (!uccf) {
221 uccf_err 193 printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
222 ("ucc_fast_init: No memory for UCC slow data structure!");
223 return -ENOMEM; 194 return -ENOMEM;
224 } 195 }
225 196
226 /* Fill fast UCC structure */ 197 /* Fill fast UCC structure */
227 uccf->uf_info = uf_info; 198 uccf->uf_info = uf_info;
228 /* Set the PHY base address */ 199 /* Set the PHY base address */
229 uccf->uf_regs = 200 uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast));
230 (struct ucc_fast *) ioremap(uf_info->regs, sizeof(struct ucc_fast));
231 if (uccf->uf_regs == NULL) { 201 if (uccf->uf_regs == NULL) {
232 uccf_err 202 printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
233 ("ucc_fast_init: No memory map for UCC slow controller!");
234 return -ENOMEM; 203 return -ENOMEM;
235 } 204 }
236 205
@@ -249,7 +218,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
249 218
250 /* Init Guemr register */ 219 /* Init Guemr register */
251 if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) { 220 if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) {
252 uccf_err("ucc_fast_init: Could not init the guemr register."); 221 printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
253 ucc_fast_free(uccf); 222 ucc_fast_free(uccf);
254 return ret; 223 return ret;
255 } 224 }
@@ -258,7 +227,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
258 if ((ret = ucc_set_type(uf_info->ucc_num, 227 if ((ret = ucc_set_type(uf_info->ucc_num,
259 (struct ucc_common *) (uf_regs), 228 (struct ucc_common *) (uf_regs),
260 UCC_SPEED_TYPE_FAST))) { 229 UCC_SPEED_TYPE_FAST))) {
261 uccf_err("ucc_fast_init: Could not set type to fast."); 230 printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
262 ucc_fast_free(uccf); 231 ucc_fast_free(uccf);
263 return ret; 232 return ret;
264 } 233 }
@@ -267,10 +236,9 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
267 236
268 /* Set GUMR */ 237 /* Set GUMR */
269 /* For more details see the hardware spec. */ 238 /* For more details see the hardware spec. */
270 /* gumr starts as zero. */ 239 gumr = uf_info->ttx_trx;
271 if (uf_info->tci) 240 if (uf_info->tci)
272 gumr |= UCC_FAST_GUMR_TCI; 241 gumr |= UCC_FAST_GUMR_TCI;
273 gumr |= uf_info->ttx_trx;
274 if (uf_info->cdp) 242 if (uf_info->cdp)
275 gumr |= UCC_FAST_GUMR_CDP; 243 gumr |= UCC_FAST_GUMR_CDP;
276 if (uf_info->ctsp) 244 if (uf_info->ctsp)
@@ -298,9 +266,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
298 uccf->ucc_fast_tx_virtual_fifo_base_offset = 266 uccf->ucc_fast_tx_virtual_fifo_base_offset =
299 qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); 267 qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
300 if (IS_MURAM_ERR(uccf->ucc_fast_tx_virtual_fifo_base_offset)) { 268 if (IS_MURAM_ERR(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
301 uccf_err 269 printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__);
302 ("ucc_fast_init: Can not allocate MURAM memory for "
303 "struct ucc_fastx_virtual_fifo_base_offset.");
304 uccf->ucc_fast_tx_virtual_fifo_base_offset = 0; 270 uccf->ucc_fast_tx_virtual_fifo_base_offset = 0;
305 ucc_fast_free(uccf); 271 ucc_fast_free(uccf);
306 return -ENOMEM; 272 return -ENOMEM;
@@ -308,14 +274,11 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
308 274
309 /* Allocate memory for Rx Virtual Fifo */ 275 /* Allocate memory for Rx Virtual Fifo */
310 uccf->ucc_fast_rx_virtual_fifo_base_offset = 276 uccf->ucc_fast_rx_virtual_fifo_base_offset =
311 qe_muram_alloc(uf_info->urfs + 277 qe_muram_alloc(uf_info->urfs +
312 (u32)
313 UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR, 278 UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
314 UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); 279 UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
315 if (IS_MURAM_ERR(uccf->ucc_fast_rx_virtual_fifo_base_offset)) { 280 if (IS_MURAM_ERR(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
316 uccf_err 281 printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__);
317 ("ucc_fast_init: Can not allocate MURAM memory for "
318 "ucc_fast_rx_virtual_fifo_base_offset.");
319 uccf->ucc_fast_rx_virtual_fifo_base_offset = 0; 282 uccf->ucc_fast_rx_virtual_fifo_base_offset = 0;
320 ucc_fast_free(uccf); 283 ucc_fast_free(uccf);
321 return -ENOMEM; 284 return -ENOMEM;
@@ -342,26 +305,22 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
342 /* If NMSI (not Tsa), set Tx and Rx clock. */ 305 /* If NMSI (not Tsa), set Tx and Rx clock. */
343 if (!uf_info->tsa) { 306 if (!uf_info->tsa) {
344 /* Rx clock routing */ 307 /* Rx clock routing */
345 if (uf_info->rx_clock != QE_CLK_NONE) { 308 if ((uf_info->rx_clock != QE_CLK_NONE) &&
346 if (ucc_set_qe_mux_rxtx 309 ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock,
347 (uf_info->ucc_num, uf_info->rx_clock, 310 COMM_DIR_RX)) {
348 COMM_DIR_RX)) { 311 printk(KERN_ERR "%s: illegal value for RX clock",
349 uccf_err 312 __FUNCTION__);
350 ("ucc_fast_init: Illegal value for parameter 'RxClock'."); 313 ucc_fast_free(uccf);
351 ucc_fast_free(uccf); 314 return -EINVAL;
352 return -EINVAL;
353 }
354 } 315 }
355 /* Tx clock routing */ 316 /* Tx clock routing */
356 if (uf_info->tx_clock != QE_CLK_NONE) { 317 if ((uf_info->tx_clock != QE_CLK_NONE) &&
357 if (ucc_set_qe_mux_rxtx 318 ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock,
358 (uf_info->ucc_num, uf_info->tx_clock, 319 COMM_DIR_TX)) {
359 COMM_DIR_TX)) { 320 printk(KERN_ERR "%s: illegal value for TX clock",
360 uccf_err 321 __FUNCTION__);
361 ("ucc_fast_init: Illegal value for parameter 'TxClock'."); 322 ucc_fast_free(uccf);
362 ucc_fast_free(uccf); 323 return -EINVAL;
363 return -EINVAL;
364 }
365 } 324 }
366 } 325 }
367 326
@@ -370,9 +329,9 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
370 329
371 /* First, clear anything pending at UCC level, 330 /* First, clear anything pending at UCC level,
372 * otherwise, old garbage may come through 331 * otherwise, old garbage may come through
373 * as soon as the dam is opened 332 * as soon as the dam is opened. */
374 * Writing '1' clears 333
375 */ 334 /* Writing '1' clears */
376 out_be32(&uf_regs->ucce, 0xffffffff); 335 out_be32(&uf_regs->ucce, 0xffffffff);
377 336
378 *uccf_ret = uccf; 337 *uccf_ret = uccf;
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_slow.c b/arch/powerpc/sysdev/qe_lib/ucc_slow.c
index 0e97e5c94f8a..817df73ecf56 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_slow.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc_slow.c
@@ -19,7 +19,6 @@
19#include <linux/stddef.h> 19#include <linux/stddef.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21 21
22#include <asm/irq.h>
23#include <asm/io.h> 22#include <asm/io.h>
24#include <asm/immap_qe.h> 23#include <asm/immap_qe.h>
25#include <asm/qe.h> 24#include <asm/qe.h>
@@ -27,24 +26,6 @@
27#include <asm/ucc.h> 26#include <asm/ucc.h>
28#include <asm/ucc_slow.h> 27#include <asm/ucc_slow.h>
29 28
30#define uccs_printk(level, format, arg...) \
31 printk(level format "\n", ## arg)
32
33#define uccs_dbg(format, arg...) \
34 uccs_printk(KERN_DEBUG , format , ## arg)
35#define uccs_err(format, arg...) \
36 uccs_printk(KERN_ERR , format , ## arg)
37#define uccs_info(format, arg...) \
38 uccs_printk(KERN_INFO , format , ## arg)
39#define uccs_warn(format, arg...) \
40 uccs_printk(KERN_WARNING , format , ## arg)
41
42#ifdef UCCS_VERBOSE_DEBUG
43#define uccs_vdbg uccs_dbg
44#else
45#define uccs_vdbg(fmt, args...) do { } while (0)
46#endif /* UCCS_VERBOSE_DEBUG */
47
48u32 ucc_slow_get_qe_cr_subblock(int uccs_num) 29u32 ucc_slow_get_qe_cr_subblock(int uccs_num)
49{ 30{
50 switch (uccs_num) { 31 switch (uccs_num) {
@@ -135,51 +116,53 @@ void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode)
135 116
136int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret) 117int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret)
137{ 118{
119 struct ucc_slow_private *uccs;
138 u32 i; 120 u32 i;
139 struct ucc_slow *us_regs; 121 struct ucc_slow *us_regs;
140 u32 gumr; 122 u32 gumr;
141 u8 function_code = 0; 123 struct qe_bd *bd;
142 u8 *bd;
143 struct ucc_slow_private *uccs;
144 u32 id; 124 u32 id;
145 u32 command; 125 u32 command;
146 int ret; 126 int ret = 0;
147
148 uccs_vdbg("%s: IN", __FUNCTION__);
149 127
150 if (!us_info) 128 if (!us_info)
151 return -EINVAL; 129 return -EINVAL;
152 130
153 /* check if the UCC port number is in range. */ 131 /* check if the UCC port number is in range. */
154 if ((us_info->ucc_num < 0) || (us_info->ucc_num > UCC_MAX_NUM - 1)) { 132 if ((us_info->ucc_num < 0) || (us_info->ucc_num > UCC_MAX_NUM - 1)) {
155 uccs_err("ucc_slow_init: Illegal UCC number!"); 133 printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
156 return -EINVAL; 134 return -EINVAL;
157 } 135 }
158 136
159 /* 137 /*
160 * Set mrblr 138 * Set mrblr
161 * Check that 'max_rx_buf_length' is properly aligned (4), unless 139 * Check that 'max_rx_buf_length' is properly aligned (4), unless
162 * rfw is 1, meaning that QE accepts one byte at a time, unlike normal 140 * rfw is 1, meaning that QE accepts one byte at a time, unlike normal
163 * case when QE accepts 32 bits at a time. 141 * case when QE accepts 32 bits at a time.
164 */ 142 */
165 if ((!us_info->rfw) && 143 if ((!us_info->rfw) &&
166 (us_info->max_rx_buf_length & (UCC_SLOW_MRBLR_ALIGNMENT - 1))) { 144 (us_info->max_rx_buf_length & (UCC_SLOW_MRBLR_ALIGNMENT - 1))) {
167 uccs_err("max_rx_buf_length not aligned."); 145 printk(KERN_ERR "max_rx_buf_length not aligned.");
168 return -EINVAL; 146 return -EINVAL;
169 } 147 }
170 148
171 uccs = kzalloc(sizeof(struct ucc_slow_private), GFP_KERNEL); 149 uccs = kzalloc(sizeof(struct ucc_slow_private), GFP_KERNEL);
172 if (!uccs) { 150 if (!uccs) {
173 uccs_err 151 printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
174 ("ucc_slow_init: No memory for UCC slow data structure!");
175 return -ENOMEM; 152 return -ENOMEM;
176 } 153 }
177 154
178 /* Fill slow UCC structure */ 155 /* Fill slow UCC structure */
179 uccs->us_info = us_info; 156 uccs->us_info = us_info;
157 /* Set the PHY base address */
158 uccs->us_regs = ioremap(us_info->regs, sizeof(struct ucc_slow));
159 if (uccs->us_regs == NULL) {
160 printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
161 return -ENOMEM;
162 }
163
180 uccs->saved_uccm = 0; 164 uccs->saved_uccm = 0;
181 uccs->p_rx_frame = 0; 165 uccs->p_rx_frame = 0;
182 uccs->us_regs = us_info->regs;
183 us_regs = uccs->us_regs; 166 us_regs = uccs->us_regs;
184 uccs->p_ucce = (u16 *) & (us_regs->ucce); 167 uccs->p_ucce = (u16 *) & (us_regs->ucce);
185 uccs->p_uccm = (u16 *) & (us_regs->uccm); 168 uccs->p_uccm = (u16 *) & (us_regs->uccm);
@@ -190,24 +173,22 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
190#endif /* STATISTICS */ 173#endif /* STATISTICS */
191 174
192 /* Get PRAM base */ 175 /* Get PRAM base */
193 uccs->us_pram_offset = qe_muram_alloc(UCC_SLOW_PRAM_SIZE, 176 uccs->us_pram_offset =
194 ALIGNMENT_OF_UCC_SLOW_PRAM); 177 qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM);
195 if (IS_MURAM_ERR(uccs->us_pram_offset)) { 178 if (IS_MURAM_ERR(uccs->us_pram_offset)) {
196 uccs_err 179 printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __FUNCTION__);
197 ("ucc_slow_init: Can not allocate MURAM memory "
198 "for Slow UCC.");
199 ucc_slow_free(uccs); 180 ucc_slow_free(uccs);
200 return -ENOMEM; 181 return -ENOMEM;
201 } 182 }
202 id = ucc_slow_get_qe_cr_subblock(us_info->ucc_num); 183 id = ucc_slow_get_qe_cr_subblock(us_info->ucc_num);
203 qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, id, QE_CR_PROTOCOL_UNSPECIFIED, 184 qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, id, QE_CR_PROTOCOL_UNSPECIFIED,
204 (u32) uccs->us_pram_offset); 185 uccs->us_pram_offset);
205 186
206 uccs->us_pram = qe_muram_addr(uccs->us_pram_offset); 187 uccs->us_pram = qe_muram_addr(uccs->us_pram_offset);
207 188
208 /* Init Guemr register */ 189 /* Init Guemr register */
209 if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->regs)))) { 190 if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->regs)))) {
210 uccs_err("ucc_slow_init: Could not init the guemr register."); 191 printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
211 ucc_slow_free(uccs); 192 ucc_slow_free(uccs);
212 return ret; 193 return ret;
213 } 194 }
@@ -216,7 +197,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
216 if ((ret = ucc_set_type(us_info->ucc_num, 197 if ((ret = ucc_set_type(us_info->ucc_num,
217 (struct ucc_common *) (us_info->regs), 198 (struct ucc_common *) (us_info->regs),
218 UCC_SPEED_TYPE_SLOW))) { 199 UCC_SPEED_TYPE_SLOW))) {
219 uccs_err("ucc_slow_init: Could not init the guemr register."); 200 printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
220 ucc_slow_free(uccs); 201 ucc_slow_free(uccs);
221 return ret; 202 return ret;
222 } 203 }
@@ -230,7 +211,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
230 qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd), 211 qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd),
231 QE_ALIGNMENT_OF_BD); 212 QE_ALIGNMENT_OF_BD);
232 if (IS_MURAM_ERR(uccs->rx_base_offset)) { 213 if (IS_MURAM_ERR(uccs->rx_base_offset)) {
233 uccs_err("ucc_slow_init: No memory for Rx BD's."); 214 printk(KERN_ERR "%s: cannot allocate RX BDs", __FUNCTION__);
234 uccs->rx_base_offset = 0; 215 uccs->rx_base_offset = 0;
235 ucc_slow_free(uccs); 216 ucc_slow_free(uccs);
236 return -ENOMEM; 217 return -ENOMEM;
@@ -240,7 +221,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
240 qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd), 221 qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd),
241 QE_ALIGNMENT_OF_BD); 222 QE_ALIGNMENT_OF_BD);
242 if (IS_MURAM_ERR(uccs->tx_base_offset)) { 223 if (IS_MURAM_ERR(uccs->tx_base_offset)) {
243 uccs_err("ucc_slow_init: No memory for Tx BD's."); 224 printk(KERN_ERR "%s: cannot allocate TX BDs", __FUNCTION__);
244 uccs->tx_base_offset = 0; 225 uccs->tx_base_offset = 0;
245 ucc_slow_free(uccs); 226 ucc_slow_free(uccs);
246 return -ENOMEM; 227 return -ENOMEM;
@@ -248,34 +229,33 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
248 229
249 /* Init Tx bds */ 230 /* Init Tx bds */
250 bd = uccs->confBd = uccs->tx_bd = qe_muram_addr(uccs->tx_base_offset); 231 bd = uccs->confBd = uccs->tx_bd = qe_muram_addr(uccs->tx_base_offset);
251 for (i = 0; i < us_info->tx_bd_ring_len; i++) { 232 for (i = 0; i < us_info->tx_bd_ring_len - 1; i++) {
252 /* clear bd buffer */ 233 /* clear bd buffer */
253 out_be32(&(((struct qe_bd *)bd)->buf), 0); 234 out_be32(&bd->buf, 0);
254 /* set bd status and length */ 235 /* set bd status and length */
255 out_be32((u32*)bd, 0); 236 out_be32((u32 *) bd, 0);
256 bd += sizeof(struct qe_bd); 237 bd++;
257 } 238 }
258 bd -= sizeof(struct qe_bd); 239 /* for last BD set Wrap bit */
259 /* set bd status and length */ 240 out_be32(&bd->buf, 0);
260 out_be32((u32*)bd, T_W); /* for last BD set Wrap bit */ 241 out_be32((u32 *) bd, cpu_to_be32(T_W));
261 242
262 /* Init Rx bds */ 243 /* Init Rx bds */
263 bd = uccs->rx_bd = qe_muram_addr(uccs->rx_base_offset); 244 bd = uccs->rx_bd = qe_muram_addr(uccs->rx_base_offset);
264 for (i = 0; i < us_info->rx_bd_ring_len; i++) { 245 for (i = 0; i < us_info->rx_bd_ring_len - 1; i++) {
265 /* set bd status and length */ 246 /* set bd status and length */
266 out_be32((u32*)bd, 0); 247 out_be32((u32*)bd, 0);
267 /* clear bd buffer */ 248 /* clear bd buffer */
268 out_be32(&(((struct qe_bd *)bd)->buf), 0); 249 out_be32(&bd->buf, 0);
269 bd += sizeof(struct qe_bd); 250 bd++;
270 } 251 }
271 bd -= sizeof(struct qe_bd); 252 /* for last BD set Wrap bit */
272 /* set bd status and length */ 253 out_be32((u32*)bd, cpu_to_be32(R_W));
273 out_be32((u32*)bd, R_W); /* for last BD set Wrap bit */ 254 out_be32(&bd->buf, 0);
274 255
275 /* Set GUMR (For more details see the hardware spec.). */ 256 /* Set GUMR (For more details see the hardware spec.). */
276 /* gumr_h */ 257 /* gumr_h */
277 gumr = 0; 258 gumr = us_info->tcrc;
278 gumr |= us_info->tcrc;
279 if (us_info->cdp) 259 if (us_info->cdp)
280 gumr |= UCC_SLOW_GUMR_H_CDP; 260 gumr |= UCC_SLOW_GUMR_H_CDP;
281 if (us_info->ctsp) 261 if (us_info->ctsp)
@@ -295,7 +275,8 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
295 out_be32(&us_regs->gumr_h, gumr); 275 out_be32(&us_regs->gumr_h, gumr);
296 276
297 /* gumr_l */ 277 /* gumr_l */
298 gumr = 0; 278 gumr = us_info->tdcr | us_info->rdcr | us_info->tenc | us_info->renc |
279 us_info->diag | us_info->mode;
299 if (us_info->tci) 280 if (us_info->tci)
300 gumr |= UCC_SLOW_GUMR_L_TCI; 281 gumr |= UCC_SLOW_GUMR_L_TCI;
301 if (us_info->rinv) 282 if (us_info->rinv)
@@ -304,23 +285,14 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
304 gumr |= UCC_SLOW_GUMR_L_TINV; 285 gumr |= UCC_SLOW_GUMR_L_TINV;
305 if (us_info->tend) 286 if (us_info->tend)
306 gumr |= UCC_SLOW_GUMR_L_TEND; 287 gumr |= UCC_SLOW_GUMR_L_TEND;
307 gumr |= us_info->tdcr;
308 gumr |= us_info->rdcr;
309 gumr |= us_info->tenc;
310 gumr |= us_info->renc;
311 gumr |= us_info->diag;
312 gumr |= us_info->mode;
313 out_be32(&us_regs->gumr_l, gumr); 288 out_be32(&us_regs->gumr_l, gumr);
314 289
315 /* Function code registers */ 290 /* Function code registers */
316 /* function_code has initial value 0 */
317 291
318 /* if the data is in cachable memory, the 'global' */ 292 /* if the data is in cachable memory, the 'global' */
319 /* in the function code should be set. */ 293 /* in the function code should be set. */
320 function_code |= us_info->data_mem_part; 294 uccs->us_pram->tfcr = uccs->us_pram->rfcr =
321 function_code |= QE_BMR_BYTE_ORDER_BO_MOT; /* Required for QE */ 295 us_info->data_mem_part | QE_BMR_BYTE_ORDER_BO_MOT;
322 uccs->us_pram->tfcr = function_code;
323 uccs->us_pram->rfcr = function_code;
324 296
325 /* rbase, tbase are offsets from MURAM base */ 297 /* rbase, tbase are offsets from MURAM base */
326 out_be16(&uccs->us_pram->rbase, uccs->us_pram_offset); 298 out_be16(&uccs->us_pram->rbase, uccs->us_pram_offset);
@@ -336,34 +308,29 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
336 /* If NMSI (not Tsa), set Tx and Rx clock. */ 308 /* If NMSI (not Tsa), set Tx and Rx clock. */
337 if (!us_info->tsa) { 309 if (!us_info->tsa) {
338 /* Rx clock routing */ 310 /* Rx clock routing */
339 if (ucc_set_qe_mux_rxtx 311 if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->rx_clock,
340 (us_info->ucc_num, us_info->rx_clock, COMM_DIR_RX)) { 312 COMM_DIR_RX)) {
341 uccs_err 313 printk(KERN_ERR "%s: illegal value for RX clock",
342 ("ucc_slow_init: Illegal value for parameter" 314 __FUNCTION__);
343 " 'RxClock'.");
344 ucc_slow_free(uccs); 315 ucc_slow_free(uccs);
345 return -EINVAL; 316 return -EINVAL;
346 } 317 }
347 /* Tx clock routing */ 318 /* Tx clock routing */
348 if (ucc_set_qe_mux_rxtx(us_info->ucc_num, 319 if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->tx_clock,
349 us_info->tx_clock, COMM_DIR_TX)) { 320 COMM_DIR_TX)) {
350 uccs_err 321 printk(KERN_ERR "%s: illegal value for TX clock",
351 ("ucc_slow_init: Illegal value for parameter " 322 __FUNCTION__);
352 "'TxClock'.");
353 ucc_slow_free(uccs); 323 ucc_slow_free(uccs);
354 return -EINVAL; 324 return -EINVAL;
355 } 325 }
356 } 326 }
357 327
358 /*
359 * INTERRUPTS
360 */
361 /* Set interrupt mask register at UCC level. */ 328 /* Set interrupt mask register at UCC level. */
362 out_be16(&us_regs->uccm, us_info->uccm_mask); 329 out_be16(&us_regs->uccm, us_info->uccm_mask);
363 330
364 /* First, clear anything pending at UCC level, */ 331 /* First, clear anything pending at UCC level,
365 /* otherwise, old garbage may come through */ 332 * otherwise, old garbage may come through
366 /* as soon as the dam is opened. */ 333 * as soon as the dam is opened. */
367 334
368 /* Writing '1' clears */ 335 /* Writing '1' clears */
369 out_be16(&us_regs->ucce, 0xffff); 336 out_be16(&us_regs->ucce, 0xffff);
@@ -400,3 +367,5 @@ void ucc_slow_free(struct ucc_slow_private * uccs)
400 367
401 kfree(uccs); 368 kfree(uccs);
402} 369}
370
371
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-03 17:29:34 -0400