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authorMark Nelson <markn@au1.ibm.com>2010-05-26 17:40:39 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-07-08 21:28:31 -0400
commitb08e281b5ae681abcbc1815c13d4a3eb3df4ff1b (patch)
tree1cffeaffce543e8f387e33ebea8c829d4287acf9 /arch/powerpc
parentae01f84b93b274e2f215bdf6d0b46435679b5f9a (diff)
powerpc/pseries: Rename RAS_VECTOR_OFFSET to RTAS_VECTOR_EXTERNAL_INTERRUPT and move to rtas.h
The RAS code has a #define, RAS_VECTOR_OFFSET, that's used in the check-exception RTAS call for the vector offset of the exception. We'll be using this same vector offset for the upcoming IO Event interrupts code (0x500) so let's move it to include/asm/rtas.h and call it RTAS_VECTOR_EXTERNAL_INTERRUPT. Signed-off-by: Mark Nelson <markn@au1.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/rtas.h3
-rw-r--r--arch/powerpc/platforms/pseries/ras.c5
2 files changed, 5 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 8941c54b30ea..3d35f8ae377e 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -145,6 +145,9 @@ struct rtas_suspend_me_data {
145#define RTAS_TYPE_PMGM_CONFIG_CHANGE 0x70 145#define RTAS_TYPE_PMGM_CONFIG_CHANGE 0x70
146#define RTAS_TYPE_PMGM_SERVICE_PROC 0x71 146#define RTAS_TYPE_PMGM_SERVICE_PROC 0x71
147 147
148/* RTAS check-exception vector offset */
149#define RTAS_VECTOR_EXTERNAL_INTERRUPT 0x500
150
148struct rtas_error_log { 151struct rtas_error_log {
149 unsigned long version:8; /* Architectural version */ 152 unsigned long version:8; /* Architectural version */
150 unsigned long severity:3; /* Severity level of error */ 153 unsigned long severity:3; /* Severity level of error */
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index 41a3e9a039ed..a4fc6da87c2e 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -61,7 +61,6 @@ static int ras_check_exception_token;
61 61
62#define EPOW_SENSOR_TOKEN 9 62#define EPOW_SENSOR_TOKEN 9
63#define EPOW_SENSOR_INDEX 0 63#define EPOW_SENSOR_INDEX 0
64#define RAS_VECTOR_OFFSET 0x500
65 64
66static irqreturn_t ras_epow_interrupt(int irq, void *dev_id); 65static irqreturn_t ras_epow_interrupt(int irq, void *dev_id);
67static irqreturn_t ras_error_interrupt(int irq, void *dev_id); 66static irqreturn_t ras_error_interrupt(int irq, void *dev_id);
@@ -121,7 +120,7 @@ static irqreturn_t ras_epow_interrupt(int irq, void *dev_id)
121 spin_lock(&ras_log_buf_lock); 120 spin_lock(&ras_log_buf_lock);
122 121
123 status = rtas_call(ras_check_exception_token, 6, 1, NULL, 122 status = rtas_call(ras_check_exception_token, 6, 1, NULL,
124 RAS_VECTOR_OFFSET, 123 RTAS_VECTOR_EXTERNAL_INTERRUPT,
125 irq_map[irq].hwirq, 124 irq_map[irq].hwirq,
126 RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS, 125 RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS,
127 critical, __pa(&ras_log_buf), 126 critical, __pa(&ras_log_buf),
@@ -156,7 +155,7 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
156 spin_lock(&ras_log_buf_lock); 155 spin_lock(&ras_log_buf_lock);
157 156
158 status = rtas_call(ras_check_exception_token, 6, 1, NULL, 157 status = rtas_call(ras_check_exception_token, 6, 1, NULL,
159 RAS_VECTOR_OFFSET, 158 RTAS_VECTOR_EXTERNAL_INTERRUPT,
160 irq_map[irq].hwirq, 159 irq_map[irq].hwirq,
161 RTAS_INTERNAL_ERROR, 1 /*Time Critical */, 160 RTAS_INTERNAL_ERROR, 1 /*Time Critical */,
162 __pa(&ras_log_buf), 161 __pa(&ras_log_buf),