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authorPaul Mundt <lethal@linux-sh.org>2011-03-31 02:39:47 -0400
committerPaul Mundt <lethal@linux-sh.org>2011-03-31 02:39:47 -0400
commit7ea5db8efeac8627500e012aa6829ca612c5a700 (patch)
tree90e4de22f60b989dcf0f0d7436978c0b463d5827 /arch/powerpc
parenteee7631fdf8ae63c4f24daf66981ac1a7b55d7fd (diff)
parent6aba74f2791287ec407e0f92487a725a25908067 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into sh-latest
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/Kconfig3
-rw-r--r--arch/powerpc/configs/44x/warp_defconfig1
-rw-r--r--arch/powerpc/configs/52xx/motionpro_defconfig1
-rw-r--r--arch/powerpc/configs/86xx/gef_ppc9a_defconfig1
-rw-r--r--arch/powerpc/configs/86xx/gef_sbc310_defconfig1
-rw-r--r--arch/powerpc/configs/86xx/gef_sbc610_defconfig1
-rw-r--r--arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig1
-rw-r--r--arch/powerpc/configs/e55xx_smp_defconfig1
-rw-r--r--arch/powerpc/configs/linkstation_defconfig1
-rw-r--r--arch/powerpc/configs/mpc512x_defconfig1
-rw-r--r--arch/powerpc/configs/mpc5200_defconfig1
-rw-r--r--arch/powerpc/configs/mpc85xx_defconfig1
-rw-r--r--arch/powerpc/configs/mpc85xx_smp_defconfig1
-rw-r--r--arch/powerpc/configs/mpc86xx_defconfig1
-rw-r--r--arch/powerpc/configs/pasemi_defconfig1
-rw-r--r--arch/powerpc/configs/ppc6xx_defconfig1
-rw-r--r--arch/powerpc/configs/pseries_defconfig3
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h6
-rw-r--r--arch/powerpc/include/asm/mmu-hash64.h2
-rw-r--r--arch/powerpc/include/asm/page.h2
-rw-r--r--arch/powerpc/include/asm/qe_ic.h16
-rw-r--r--arch/powerpc/include/asm/reg_booke.h2
-rw-r--r--arch/powerpc/include/asm/systbl.h4
-rw-r--r--arch/powerpc/include/asm/unistd.h6
-rw-r--r--arch/powerpc/kernel/dma.c18
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S28
-rw-r--r--arch/powerpc/kernel/irq.c81
-rw-r--r--arch/powerpc/kernel/machine_kexec.c6
-rw-r--r--arch/powerpc/kernel/pci-common.c2
-rw-r--r--arch/powerpc/kernel/time.c2
-rw-r--r--arch/powerpc/mm/dma-noncoherent.c20
-rw-r--r--arch/powerpc/platforms/512x/mpc5121_ads_cpld.c6
-rw-r--r--arch/powerpc/platforms/52xx/media5200.c19
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_gpt.c10
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pic.c6
-rw-r--r--arch/powerpc/platforms/82xx/pq2ads-pci-pic.c16
-rw-r--r--arch/powerpc/platforms/85xx/ksi8560.c4
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ads.c4
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_cds.c2
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ds.c4
-rw-r--r--arch/powerpc/platforms/85xx/sbc8560.c4
-rw-r--r--arch/powerpc/platforms/85xx/socrates_fpga_pic.c12
-rw-r--r--arch/powerpc/platforms/85xx/stx_gp3.c4
-rw-r--r--arch/powerpc/platforms/85xx/tqm85xx.c4
-rw-r--r--arch/powerpc/platforms/86xx/gef_pic.c8
-rw-r--r--arch/powerpc/platforms/86xx/pic.c4
-rw-r--r--arch/powerpc/platforms/8xx/m8xx_setup.c6
-rw-r--r--arch/powerpc/platforms/cell/axon_msi.c14
-rw-r--r--arch/powerpc/platforms/cell/beat_interrupt.c5
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c16
-rw-r--r--arch/powerpc/platforms/cell/setup.c8
-rw-r--r--arch/powerpc/platforms/cell/spider-pic.c21
-rw-r--r--arch/powerpc/platforms/chrp/setup.c4
-rw-r--r--arch/powerpc/platforms/embedded6xx/flipper-pic.c10
-rw-r--r--arch/powerpc/platforms/embedded6xx/hlwd-pic.c20
-rw-r--r--arch/powerpc/platforms/embedded6xx/holly.c4
-rw-r--r--arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c4
-rw-r--r--arch/powerpc/platforms/iseries/irq.c4
-rw-r--r--arch/powerpc/platforms/maple/pci.c2
-rw-r--r--arch/powerpc/platforms/pasemi/setup.c2
-rw-r--r--arch/powerpc/platforms/powermac/pci.c2
-rw-r--r--arch/powerpc/platforms/powermac/pic.c17
-rw-r--r--arch/powerpc/platforms/ps3/interrupt.c14
-rw-r--r--arch/powerpc/platforms/pseries/msi.c4
-rw-r--r--arch/powerpc/platforms/pseries/nvram.c24
-rw-r--r--arch/powerpc/platforms/pseries/setup.c4
-rw-r--r--arch/powerpc/platforms/pseries/smp.c4
-rw-r--r--arch/powerpc/platforms/pseries/xics.c79
-rw-r--r--arch/powerpc/sysdev/cpm1.c4
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.c47
-rw-r--r--arch/powerpc/sysdev/fsl_msi.c43
-rw-r--r--arch/powerpc/sysdev/i8259.c8
-rw-r--r--arch/powerpc/sysdev/ipic.c22
-rw-r--r--arch/powerpc/sysdev/mpc8xx_pic.c11
-rw-r--r--arch/powerpc/sysdev/mpc8xxx_gpio.c12
-rw-r--r--arch/powerpc/sysdev/mpic.c43
-rw-r--r--arch/powerpc/sysdev/mpic_pasemi_msi.c8
-rw-r--r--arch/powerpc/sysdev/mpic_u3msi.c8
-rw-r--r--arch/powerpc/sysdev/mv64x60_pic.c5
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_ic.c16
-rw-r--r--arch/powerpc/sysdev/tsi108_pci.c6
-rw-r--r--arch/powerpc/sysdev/uic.c41
-rw-r--r--arch/powerpc/sysdev/xilinx_intc.c20
83 files changed, 439 insertions, 446 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 3584e4d4a4ad..b6ff882f695b 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -138,7 +138,8 @@ config PPC
138 select HAVE_GENERIC_HARDIRQS 138 select HAVE_GENERIC_HARDIRQS
139 select HAVE_SPARSE_IRQ 139 select HAVE_SPARSE_IRQ
140 select IRQ_PER_CPU 140 select IRQ_PER_CPU
141 select GENERIC_HARDIRQS_NO_DEPRECATED 141 select GENERIC_IRQ_SHOW
142 select GENERIC_IRQ_SHOW_LEVEL
142 143
143config EARLY_PRINTK 144config EARLY_PRINTK
144 bool 145 bool
diff --git a/arch/powerpc/configs/44x/warp_defconfig b/arch/powerpc/configs/44x/warp_defconfig
index 6cf9d6614805..abf74dc1f79c 100644
--- a/arch/powerpc/configs/44x/warp_defconfig
+++ b/arch/powerpc/configs/44x/warp_defconfig
@@ -47,6 +47,7 @@ CONFIG_MTD_NAND_NDFC=y
47CONFIG_MTD_UBI=y 47CONFIG_MTD_UBI=y
48CONFIG_PROC_DEVICETREE=y 48CONFIG_PROC_DEVICETREE=y
49CONFIG_BLK_DEV_RAM=y 49CONFIG_BLK_DEV_RAM=y
50CONFIG_MISC_DEVICES=y
50CONFIG_EEPROM_AT24=y 51CONFIG_EEPROM_AT24=y
51CONFIG_SCSI=y 52CONFIG_SCSI=y
52CONFIG_BLK_DEV_SD=y 53CONFIG_BLK_DEV_SD=y
diff --git a/arch/powerpc/configs/52xx/motionpro_defconfig b/arch/powerpc/configs/52xx/motionpro_defconfig
index 6828eda02bdc..0c7de9620ea6 100644
--- a/arch/powerpc/configs/52xx/motionpro_defconfig
+++ b/arch/powerpc/configs/52xx/motionpro_defconfig
@@ -43,6 +43,7 @@ CONFIG_PROC_DEVICETREE=y
43CONFIG_BLK_DEV_LOOP=y 43CONFIG_BLK_DEV_LOOP=y
44CONFIG_BLK_DEV_RAM=y 44CONFIG_BLK_DEV_RAM=y
45CONFIG_BLK_DEV_RAM_SIZE=32768 45CONFIG_BLK_DEV_RAM_SIZE=32768
46CONFIG_MISC_DEVICES=y
46CONFIG_EEPROM_LEGACY=y 47CONFIG_EEPROM_LEGACY=y
47CONFIG_SCSI_TGT=y 48CONFIG_SCSI_TGT=y
48CONFIG_BLK_DEV_SD=y 49CONFIG_BLK_DEV_SD=y
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
index 4b2441244eab..d41857a5152d 100644
--- a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -85,6 +85,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
85CONFIG_BLK_DEV_NBD=m 85CONFIG_BLK_DEV_NBD=m
86CONFIG_BLK_DEV_RAM=y 86CONFIG_BLK_DEV_RAM=y
87CONFIG_BLK_DEV_RAM_SIZE=131072 87CONFIG_BLK_DEV_RAM_SIZE=131072
88CONFIG_MISC_DEVICES=y
88CONFIG_DS1682=y 89CONFIG_DS1682=y
89CONFIG_IDE=y 90CONFIG_IDE=y
90CONFIG_BLK_DEV_IDECS=y 91CONFIG_BLK_DEV_IDECS=y
diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
index a360ba44b928..38303ec11bcd 100644
--- a/arch/powerpc/configs/86xx/gef_sbc310_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
@@ -85,6 +85,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
85CONFIG_BLK_DEV_NBD=m 85CONFIG_BLK_DEV_NBD=m
86CONFIG_BLK_DEV_RAM=y 86CONFIG_BLK_DEV_RAM=y
87CONFIG_BLK_DEV_RAM_SIZE=131072 87CONFIG_BLK_DEV_RAM_SIZE=131072
88CONFIG_MISC_DEVICES=y
88CONFIG_DS1682=y 89CONFIG_DS1682=y
89CONFIG_IDE=y 90CONFIG_IDE=y
90CONFIG_BLK_DEV_IDECS=y 91CONFIG_BLK_DEV_IDECS=y
diff --git a/arch/powerpc/configs/86xx/gef_sbc610_defconfig b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
index be2829dd129f..98533973d20f 100644
--- a/arch/powerpc/configs/86xx/gef_sbc610_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
@@ -138,6 +138,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
138CONFIG_BLK_DEV_NBD=m 138CONFIG_BLK_DEV_NBD=m
139CONFIG_BLK_DEV_RAM=y 139CONFIG_BLK_DEV_RAM=y
140CONFIG_BLK_DEV_RAM_SIZE=131072 140CONFIG_BLK_DEV_RAM_SIZE=131072
141CONFIG_MISC_DEVICES=y
141CONFIG_DS1682=y 142CONFIG_DS1682=y
142CONFIG_BLK_DEV_SD=y 143CONFIG_BLK_DEV_SD=y
143CONFIG_CHR_DEV_ST=y 144CONFIG_CHR_DEV_ST=y
diff --git a/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
index 0c9c7ed7ec75..b614508d6fd2 100644
--- a/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
+++ b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
@@ -63,6 +63,7 @@ CONFIG_BLK_DEV_LOOP=y
63CONFIG_BLK_DEV_NBD=y 63CONFIG_BLK_DEV_NBD=y
64CONFIG_BLK_DEV_RAM=y 64CONFIG_BLK_DEV_RAM=y
65CONFIG_BLK_DEV_RAM_SIZE=131072 65CONFIG_BLK_DEV_RAM_SIZE=131072
66CONFIG_MISC_DEVICES=y
66CONFIG_EEPROM_LEGACY=y 67CONFIG_EEPROM_LEGACY=y
67CONFIG_BLK_DEV_SD=y 68CONFIG_BLK_DEV_SD=y
68CONFIG_CHR_DEV_ST=y 69CONFIG_CHR_DEV_ST=y
diff --git a/arch/powerpc/configs/e55xx_smp_defconfig b/arch/powerpc/configs/e55xx_smp_defconfig
index 06f95492afc7..9fa1613e5e2b 100644
--- a/arch/powerpc/configs/e55xx_smp_defconfig
+++ b/arch/powerpc/configs/e55xx_smp_defconfig
@@ -32,6 +32,7 @@ CONFIG_PROC_DEVICETREE=y
32CONFIG_BLK_DEV_LOOP=y 32CONFIG_BLK_DEV_LOOP=y
33CONFIG_BLK_DEV_RAM=y 33CONFIG_BLK_DEV_RAM=y
34CONFIG_BLK_DEV_RAM_SIZE=131072 34CONFIG_BLK_DEV_RAM_SIZE=131072
35CONFIG_MISC_DEVICES=y
35CONFIG_EEPROM_LEGACY=y 36CONFIG_EEPROM_LEGACY=y
36CONFIG_INPUT_FF_MEMLESS=m 37CONFIG_INPUT_FF_MEMLESS=m
37# CONFIG_INPUT_MOUSEDEV is not set 38# CONFIG_INPUT_MOUSEDEV is not set
diff --git a/arch/powerpc/configs/linkstation_defconfig b/arch/powerpc/configs/linkstation_defconfig
index f39d0cf876dd..8a874b999867 100644
--- a/arch/powerpc/configs/linkstation_defconfig
+++ b/arch/powerpc/configs/linkstation_defconfig
@@ -78,6 +78,7 @@ CONFIG_BLK_DEV_LOOP=y
78CONFIG_BLK_DEV_RAM=y 78CONFIG_BLK_DEV_RAM=y
79CONFIG_BLK_DEV_RAM_COUNT=2 79CONFIG_BLK_DEV_RAM_COUNT=2
80CONFIG_BLK_DEV_RAM_SIZE=8192 80CONFIG_BLK_DEV_RAM_SIZE=8192
81CONFIG_MISC_DEVICES=y
81CONFIG_EEPROM_LEGACY=m 82CONFIG_EEPROM_LEGACY=m
82CONFIG_BLK_DEV_SD=y 83CONFIG_BLK_DEV_SD=y
83CONFIG_CHR_DEV_SG=y 84CONFIG_CHR_DEV_SG=y
diff --git a/arch/powerpc/configs/mpc512x_defconfig b/arch/powerpc/configs/mpc512x_defconfig
index 62db8a3df162..c02bbb2fddf8 100644
--- a/arch/powerpc/configs/mpc512x_defconfig
+++ b/arch/powerpc/configs/mpc512x_defconfig
@@ -61,6 +61,7 @@ CONFIG_BLK_DEV_RAM=y
61CONFIG_BLK_DEV_RAM_COUNT=1 61CONFIG_BLK_DEV_RAM_COUNT=1
62CONFIG_BLK_DEV_RAM_SIZE=8192 62CONFIG_BLK_DEV_RAM_SIZE=8192
63CONFIG_BLK_DEV_XIP=y 63CONFIG_BLK_DEV_XIP=y
64CONFIG_MISC_DEVICES=y
64CONFIG_EEPROM_AT24=y 65CONFIG_EEPROM_AT24=y
65CONFIG_SCSI=y 66CONFIG_SCSI=y
66# CONFIG_SCSI_PROC_FS is not set 67# CONFIG_SCSI_PROC_FS is not set
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
index 7376e27b8ed4..e63f537b854a 100644
--- a/arch/powerpc/configs/mpc5200_defconfig
+++ b/arch/powerpc/configs/mpc5200_defconfig
@@ -52,6 +52,7 @@ CONFIG_PROC_DEVICETREE=y
52CONFIG_BLK_DEV_LOOP=y 52CONFIG_BLK_DEV_LOOP=y
53CONFIG_BLK_DEV_RAM=y 53CONFIG_BLK_DEV_RAM=y
54CONFIG_BLK_DEV_RAM_SIZE=32768 54CONFIG_BLK_DEV_RAM_SIZE=32768
55CONFIG_MISC_DEVICES=y
55CONFIG_EEPROM_AT24=y 56CONFIG_EEPROM_AT24=y
56CONFIG_SCSI_TGT=y 57CONFIG_SCSI_TGT=y
57CONFIG_BLK_DEV_SD=y 58CONFIG_BLK_DEV_SD=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index 99a19d1e9bf8..c06a86c33098 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -82,6 +82,7 @@ CONFIG_BLK_DEV_LOOP=y
82CONFIG_BLK_DEV_NBD=y 82CONFIG_BLK_DEV_NBD=y
83CONFIG_BLK_DEV_RAM=y 83CONFIG_BLK_DEV_RAM=y
84CONFIG_BLK_DEV_RAM_SIZE=131072 84CONFIG_BLK_DEV_RAM_SIZE=131072
85CONFIG_MISC_DEVICES=y
85CONFIG_EEPROM_LEGACY=y 86CONFIG_EEPROM_LEGACY=y
86CONFIG_BLK_DEV_SD=y 87CONFIG_BLK_DEV_SD=y
87CONFIG_CHR_DEV_ST=y 88CONFIG_CHR_DEV_ST=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index c636f23f8c92..942ced90557c 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -84,6 +84,7 @@ CONFIG_BLK_DEV_LOOP=y
84CONFIG_BLK_DEV_NBD=y 84CONFIG_BLK_DEV_NBD=y
85CONFIG_BLK_DEV_RAM=y 85CONFIG_BLK_DEV_RAM=y
86CONFIG_BLK_DEV_RAM_SIZE=131072 86CONFIG_BLK_DEV_RAM_SIZE=131072
87CONFIG_MISC_DEVICES=y
87CONFIG_EEPROM_LEGACY=y 88CONFIG_EEPROM_LEGACY=y
88CONFIG_BLK_DEV_SD=y 89CONFIG_BLK_DEV_SD=y
89CONFIG_CHR_DEV_ST=y 90CONFIG_CHR_DEV_ST=y
diff --git a/arch/powerpc/configs/mpc86xx_defconfig b/arch/powerpc/configs/mpc86xx_defconfig
index 55b54318fef6..038a308cbfc4 100644
--- a/arch/powerpc/configs/mpc86xx_defconfig
+++ b/arch/powerpc/configs/mpc86xx_defconfig
@@ -66,6 +66,7 @@ CONFIG_BLK_DEV_LOOP=y
66CONFIG_BLK_DEV_NBD=y 66CONFIG_BLK_DEV_NBD=y
67CONFIG_BLK_DEV_RAM=y 67CONFIG_BLK_DEV_RAM=y
68CONFIG_BLK_DEV_RAM_SIZE=131072 68CONFIG_BLK_DEV_RAM_SIZE=131072
69CONFIG_MISC_DEVICES=y
69CONFIG_EEPROM_LEGACY=y 70CONFIG_EEPROM_LEGACY=y
70CONFIG_BLK_DEV_SD=y 71CONFIG_BLK_DEV_SD=y
71CONFIG_CHR_DEV_ST=y 72CONFIG_CHR_DEV_ST=y
diff --git a/arch/powerpc/configs/pasemi_defconfig b/arch/powerpc/configs/pasemi_defconfig
index edd2d54c8196..f4deb0b78cf0 100644
--- a/arch/powerpc/configs/pasemi_defconfig
+++ b/arch/powerpc/configs/pasemi_defconfig
@@ -59,6 +59,7 @@ CONFIG_PROC_DEVICETREE=y
59CONFIG_BLK_DEV_LOOP=y 59CONFIG_BLK_DEV_LOOP=y
60CONFIG_BLK_DEV_RAM=y 60CONFIG_BLK_DEV_RAM=y
61CONFIG_BLK_DEV_RAM_SIZE=16384 61CONFIG_BLK_DEV_RAM_SIZE=16384
62CONFIG_MISC_DEVICES=y
62CONFIG_EEPROM_LEGACY=y 63CONFIG_EEPROM_LEGACY=y
63CONFIG_IDE=y 64CONFIG_IDE=y
64CONFIG_BLK_DEV_IDECD=y 65CONFIG_BLK_DEV_IDECD=y
diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig
index 9d64a6822d86..0a10fb009ef7 100644
--- a/arch/powerpc/configs/ppc6xx_defconfig
+++ b/arch/powerpc/configs/ppc6xx_defconfig
@@ -398,6 +398,7 @@ CONFIG_BLK_DEV_RAM_SIZE=16384
398CONFIG_CDROM_PKTCDVD=m 398CONFIG_CDROM_PKTCDVD=m
399CONFIG_VIRTIO_BLK=m 399CONFIG_VIRTIO_BLK=m
400CONFIG_BLK_DEV_HD=y 400CONFIG_BLK_DEV_HD=y
401CONFIG_MISC_DEVICES=y
401CONFIG_ENCLOSURE_SERVICES=m 402CONFIG_ENCLOSURE_SERVICES=m
402CONFIG_SENSORS_TSL2550=m 403CONFIG_SENSORS_TSL2550=m
403CONFIG_EEPROM_AT24=m 404CONFIG_EEPROM_AT24=m
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 9c3f22c6cde1..249ddd0a27cd 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -189,6 +189,7 @@ CONFIG_TIGON3=y
189CONFIG_BNX2=m 189CONFIG_BNX2=m
190CONFIG_CHELSIO_T1=m 190CONFIG_CHELSIO_T1=m
191CONFIG_CHELSIO_T3=m 191CONFIG_CHELSIO_T3=m
192CONFIG_CHELSIO_T4=m
192CONFIG_EHEA=y 193CONFIG_EHEA=y
193CONFIG_IXGBE=m 194CONFIG_IXGBE=m
194CONFIG_IXGB=m 195CONFIG_IXGB=m
@@ -255,6 +256,8 @@ CONFIG_INFINIBAND_USER_MAD=m
255CONFIG_INFINIBAND_USER_ACCESS=m 256CONFIG_INFINIBAND_USER_ACCESS=m
256CONFIG_INFINIBAND_MTHCA=m 257CONFIG_INFINIBAND_MTHCA=m
257CONFIG_INFINIBAND_EHCA=m 258CONFIG_INFINIBAND_EHCA=m
259CONFIG_INFINIBAND_CXGB3=m
260CONFIG_INFINIBAND_CXGB4=m
258CONFIG_MLX4_INFINIBAND=m 261CONFIG_MLX4_INFINIBAND=m
259CONFIG_INFINIBAND_IPOIB=m 262CONFIG_INFINIBAND_IPOIB=m
260CONFIG_INFINIBAND_IPOIB_CM=y 263CONFIG_INFINIBAND_IPOIB_CM=y
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 6d2416a85709..dd70fac57ec8 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -42,6 +42,7 @@ extern void __dma_free_coherent(size_t size, void *vaddr);
42extern void __dma_sync(void *vaddr, size_t size, int direction); 42extern void __dma_sync(void *vaddr, size_t size, int direction);
43extern void __dma_sync_page(struct page *page, unsigned long offset, 43extern void __dma_sync_page(struct page *page, unsigned long offset,
44 size_t size, int direction); 44 size_t size, int direction);
45extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
45 46
46#else /* ! CONFIG_NOT_COHERENT_CACHE */ 47#else /* ! CONFIG_NOT_COHERENT_CACHE */
47/* 48/*
@@ -198,6 +199,11 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
198#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 199#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
199#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 200#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
200 201
202extern int dma_mmap_coherent(struct device *, struct vm_area_struct *,
203 void *, dma_addr_t, size_t);
204#define ARCH_HAS_DMA_MMAP_COHERENT
205
206
201static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 207static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
202 enum dma_data_direction direction) 208 enum dma_data_direction direction)
203{ 209{
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index acac35d5b382..ae7b3efec8e5 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -27,7 +27,7 @@
27#define STE_VSID_SHIFT 12 27#define STE_VSID_SHIFT 12
28 28
29/* Location of cpu0's segment table */ 29/* Location of cpu0's segment table */
30#define STAB0_PAGE 0x6 30#define STAB0_PAGE 0x8
31#define STAB0_OFFSET (STAB0_PAGE << 12) 31#define STAB0_OFFSET (STAB0_PAGE << 12)
32#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START) 32#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START)
33 33
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index da4b20008541..2cd664ef0a5e 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -100,7 +100,7 @@ extern phys_addr_t kernstart_addr;
100#endif 100#endif
101 101
102#ifdef CONFIG_FLATMEM 102#ifdef CONFIG_FLATMEM
103#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT) 103#define ARCH_PFN_OFFSET ((unsigned long)(MEMORY_START >> PAGE_SHIFT))
104#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr) 104#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
105#endif 105#endif
106 106
diff --git a/arch/powerpc/include/asm/qe_ic.h b/arch/powerpc/include/asm/qe_ic.h
index 9e2cb2019161..f706164b0bd0 100644
--- a/arch/powerpc/include/asm/qe_ic.h
+++ b/arch/powerpc/include/asm/qe_ic.h
@@ -81,7 +81,7 @@ int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high);
81static inline void qe_ic_cascade_low_ipic(unsigned int irq, 81static inline void qe_ic_cascade_low_ipic(unsigned int irq,
82 struct irq_desc *desc) 82 struct irq_desc *desc)
83{ 83{
84 struct qe_ic *qe_ic = get_irq_desc_data(desc); 84 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
85 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); 85 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
86 86
87 if (cascade_irq != NO_IRQ) 87 if (cascade_irq != NO_IRQ)
@@ -91,7 +91,7 @@ static inline void qe_ic_cascade_low_ipic(unsigned int irq,
91static inline void qe_ic_cascade_high_ipic(unsigned int irq, 91static inline void qe_ic_cascade_high_ipic(unsigned int irq,
92 struct irq_desc *desc) 92 struct irq_desc *desc)
93{ 93{
94 struct qe_ic *qe_ic = get_irq_desc_data(desc); 94 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
95 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); 95 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
96 96
97 if (cascade_irq != NO_IRQ) 97 if (cascade_irq != NO_IRQ)
@@ -101,9 +101,9 @@ static inline void qe_ic_cascade_high_ipic(unsigned int irq,
101static inline void qe_ic_cascade_low_mpic(unsigned int irq, 101static inline void qe_ic_cascade_low_mpic(unsigned int irq,
102 struct irq_desc *desc) 102 struct irq_desc *desc)
103{ 103{
104 struct qe_ic *qe_ic = get_irq_desc_data(desc); 104 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
105 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); 105 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
106 struct irq_chip *chip = get_irq_desc_chip(desc); 106 struct irq_chip *chip = irq_desc_get_chip(desc);
107 107
108 if (cascade_irq != NO_IRQ) 108 if (cascade_irq != NO_IRQ)
109 generic_handle_irq(cascade_irq); 109 generic_handle_irq(cascade_irq);
@@ -114,9 +114,9 @@ static inline void qe_ic_cascade_low_mpic(unsigned int irq,
114static inline void qe_ic_cascade_high_mpic(unsigned int irq, 114static inline void qe_ic_cascade_high_mpic(unsigned int irq,
115 struct irq_desc *desc) 115 struct irq_desc *desc)
116{ 116{
117 struct qe_ic *qe_ic = get_irq_desc_data(desc); 117 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
118 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); 118 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
119 struct irq_chip *chip = get_irq_desc_chip(desc); 119 struct irq_chip *chip = irq_desc_get_chip(desc);
120 120
121 if (cascade_irq != NO_IRQ) 121 if (cascade_irq != NO_IRQ)
122 generic_handle_irq(cascade_irq); 122 generic_handle_irq(cascade_irq);
@@ -127,9 +127,9 @@ static inline void qe_ic_cascade_high_mpic(unsigned int irq,
127static inline void qe_ic_cascade_muxed_mpic(unsigned int irq, 127static inline void qe_ic_cascade_muxed_mpic(unsigned int irq,
128 struct irq_desc *desc) 128 struct irq_desc *desc)
129{ 129{
130 struct qe_ic *qe_ic = get_irq_desc_data(desc); 130 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
131 unsigned int cascade_irq; 131 unsigned int cascade_irq;
132 struct irq_chip *chip = get_irq_desc_chip(desc); 132 struct irq_chip *chip = irq_desc_get_chip(desc);
133 133
134 cascade_irq = qe_ic_get_high_irq(qe_ic); 134 cascade_irq = qe_ic_get_high_irq(qe_ic);
135 if (cascade_irq == NO_IRQ) 135 if (cascade_irq == NO_IRQ)
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 86ad8128963a..3b1a9b707362 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -110,7 +110,7 @@
110#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */ 110#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */
111#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */ 111#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */
112#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */ 112#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */
113#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */ 113#define SPRN_MAS5 0x153 /* MMU Assist Register 5 */
114#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */ 114#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */
115#define SPRN_PID1 0x279 /* Process ID Register 1 */ 115#define SPRN_PID1 0x279 /* Process ID Register 1 */
116#define SPRN_PID2 0x27A /* Process ID Register 2 */ 116#define SPRN_PID2 0x27A /* Process ID Register 2 */
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index aa0f1ebb4aaf..60f64b132bd4 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -348,3 +348,7 @@ COMPAT_SYS_SPU(sendmsg)
348COMPAT_SYS_SPU(recvmsg) 348COMPAT_SYS_SPU(recvmsg)
349COMPAT_SYS_SPU(recvmmsg) 349COMPAT_SYS_SPU(recvmmsg)
350SYSCALL_SPU(accept4) 350SYSCALL_SPU(accept4)
351SYSCALL_SPU(name_to_handle_at)
352COMPAT_SYS_SPU(open_by_handle_at)
353COMPAT_SYS_SPU(clock_adjtime)
354SYSCALL_SPU(syncfs)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 6151937657f6..3c215648ce6d 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -367,10 +367,14 @@
367#define __NR_recvmsg 342 367#define __NR_recvmsg 342
368#define __NR_recvmmsg 343 368#define __NR_recvmmsg 343
369#define __NR_accept4 344 369#define __NR_accept4 344
370#define __NR_name_to_handle_at 345
371#define __NR_open_by_handle_at 346
372#define __NR_clock_adjtime 347
373#define __NR_syncfs 348
370 374
371#ifdef __KERNEL__ 375#ifdef __KERNEL__
372 376
373#define __NR_syscalls 345 377#define __NR_syscalls 349
374 378
375#define __NR__exit __NR_exit 379#define __NR__exit __NR_exit
376#define NR_syscalls __NR_syscalls 380#define NR_syscalls __NR_syscalls
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index cf02cad62d9a..d238c082c3c5 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -179,3 +179,21 @@ static int __init dma_init(void)
179 return 0; 179 return 0;
180} 180}
181fs_initcall(dma_init); 181fs_initcall(dma_init);
182
183int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
184 void *cpu_addr, dma_addr_t handle, size_t size)
185{
186 unsigned long pfn;
187
188#ifdef CONFIG_NOT_COHERENT_CACHE
189 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
190 pfn = __dma_get_coherent_pfn((unsigned long)cpu_addr);
191#else
192 pfn = page_to_pfn(virt_to_page(cpu_addr));
193#endif
194 return remap_pfn_range(vma, vma->vm_start,
195 pfn + vma->vm_pgoff,
196 vma->vm_end - vma->vm_start,
197 vma->vm_page_prot);
198}
199EXPORT_SYMBOL_GPL(dma_mmap_coherent);
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 8a817995b4cd..c532cb2c927a 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -977,20 +977,6 @@ _GLOBAL(do_stab_bolted)
977 rfid 977 rfid
978 b . /* prevent speculative execution */ 978 b . /* prevent speculative execution */
979 979
980/*
981 * Space for CPU0's segment table.
982 *
983 * On iSeries, the hypervisor must fill in at least one entry before
984 * we get control (with relocate on). The address is given to the hv
985 * as a page number (see xLparMap below), so this must be at a
986 * fixed address (the linker can't compute (u64)&initial_stab >>
987 * PAGE_SHIFT).
988 */
989 . = STAB0_OFFSET /* 0x6000 */
990 .globl initial_stab
991initial_stab:
992 .space 4096
993
994#ifdef CONFIG_PPC_PSERIES 980#ifdef CONFIG_PPC_PSERIES
995/* 981/*
996 * Data area reserved for FWNMI option. 982 * Data area reserved for FWNMI option.
@@ -1027,3 +1013,17 @@ xLparMap:
1027#ifdef CONFIG_PPC_PSERIES 1013#ifdef CONFIG_PPC_PSERIES
1028 . = 0x8000 1014 . = 0x8000
1029#endif /* CONFIG_PPC_PSERIES */ 1015#endif /* CONFIG_PPC_PSERIES */
1016
1017/*
1018 * Space for CPU0's segment table.
1019 *
1020 * On iSeries, the hypervisor must fill in at least one entry before
1021 * we get control (with relocate on). The address is given to the hv
1022 * as a page number (see xLparMap above), so this must be at a
1023 * fixed address (the linker can't compute (u64)&initial_stab >>
1024 * PAGE_SHIFT).
1025 */
1026 . = STAB0_OFFSET /* 0x8000 */
1027 .globl initial_stab
1028initial_stab:
1029 .space 4096
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 0a5570338b96..63625e0650b5 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -195,7 +195,7 @@ notrace void arch_local_irq_restore(unsigned long en)
195EXPORT_SYMBOL(arch_local_irq_restore); 195EXPORT_SYMBOL(arch_local_irq_restore);
196#endif /* CONFIG_PPC64 */ 196#endif /* CONFIG_PPC64 */
197 197
198static int show_other_interrupts(struct seq_file *p, int prec) 198int arch_show_interrupts(struct seq_file *p, int prec)
199{ 199{
200 int j; 200 int j;
201 201
@@ -231,65 +231,6 @@ static int show_other_interrupts(struct seq_file *p, int prec)
231 return 0; 231 return 0;
232} 232}
233 233
234int show_interrupts(struct seq_file *p, void *v)
235{
236 unsigned long flags, any_count = 0;
237 int i = *(loff_t *) v, j, prec;
238 struct irqaction *action;
239 struct irq_desc *desc;
240 struct irq_chip *chip;
241
242 if (i > nr_irqs)
243 return 0;
244
245 for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
246 j *= 10;
247
248 if (i == nr_irqs)
249 return show_other_interrupts(p, prec);
250
251 /* print header */
252 if (i == 0) {
253 seq_printf(p, "%*s", prec + 8, "");
254 for_each_online_cpu(j)
255 seq_printf(p, "CPU%-8d", j);
256 seq_putc(p, '\n');
257 }
258
259 desc = irq_to_desc(i);
260 if (!desc)
261 return 0;
262
263 raw_spin_lock_irqsave(&desc->lock, flags);
264 for_each_online_cpu(j)
265 any_count |= kstat_irqs_cpu(i, j);
266 action = desc->action;
267 if (!action && !any_count)
268 goto out;
269
270 seq_printf(p, "%*d: ", prec, i);
271 for_each_online_cpu(j)
272 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
273
274 chip = get_irq_desc_chip(desc);
275 if (chip)
276 seq_printf(p, " %-16s", chip->name);
277 else
278 seq_printf(p, " %-16s", "None");
279 seq_printf(p, " %-8s", (desc->status & IRQ_LEVEL) ? "Level" : "Edge");
280
281 if (action) {
282 seq_printf(p, " %s", action->name);
283 while ((action = action->next) != NULL)
284 seq_printf(p, ", %s", action->name);
285 }
286
287 seq_putc(p, '\n');
288out:
289 raw_spin_unlock_irqrestore(&desc->lock, flags);
290 return 0;
291}
292
293/* 234/*
294 * /proc/stat helpers 235 * /proc/stat helpers
295 */ 236 */
@@ -315,24 +256,26 @@ void fixup_irqs(const struct cpumask *map)
315 alloc_cpumask_var(&mask, GFP_KERNEL); 256 alloc_cpumask_var(&mask, GFP_KERNEL);
316 257
317 for_each_irq(irq) { 258 for_each_irq(irq) {
259 struct irq_data *data;
318 struct irq_chip *chip; 260 struct irq_chip *chip;
319 261
320 desc = irq_to_desc(irq); 262 desc = irq_to_desc(irq);
321 if (!desc) 263 if (!desc)
322 continue; 264 continue;
323 265
324 if (desc->status & IRQ_PER_CPU) 266 data = irq_desc_get_irq_data(desc);
267 if (irqd_is_per_cpu(data))
325 continue; 268 continue;
326 269
327 chip = get_irq_desc_chip(desc); 270 chip = irq_data_get_irq_chip(data);
328 271
329 cpumask_and(mask, desc->irq_data.affinity, map); 272 cpumask_and(mask, data->affinity, map);
330 if (cpumask_any(mask) >= nr_cpu_ids) { 273 if (cpumask_any(mask) >= nr_cpu_ids) {
331 printk("Breaking affinity for irq %i\n", irq); 274 printk("Breaking affinity for irq %i\n", irq);
332 cpumask_copy(mask, map); 275 cpumask_copy(mask, map);
333 } 276 }
334 if (chip->irq_set_affinity) 277 if (chip->irq_set_affinity)
335 chip->irq_set_affinity(&desc->irq_data, mask, true); 278 chip->irq_set_affinity(data, mask, true);
336 else if (desc->action && !(warned++)) 279 else if (desc->action && !(warned++))
337 printk("Cannot set affinity for irq %i\n", irq); 280 printk("Cannot set affinity for irq %i\n", irq);
338 } 281 }
@@ -618,7 +561,7 @@ struct irq_host *irq_alloc_host(struct device_node *of_node,
618 smp_wmb(); 561 smp_wmb();
619 562
620 /* Clear norequest flags */ 563 /* Clear norequest flags */
621 irq_to_desc(i)->status &= ~IRQ_NOREQUEST; 564 irq_clear_status_flags(i, IRQ_NOREQUEST);
622 565
623 /* Legacy flags are left to default at this point, 566 /* Legacy flags are left to default at this point,
624 * one can then use irq_create_mapping() to 567 * one can then use irq_create_mapping() to
@@ -827,8 +770,8 @@ unsigned int irq_create_of_mapping(struct device_node *controller,
827 770
828 /* Set type if specified and different than the current one */ 771 /* Set type if specified and different than the current one */
829 if (type != IRQ_TYPE_NONE && 772 if (type != IRQ_TYPE_NONE &&
830 type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK)) 773 type != (irqd_get_trigger_type(irq_get_irq_data(virq))))
831 set_irq_type(virq, type); 774 irq_set_irq_type(virq, type);
832 return virq; 775 return virq;
833} 776}
834EXPORT_SYMBOL_GPL(irq_create_of_mapping); 777EXPORT_SYMBOL_GPL(irq_create_of_mapping);
@@ -851,7 +794,7 @@ void irq_dispose_mapping(unsigned int virq)
851 return; 794 return;
852 795
853 /* remove chip and handler */ 796 /* remove chip and handler */
854 set_irq_chip_and_handler(virq, NULL, NULL); 797 irq_set_chip_and_handler(virq, NULL, NULL);
855 798
856 /* Make sure it's completed */ 799 /* Make sure it's completed */
857 synchronize_irq(virq); 800 synchronize_irq(virq);
@@ -1156,7 +1099,7 @@ static int virq_debug_show(struct seq_file *m, void *private)
1156 seq_printf(m, "%5d ", i); 1099 seq_printf(m, "%5d ", i);
1157 seq_printf(m, "0x%05lx ", virq_to_hw(i)); 1100 seq_printf(m, "0x%05lx ", virq_to_hw(i));
1158 1101
1159 chip = get_irq_desc_chip(desc); 1102 chip = irq_desc_get_chip(desc);
1160 if (chip && chip->name) 1103 if (chip && chip->name)
1161 p = chip->name; 1104 p = chip->name;
1162 else 1105 else
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index bd1e1ff17b2d..7ee50f0547cb 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -31,17 +31,17 @@ void machine_kexec_mask_interrupts(void) {
31 if (!desc) 31 if (!desc)
32 continue; 32 continue;
33 33
34 chip = get_irq_desc_chip(desc); 34 chip = irq_desc_get_chip(desc);
35 if (!chip) 35 if (!chip)
36 continue; 36 continue;
37 37
38 if (chip->irq_eoi && desc->status & IRQ_INPROGRESS) 38 if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data))
39 chip->irq_eoi(&desc->irq_data); 39 chip->irq_eoi(&desc->irq_data);
40 40
41 if (chip->irq_mask) 41 if (chip->irq_mask)
42 chip->irq_mask(&desc->irq_data); 42 chip->irq_mask(&desc->irq_data);
43 43
44 if (chip->irq_disable && !(desc->status & IRQ_DISABLED)) 44 if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data))
45 chip->irq_disable(&desc->irq_data); 45 chip->irq_disable(&desc->irq_data);
46 } 46 }
47} 47}
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 3cd85faa8ac6..893af2a9cd03 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -261,7 +261,7 @@ int pci_read_irq_line(struct pci_dev *pci_dev)
261 261
262 virq = irq_create_mapping(NULL, line); 262 virq = irq_create_mapping(NULL, line);
263 if (virq != NO_IRQ) 263 if (virq != NO_IRQ)
264 set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); 264 irq_set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
265 } else { 265 } else {
266 pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n", 266 pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
267 oirq.size, oirq.specifier[0], oirq.specifier[1], 267 oirq.size, oirq.specifier[0], oirq.specifier[1],
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 09d31dbf43f9..aa9269600ca2 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -356,7 +356,7 @@ void account_system_vtime(struct task_struct *tsk)
356 } 356 }
357 get_paca()->user_time_scaled += user_scaled; 357 get_paca()->user_time_scaled += user_scaled;
358 358
359 if (in_irq() || idle_task(smp_processor_id()) != tsk) { 359 if (in_interrupt() || idle_task(smp_processor_id()) != tsk) {
360 account_system_time(tsk, 0, delta, sys_scaled); 360 account_system_time(tsk, 0, delta, sys_scaled);
361 if (stolen) 361 if (stolen)
362 account_steal_time(stolen); 362 account_steal_time(stolen);
diff --git a/arch/powerpc/mm/dma-noncoherent.c b/arch/powerpc/mm/dma-noncoherent.c
index 757c0bed9a91..b42f76c4948d 100644
--- a/arch/powerpc/mm/dma-noncoherent.c
+++ b/arch/powerpc/mm/dma-noncoherent.c
@@ -399,3 +399,23 @@ void __dma_sync_page(struct page *page, unsigned long offset,
399#endif 399#endif
400} 400}
401EXPORT_SYMBOL(__dma_sync_page); 401EXPORT_SYMBOL(__dma_sync_page);
402
403/*
404 * Return the PFN for a given cpu virtual address returned by
405 * __dma_alloc_coherent. This is used by dma_mmap_coherent()
406 */
407unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr)
408{
409 /* This should always be populated, so we don't test every
410 * level. If that fails, we'll have a nice crash which
411 * will be as good as a BUG_ON()
412 */
413 pgd_t *pgd = pgd_offset_k(cpu_addr);
414 pud_t *pud = pud_offset(pgd, cpu_addr);
415 pmd_t *pmd = pmd_offset(pud, cpu_addr);
416 pte_t *ptep = pte_offset_kernel(pmd, cpu_addr);
417
418 if (pte_none(*ptep) || !pte_present(*ptep))
419 return 0;
420 return pte_pfn(*ptep);
421}
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
index fde0ea50c97d..cfc4b2009982 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
@@ -132,8 +132,8 @@ static int
132cpld_pic_host_map(struct irq_host *h, unsigned int virq, 132cpld_pic_host_map(struct irq_host *h, unsigned int virq,
133 irq_hw_number_t hw) 133 irq_hw_number_t hw)
134{ 134{
135 irq_to_desc(virq)->status |= IRQ_LEVEL; 135 irq_set_status_flags(virq, IRQ_LEVEL);
136 set_irq_chip_and_handler(virq, &cpld_pic, handle_level_irq); 136 irq_set_chip_and_handler(virq, &cpld_pic, handle_level_irq);
137 return 0; 137 return 0;
138} 138}
139 139
@@ -198,7 +198,7 @@ mpc5121_ads_cpld_pic_init(void)
198 goto end; 198 goto end;
199 } 199 }
200 200
201 set_irq_chained_handler(cascade_irq, cpld_pic_cascade); 201 irq_set_chained_handler(cascade_irq, cpld_pic_cascade);
202end: 202end:
203 of_node_put(np); 203 of_node_put(np);
204} 204}
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c
index 2bd1e6cf1f58..57a6a349e932 100644
--- a/arch/powerpc/platforms/52xx/media5200.c
+++ b/arch/powerpc/platforms/52xx/media5200.c
@@ -82,7 +82,7 @@ static struct irq_chip media5200_irq_chip = {
82 82
83void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc) 83void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
84{ 84{
85 struct irq_chip *chip = get_irq_desc_chip(desc); 85 struct irq_chip *chip = irq_desc_get_chip(desc);
86 int sub_virq, val; 86 int sub_virq, val;
87 u32 status, enable; 87 u32 status, enable;
88 88
@@ -107,7 +107,7 @@ void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
107 /* Processing done; can reenable the cascade now */ 107 /* Processing done; can reenable the cascade now */
108 raw_spin_lock(&desc->lock); 108 raw_spin_lock(&desc->lock);
109 chip->irq_ack(&desc->irq_data); 109 chip->irq_ack(&desc->irq_data);
110 if (!(desc->status & IRQ_DISABLED)) 110 if (!irqd_irq_disabled(&desc->irq_data))
111 chip->irq_unmask(&desc->irq_data); 111 chip->irq_unmask(&desc->irq_data);
112 raw_spin_unlock(&desc->lock); 112 raw_spin_unlock(&desc->lock);
113} 113}
@@ -115,15 +115,10 @@ void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
115static int media5200_irq_map(struct irq_host *h, unsigned int virq, 115static int media5200_irq_map(struct irq_host *h, unsigned int virq,
116 irq_hw_number_t hw) 116 irq_hw_number_t hw)
117{ 117{
118 struct irq_desc *desc = irq_to_desc(virq);
119
120 pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw); 118 pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw);
121 set_irq_chip_data(virq, &media5200_irq); 119 irq_set_chip_data(virq, &media5200_irq);
122 set_irq_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq); 120 irq_set_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq);
123 set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); 121 irq_set_status_flags(virq, IRQ_LEVEL);
124 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
125 desc->status |= IRQ_TYPE_LEVEL_LOW | IRQ_LEVEL;
126
127 return 0; 122 return 0;
128} 123}
129 124
@@ -187,8 +182,8 @@ static void __init media5200_init_irq(void)
187 182
188 media5200_irq.irqhost->host_data = &media5200_irq; 183 media5200_irq.irqhost->host_data = &media5200_irq;
189 184
190 set_irq_data(cascade_virq, &media5200_irq); 185 irq_set_handler_data(cascade_virq, &media5200_irq);
191 set_irq_chained_handler(cascade_virq, media5200_irq_cascade); 186 irq_set_chained_handler(cascade_virq, media5200_irq_cascade);
192 187
193 return; 188 return;
194 189
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index 6da44f0f2934..6c39b9cc2fa3 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -192,7 +192,7 @@ static struct irq_chip mpc52xx_gpt_irq_chip = {
192 192
193void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc) 193void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc)
194{ 194{
195 struct mpc52xx_gpt_priv *gpt = get_irq_data(virq); 195 struct mpc52xx_gpt_priv *gpt = irq_get_handler_data(virq);
196 int sub_virq; 196 int sub_virq;
197 u32 status; 197 u32 status;
198 198
@@ -209,8 +209,8 @@ static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq,
209 struct mpc52xx_gpt_priv *gpt = h->host_data; 209 struct mpc52xx_gpt_priv *gpt = h->host_data;
210 210
211 dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq); 211 dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq);
212 set_irq_chip_data(virq, gpt); 212 irq_set_chip_data(virq, gpt);
213 set_irq_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq); 213 irq_set_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq);
214 214
215 return 0; 215 return 0;
216} 216}
@@ -259,8 +259,8 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
259 } 259 }
260 260
261 gpt->irqhost->host_data = gpt; 261 gpt->irqhost->host_data = gpt;
262 set_irq_data(cascade_virq, gpt); 262 irq_set_handler_data(cascade_virq, gpt);
263 set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade); 263 irq_set_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade);
264 264
265 /* If the GPT is currently disabled, then change it to be in Input 265 /* If the GPT is currently disabled, then change it to be in Input
266 * Capture mode. If the mode is non-zero, then the pin could be 266 * Capture mode. If the mode is non-zero, then the pin could be
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 9f3ed582d082..3ddea96273ca 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -214,7 +214,7 @@ static int mpc52xx_extirq_set_type(struct irq_data *d, unsigned int flow_type)
214 ctrl_reg |= (type << (22 - (l2irq * 2))); 214 ctrl_reg |= (type << (22 - (l2irq * 2)));
215 out_be32(&intr->ctrl, ctrl_reg); 215 out_be32(&intr->ctrl, ctrl_reg);
216 216
217 __set_irq_handler_unlocked(d->irq, handler); 217 __irq_set_handler_locked(d->irq, handler);
218 218
219 return 0; 219 return 0;
220} 220}
@@ -414,7 +414,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
414 else 414 else
415 hndlr = handle_level_irq; 415 hndlr = handle_level_irq;
416 416
417 set_irq_chip_and_handler(virq, &mpc52xx_extirq_irqchip, hndlr); 417 irq_set_chip_and_handler(virq, &mpc52xx_extirq_irqchip, hndlr);
418 pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n", 418 pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n",
419 __func__, l2irq, virq, (int)irq, type); 419 __func__, l2irq, virq, (int)irq, type);
420 return 0; 420 return 0;
@@ -431,7 +431,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
431 return -EINVAL; 431 return -EINVAL;
432 } 432 }
433 433
434 set_irq_chip_and_handler(virq, irqchip, handle_level_irq); 434 irq_set_chip_and_handler(virq, irqchip, handle_level_irq);
435 pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq); 435 pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq);
436 436
437 return 0; 437 return 0;
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index 926dfdaaf57a..4a4eb6ffa12f 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -81,7 +81,7 @@ static struct irq_chip pq2ads_pci_ic = {
81 81
82static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc) 82static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
83{ 83{
84 struct pq2ads_pci_pic *priv = get_irq_desc_data(desc); 84 struct pq2ads_pci_pic *priv = irq_desc_get_handler_data(desc);
85 u32 stat, mask, pend; 85 u32 stat, mask, pend;
86 int bit; 86 int bit;
87 87
@@ -106,17 +106,17 @@ static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
106static int pci_pic_host_map(struct irq_host *h, unsigned int virq, 106static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
107 irq_hw_number_t hw) 107 irq_hw_number_t hw)
108{ 108{
109 irq_to_desc(virq)->status |= IRQ_LEVEL; 109 irq_set_status_flags(virq, IRQ_LEVEL);
110 set_irq_chip_data(virq, h->host_data); 110 irq_set_chip_data(virq, h->host_data);
111 set_irq_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq); 111 irq_set_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq);
112 return 0; 112 return 0;
113} 113}
114 114
115static void pci_host_unmap(struct irq_host *h, unsigned int virq) 115static void pci_host_unmap(struct irq_host *h, unsigned int virq)
116{ 116{
117 /* remove chip and handler */ 117 /* remove chip and handler */
118 set_irq_chip_data(virq, NULL); 118 irq_set_chip_data(virq, NULL);
119 set_irq_chip(virq, NULL); 119 irq_set_chip(virq, NULL);
120} 120}
121 121
122static struct irq_host_ops pci_pic_host_ops = { 122static struct irq_host_ops pci_pic_host_ops = {
@@ -175,8 +175,8 @@ int __init pq2ads_pci_init_irq(void)
175 175
176 priv->host = host; 176 priv->host = host;
177 host->host_data = priv; 177 host->host_data = priv;
178 set_irq_data(irq, priv); 178 irq_set_handler_data(irq, priv);
179 set_irq_chained_handler(irq, pq2ads_pci_irq_demux); 179 irq_set_chained_handler(irq, pq2ads_pci_irq_demux);
180 180
181 of_node_put(np); 181 of_node_put(np);
182 return 0; 182 return 0;
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c
index 64447e48f3d5..c46f9359be15 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -56,7 +56,7 @@ static void machine_restart(char *cmd)
56 56
57static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) 57static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
58{ 58{
59 struct irq_chip *chip = get_irq_desc_chip(desc); 59 struct irq_chip *chip = irq_desc_get_chip(desc);
60 int cascade_irq; 60 int cascade_irq;
61 61
62 while ((cascade_irq = cpm2_get_irq()) >= 0) 62 while ((cascade_irq = cpm2_get_irq()) >= 0)
@@ -106,7 +106,7 @@ static void __init ksi8560_pic_init(void)
106 106
107 cpm2_pic_init(np); 107 cpm2_pic_init(np);
108 of_node_put(np); 108 of_node_put(np);
109 set_irq_chained_handler(irq, cpm2_cascade); 109 irq_set_chained_handler(irq, cpm2_cascade);
110#endif 110#endif
111} 111}
112 112
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 1352d1107bfd..3b2c9bb66199 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -50,7 +50,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
50 50
51static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) 51static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
52{ 52{
53 struct irq_chip *chip = get_irq_desc_chip(desc); 53 struct irq_chip *chip = irq_desc_get_chip(desc);
54 int cascade_irq; 54 int cascade_irq;
55 55
56 while ((cascade_irq = cpm2_get_irq()) >= 0) 56 while ((cascade_irq = cpm2_get_irq()) >= 0)
@@ -101,7 +101,7 @@ static void __init mpc85xx_ads_pic_init(void)
101 101
102 cpm2_pic_init(np); 102 cpm2_pic_init(np);
103 of_node_put(np); 103 of_node_put(np);
104 set_irq_chained_handler(irq, cpm2_cascade); 104 irq_set_chained_handler(irq, cpm2_cascade);
105#endif 105#endif
106} 106}
107 107
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 458d91fba91d..6299a2a51ae8 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -255,7 +255,7 @@ static int mpc85xx_cds_8259_attach(void)
255 } 255 }
256 256
257 /* Success. Connect our low-level cascade handler. */ 257 /* Success. Connect our low-level cascade handler. */
258 set_irq_handler(cascade_irq, mpc85xx_8259_cascade_handler); 258 irq_set_handler(cascade_irq, mpc85xx_8259_cascade_handler);
259 259
260 return 0; 260 return 0;
261} 261}
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 793ead7993ab..c7b97f70312e 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -47,7 +47,7 @@
47#ifdef CONFIG_PPC_I8259 47#ifdef CONFIG_PPC_I8259
48static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc) 48static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
49{ 49{
50 struct irq_chip *chip = get_irq_desc_chip(desc); 50 struct irq_chip *chip = irq_desc_get_chip(desc);
51 unsigned int cascade_irq = i8259_irq(); 51 unsigned int cascade_irq = i8259_irq();
52 52
53 if (cascade_irq != NO_IRQ) { 53 if (cascade_irq != NO_IRQ) {
@@ -122,7 +122,7 @@ void __init mpc85xx_ds_pic_init(void)
122 i8259_init(cascade_node, 0); 122 i8259_init(cascade_node, 0);
123 of_node_put(cascade_node); 123 of_node_put(cascade_node);
124 124
125 set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade); 125 irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade);
126#endif /* CONFIG_PPC_I8259 */ 126#endif /* CONFIG_PPC_I8259 */
127} 127}
128 128
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
index d7e28ec3e072..d2dfd465fbf6 100644
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -41,7 +41,7 @@
41 41
42static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) 42static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
43{ 43{
44 struct irq_chip *chip = get_irq_desc_chip(desc); 44 struct irq_chip *chip = irq_desc_get_chip(desc);
45 int cascade_irq; 45 int cascade_irq;
46 46
47 while ((cascade_irq = cpm2_get_irq()) >= 0) 47 while ((cascade_irq = cpm2_get_irq()) >= 0)
@@ -92,7 +92,7 @@ static void __init sbc8560_pic_init(void)
92 92
93 cpm2_pic_init(np); 93 cpm2_pic_init(np);
94 of_node_put(np); 94 of_node_put(np);
95 set_irq_chained_handler(irq, cpm2_cascade); 95 irq_set_chained_handler(irq, cpm2_cascade);
96#endif 96#endif
97} 97}
98 98
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index 79d85aca4767..db864623b4ae 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -93,7 +93,7 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)
93 93
94void socrates_fpga_pic_cascade(unsigned int irq, struct irq_desc *desc) 94void socrates_fpga_pic_cascade(unsigned int irq, struct irq_desc *desc)
95{ 95{
96 struct irq_chip *chip = get_irq_desc_chip(desc); 96 struct irq_chip *chip = irq_desc_get_chip(desc);
97 unsigned int cascade_irq; 97 unsigned int cascade_irq;
98 98
99 /* 99 /*
@@ -245,9 +245,9 @@ static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq,
245 irq_hw_number_t hwirq) 245 irq_hw_number_t hwirq)
246{ 246{
247 /* All interrupts are LEVEL sensitive */ 247 /* All interrupts are LEVEL sensitive */
248 irq_to_desc(virq)->status |= IRQ_LEVEL; 248 irq_set_status_flags(virq, IRQ_LEVEL);
249 set_irq_chip_and_handler(virq, &socrates_fpga_pic_chip, 249 irq_set_chip_and_handler(virq, &socrates_fpga_pic_chip,
250 handle_fasteoi_irq); 250 handle_fasteoi_irq);
251 251
252 return 0; 252 return 0;
253} 253}
@@ -308,8 +308,8 @@ void socrates_fpga_pic_init(struct device_node *pic)
308 pr_warning("FPGA PIC: can't get irq%d.\n", i); 308 pr_warning("FPGA PIC: can't get irq%d.\n", i);
309 continue; 309 continue;
310 } 310 }
311 set_irq_chained_handler(socrates_fpga_irqs[i], 311 irq_set_chained_handler(socrates_fpga_irqs[i],
312 socrates_fpga_pic_cascade); 312 socrates_fpga_pic_cascade);
313 } 313 }
314 314
315 socrates_fpga_pic_iobase = of_iomap(pic, 0); 315 socrates_fpga_pic_iobase = of_iomap(pic, 0);
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
index 2b62b064eac7..5387e9f06bdb 100644
--- a/arch/powerpc/platforms/85xx/stx_gp3.c
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -46,7 +46,7 @@
46 46
47static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) 47static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
48{ 48{
49 struct irq_chip *chip = get_irq_desc_chip(desc); 49 struct irq_chip *chip = irq_desc_get_chip(desc);
50 int cascade_irq; 50 int cascade_irq;
51 51
52 while ((cascade_irq = cpm2_get_irq()) >= 0) 52 while ((cascade_irq = cpm2_get_irq()) >= 0)
@@ -102,7 +102,7 @@ static void __init stx_gp3_pic_init(void)
102 102
103 cpm2_pic_init(np); 103 cpm2_pic_init(np);
104 of_node_put(np); 104 of_node_put(np);
105 set_irq_chained_handler(irq, cpm2_cascade); 105 irq_set_chained_handler(irq, cpm2_cascade);
106#endif 106#endif
107} 107}
108 108
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 2265b68e3279..325de772725a 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -44,7 +44,7 @@
44 44
45static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) 45static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
46{ 46{
47 struct irq_chip *chip = get_irq_desc_chip(desc); 47 struct irq_chip *chip = irq_desc_get_chip(desc);
48 int cascade_irq; 48 int cascade_irq;
49 49
50 while ((cascade_irq = cpm2_get_irq()) >= 0) 50 while ((cascade_irq = cpm2_get_irq()) >= 0)
@@ -100,7 +100,7 @@ static void __init tqm85xx_pic_init(void)
100 100
101 cpm2_pic_init(np); 101 cpm2_pic_init(np);
102 of_node_put(np); 102 of_node_put(np);
103 set_irq_chained_handler(irq, cpm2_cascade); 103 irq_set_chained_handler(irq, cpm2_cascade);
104#endif 104#endif
105} 105}
106 106
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c
index 0adfe3b740cd..0beec7d5566b 100644
--- a/arch/powerpc/platforms/86xx/gef_pic.c
+++ b/arch/powerpc/platforms/86xx/gef_pic.c
@@ -95,7 +95,7 @@ static int gef_pic_cascade_irq;
95 95
96void gef_pic_cascade(unsigned int irq, struct irq_desc *desc) 96void gef_pic_cascade(unsigned int irq, struct irq_desc *desc)
97{ 97{
98 struct irq_chip *chip = get_irq_desc_chip(desc); 98 struct irq_chip *chip = irq_desc_get_chip(desc);
99 unsigned int cascade_irq; 99 unsigned int cascade_irq;
100 100
101 /* 101 /*
@@ -163,8 +163,8 @@ static int gef_pic_host_map(struct irq_host *h, unsigned int virq,
163 irq_hw_number_t hwirq) 163 irq_hw_number_t hwirq)
164{ 164{
165 /* All interrupts are LEVEL sensitive */ 165 /* All interrupts are LEVEL sensitive */
166 irq_to_desc(virq)->status |= IRQ_LEVEL; 166 irq_set_status_flags(virq, IRQ_LEVEL);
167 set_irq_chip_and_handler(virq, &gef_pic_chip, handle_level_irq); 167 irq_set_chip_and_handler(virq, &gef_pic_chip, handle_level_irq);
168 168
169 return 0; 169 return 0;
170} 170}
@@ -225,7 +225,7 @@ void __init gef_pic_init(struct device_node *np)
225 return; 225 return;
226 226
227 /* Chain with parent controller */ 227 /* Chain with parent controller */
228 set_irq_chained_handler(gef_pic_cascade_irq, gef_pic_cascade); 228 irq_set_chained_handler(gef_pic_cascade_irq, gef_pic_cascade);
229} 229}
230 230
231/* 231/*
diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c
index cbe33639b478..8ef8960abda6 100644
--- a/arch/powerpc/platforms/86xx/pic.c
+++ b/arch/powerpc/platforms/86xx/pic.c
@@ -19,7 +19,7 @@
19#ifdef CONFIG_PPC_I8259 19#ifdef CONFIG_PPC_I8259
20static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc) 20static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
21{ 21{
22 struct irq_chip *chip = get_irq_desc_chip(desc); 22 struct irq_chip *chip = irq_desc_get_chip(desc);
23 unsigned int cascade_irq = i8259_irq(); 23 unsigned int cascade_irq = i8259_irq();
24 24
25 if (cascade_irq != NO_IRQ) 25 if (cascade_irq != NO_IRQ)
@@ -77,6 +77,6 @@ void __init mpc86xx_init_irq(void)
77 i8259_init(cascade_node, 0); 77 i8259_init(cascade_node, 0);
78 of_node_put(cascade_node); 78 of_node_put(cascade_node);
79 79
80 set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade); 80 irq_set_chained_handler(cascade_irq, mpc86xx_8259_cascade);
81#endif 81#endif
82} 82}
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index fabb108e8744..9ecce995dd4b 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -226,11 +226,11 @@ static void cpm_cascade(unsigned int irq, struct irq_desc *desc)
226 226
227 generic_handle_irq(cascade_irq); 227 generic_handle_irq(cascade_irq);
228 228
229 chip = get_irq_desc_chip(cdesc); 229 chip = irq_desc_get_chip(cdesc);
230 chip->irq_eoi(&cdesc->irq_data); 230 chip->irq_eoi(&cdesc->irq_data);
231 } 231 }
232 232
233 chip = get_irq_desc_chip(desc); 233 chip = irq_desc_get_chip(desc);
234 chip->irq_eoi(&desc->irq_data); 234 chip->irq_eoi(&desc->irq_data);
235} 235}
236 236
@@ -251,5 +251,5 @@ void __init mpc8xx_pics_init(void)
251 251
252 irq = cpm_pic_init(); 252 irq = cpm_pic_init();
253 if (irq != NO_IRQ) 253 if (irq != NO_IRQ)
254 set_irq_chained_handler(irq, cpm_cascade); 254 irq_set_chained_handler(irq, cpm_cascade);
255} 255}
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index c48b66a67e42..bb5ebf8fa80b 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -93,8 +93,8 @@ static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
93 93
94static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc) 94static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
95{ 95{
96 struct irq_chip *chip = get_irq_desc_chip(desc); 96 struct irq_chip *chip = irq_desc_get_chip(desc);
97 struct axon_msic *msic = get_irq_data(irq); 97 struct axon_msic *msic = irq_get_handler_data(irq);
98 u32 write_offset, msi; 98 u32 write_offset, msi;
99 int idx; 99 int idx;
100 int retry = 0; 100 int retry = 0;
@@ -287,7 +287,7 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
287 } 287 }
288 dev_dbg(&dev->dev, "axon_msi: allocated virq 0x%x\n", virq); 288 dev_dbg(&dev->dev, "axon_msi: allocated virq 0x%x\n", virq);
289 289
290 set_irq_msi(virq, entry); 290 irq_set_msi_desc(virq, entry);
291 msg.data = virq; 291 msg.data = virq;
292 write_msi_msg(virq, &msg); 292 write_msi_msg(virq, &msg);
293 } 293 }
@@ -305,7 +305,7 @@ static void axon_msi_teardown_msi_irqs(struct pci_dev *dev)
305 if (entry->irq == NO_IRQ) 305 if (entry->irq == NO_IRQ)
306 continue; 306 continue;
307 307
308 set_irq_msi(entry->irq, NULL); 308 irq_set_msi_desc(entry->irq, NULL);
309 irq_dispose_mapping(entry->irq); 309 irq_dispose_mapping(entry->irq);
310 } 310 }
311} 311}
@@ -320,7 +320,7 @@ static struct irq_chip msic_irq_chip = {
320static int msic_host_map(struct irq_host *h, unsigned int virq, 320static int msic_host_map(struct irq_host *h, unsigned int virq,
321 irq_hw_number_t hw) 321 irq_hw_number_t hw)
322{ 322{
323 set_irq_chip_and_handler(virq, &msic_irq_chip, handle_simple_irq); 323 irq_set_chip_and_handler(virq, &msic_irq_chip, handle_simple_irq);
324 324
325 return 0; 325 return 0;
326} 326}
@@ -400,8 +400,8 @@ static int axon_msi_probe(struct platform_device *device)
400 400
401 msic->irq_host->host_data = msic; 401 msic->irq_host->host_data = msic;
402 402
403 set_irq_data(virq, msic); 403 irq_set_handler_data(virq, msic);
404 set_irq_chained_handler(virq, axon_msi_cascade); 404 irq_set_chained_handler(virq, axon_msi_cascade);
405 pr_devel("axon_msi: irq 0x%x setup for axon_msi\n", virq); 405 pr_devel("axon_msi: irq 0x%x setup for axon_msi\n", virq);
406 406
407 /* Enable the MSIC hardware */ 407 /* Enable the MSIC hardware */
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
index 0b8f7d7135c5..4cb9e147c307 100644
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ b/arch/powerpc/platforms/cell/beat_interrupt.c
@@ -136,15 +136,14 @@ static void beatic_pic_host_unmap(struct irq_host *h, unsigned int virq)
136static int beatic_pic_host_map(struct irq_host *h, unsigned int virq, 136static int beatic_pic_host_map(struct irq_host *h, unsigned int virq,
137 irq_hw_number_t hw) 137 irq_hw_number_t hw)
138{ 138{
139 struct irq_desc *desc = irq_to_desc(virq);
140 int64_t err; 139 int64_t err;
141 140
142 err = beat_construct_and_connect_irq_plug(virq, hw); 141 err = beat_construct_and_connect_irq_plug(virq, hw);
143 if (err < 0) 142 if (err < 0)
144 return -EIO; 143 return -EIO;
145 144
146 desc->status |= IRQ_LEVEL; 145 irq_set_status_flags(virq, IRQ_LEVEL);
147 set_irq_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq); 146 irq_set_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq);
148 return 0; 147 return 0;
149} 148}
150 149
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index ec9fc7d82068..44cfd1bef89b 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -101,9 +101,9 @@ static void iic_ioexc_eoi(struct irq_data *d)
101 101
102static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc) 102static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc)
103{ 103{
104 struct irq_chip *chip = get_irq_desc_chip(desc); 104 struct irq_chip *chip = irq_desc_get_chip(desc);
105 struct cbe_iic_regs __iomem *node_iic = 105 struct cbe_iic_regs __iomem *node_iic =
106 (void __iomem *)get_irq_desc_data(desc); 106 (void __iomem *)irq_desc_get_handler_data(desc);
107 unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC; 107 unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC;
108 unsigned long bits, ack; 108 unsigned long bits, ack;
109 int cascade; 109 int cascade;
@@ -240,14 +240,14 @@ static int iic_host_map(struct irq_host *h, unsigned int virq,
240{ 240{
241 switch (hw & IIC_IRQ_TYPE_MASK) { 241 switch (hw & IIC_IRQ_TYPE_MASK) {
242 case IIC_IRQ_TYPE_IPI: 242 case IIC_IRQ_TYPE_IPI:
243 set_irq_chip_and_handler(virq, &iic_chip, handle_percpu_irq); 243 irq_set_chip_and_handler(virq, &iic_chip, handle_percpu_irq);
244 break; 244 break;
245 case IIC_IRQ_TYPE_IOEXC: 245 case IIC_IRQ_TYPE_IOEXC:
246 set_irq_chip_and_handler(virq, &iic_ioexc_chip, 246 irq_set_chip_and_handler(virq, &iic_ioexc_chip,
247 handle_iic_irq); 247 handle_edge_eoi_irq);
248 break; 248 break;
249 default: 249 default:
250 set_irq_chip_and_handler(virq, &iic_chip, handle_edge_eoi_irq); 250 irq_set_chip_and_handler(virq, &iic_chip, handle_edge_eoi_irq);
251 } 251 }
252 return 0; 252 return 0;
253} 253}
@@ -364,8 +364,8 @@ static int __init setup_iic(void)
364 * irq_data is a generic pointer that gets passed back 364 * irq_data is a generic pointer that gets passed back
365 * to us later, so the forced cast is fine. 365 * to us later, so the forced cast is fine.
366 */ 366 */
367 set_irq_data(cascade, (void __force *)node_iic); 367 irq_set_handler_data(cascade, (void __force *)node_iic);
368 set_irq_chained_handler(cascade , iic_ioexc_cascade); 368 irq_set_chained_handler(cascade, iic_ioexc_cascade);
369 out_be64(&node_iic->iic_ir, 369 out_be64(&node_iic->iic_ir,
370 (1 << 12) /* priority */ | 370 (1 << 12) /* priority */ |
371 (node << 4) /* dest node */ | 371 (node << 4) /* dest node */ |
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 6a28d027d959..fd57bfe00edf 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -187,8 +187,8 @@ machine_subsys_initcall(cell, cell_publish_devices);
187 187
188static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc) 188static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
189{ 189{
190 struct irq_chip *chip = get_irq_desc_chip(desc); 190 struct irq_chip *chip = irq_desc_get_chip(desc);
191 struct mpic *mpic = get_irq_desc_data(desc); 191 struct mpic *mpic = irq_desc_get_handler_data(desc);
192 unsigned int virq; 192 unsigned int virq;
193 193
194 virq = mpic_get_one_irq(mpic); 194 virq = mpic_get_one_irq(mpic);
@@ -223,8 +223,8 @@ static void __init mpic_init_IRQ(void)
223 223
224 printk(KERN_INFO "%s : hooking up to IRQ %d\n", 224 printk(KERN_INFO "%s : hooking up to IRQ %d\n",
225 dn->full_name, virq); 225 dn->full_name, virq);
226 set_irq_data(virq, mpic); 226 irq_set_handler_data(virq, mpic);
227 set_irq_chained_handler(virq, cell_mpic_cascade); 227 irq_set_chained_handler(virq, cell_mpic_cascade);
228 } 228 }
229} 229}
230 230
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index b38cdfc1deb8..c5cf50e6b45a 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -102,7 +102,7 @@ static void spider_ack_irq(struct irq_data *d)
102 102
103 /* Reset edge detection logic if necessary 103 /* Reset edge detection logic if necessary
104 */ 104 */
105 if (irq_to_desc(d->irq)->status & IRQ_LEVEL) 105 if (irqd_is_level_type(d))
106 return; 106 return;
107 107
108 /* Only interrupts 47 to 50 can be set to edge */ 108 /* Only interrupts 47 to 50 can be set to edge */
@@ -119,7 +119,6 @@ static int spider_set_irq_type(struct irq_data *d, unsigned int type)
119 struct spider_pic *pic = spider_virq_to_pic(d->irq); 119 struct spider_pic *pic = spider_virq_to_pic(d->irq);
120 unsigned int hw = irq_map[d->irq].hwirq; 120 unsigned int hw = irq_map[d->irq].hwirq;
121 void __iomem *cfg = spider_get_irq_config(pic, hw); 121 void __iomem *cfg = spider_get_irq_config(pic, hw);
122 struct irq_desc *desc = irq_to_desc(d->irq);
123 u32 old_mask; 122 u32 old_mask;
124 u32 ic; 123 u32 ic;
125 124
@@ -147,12 +146,6 @@ static int spider_set_irq_type(struct irq_data *d, unsigned int type)
147 return -EINVAL; 146 return -EINVAL;
148 } 147 }
149 148
150 /* Update irq_desc */
151 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
152 desc->status |= type & IRQ_TYPE_SENSE_MASK;
153 if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
154 desc->status |= IRQ_LEVEL;
155
156 /* Configure the source. One gross hack that was there before and 149 /* Configure the source. One gross hack that was there before and
157 * that I've kept around is the priority to the BE which I set to 150 * that I've kept around is the priority to the BE which I set to
158 * be the same as the interrupt source number. I don't know wether 151 * be the same as the interrupt source number. I don't know wether
@@ -178,10 +171,10 @@ static struct irq_chip spider_pic = {
178static int spider_host_map(struct irq_host *h, unsigned int virq, 171static int spider_host_map(struct irq_host *h, unsigned int virq,
179 irq_hw_number_t hw) 172 irq_hw_number_t hw)
180{ 173{
181 set_irq_chip_and_handler(virq, &spider_pic, handle_level_irq); 174 irq_set_chip_and_handler(virq, &spider_pic, handle_level_irq);
182 175
183 /* Set default irq type */ 176 /* Set default irq type */
184 set_irq_type(virq, IRQ_TYPE_NONE); 177 irq_set_irq_type(virq, IRQ_TYPE_NONE);
185 178
186 return 0; 179 return 0;
187} 180}
@@ -207,8 +200,8 @@ static struct irq_host_ops spider_host_ops = {
207 200
208static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc) 201static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc)
209{ 202{
210 struct irq_chip *chip = get_irq_desc_chip(desc); 203 struct irq_chip *chip = irq_desc_get_chip(desc);
211 struct spider_pic *pic = get_irq_desc_data(desc); 204 struct spider_pic *pic = irq_desc_get_handler_data(desc);
212 unsigned int cs, virq; 205 unsigned int cs, virq;
213 206
214 cs = in_be32(pic->regs + TIR_CS) >> 24; 207 cs = in_be32(pic->regs + TIR_CS) >> 24;
@@ -328,8 +321,8 @@ static void __init spider_init_one(struct device_node *of_node, int chip,
328 virq = spider_find_cascade_and_node(pic); 321 virq = spider_find_cascade_and_node(pic);
329 if (virq == NO_IRQ) 322 if (virq == NO_IRQ)
330 return; 323 return;
331 set_irq_data(virq, pic); 324 irq_set_handler_data(virq, pic);
332 set_irq_chained_handler(virq, spider_irq_cascade); 325 irq_set_chained_handler(virq, spider_irq_cascade);
333 326
334 printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %s\n", 327 printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %s\n",
335 pic->node_id, addr, of_node->full_name); 328 pic->node_id, addr, of_node->full_name);
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 4c1288451a21..122786498419 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -365,7 +365,7 @@ void __init chrp_setup_arch(void)
365 365
366static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc) 366static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc)
367{ 367{
368 struct irq_chip *chip = get_irq_desc_chip(desc); 368 struct irq_chip *chip = irq_desc_get_chip(desc);
369 unsigned int cascade_irq = i8259_irq(); 369 unsigned int cascade_irq = i8259_irq();
370 370
371 if (cascade_irq != NO_IRQ) 371 if (cascade_irq != NO_IRQ)
@@ -517,7 +517,7 @@ static void __init chrp_find_8259(void)
517 if (cascade_irq == NO_IRQ) 517 if (cascade_irq == NO_IRQ)
518 printk(KERN_ERR "i8259: failed to map cascade irq\n"); 518 printk(KERN_ERR "i8259: failed to map cascade irq\n");
519 else 519 else
520 set_irq_chained_handler(cascade_irq, 520 irq_set_chained_handler(cascade_irq,
521 chrp_8259_cascade); 521 chrp_8259_cascade);
522 } 522 }
523} 523}
diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c
index 0aca0e28a8e5..12aa62b6f227 100644
--- a/arch/powerpc/platforms/embedded6xx/flipper-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/flipper-pic.c
@@ -101,16 +101,16 @@ static struct irq_host *flipper_irq_host;
101static int flipper_pic_map(struct irq_host *h, unsigned int virq, 101static int flipper_pic_map(struct irq_host *h, unsigned int virq,
102 irq_hw_number_t hwirq) 102 irq_hw_number_t hwirq)
103{ 103{
104 set_irq_chip_data(virq, h->host_data); 104 irq_set_chip_data(virq, h->host_data);
105 irq_to_desc(virq)->status |= IRQ_LEVEL; 105 irq_set_status_flags(virq, IRQ_LEVEL);
106 set_irq_chip_and_handler(virq, &flipper_pic, handle_level_irq); 106 irq_set_chip_and_handler(virq, &flipper_pic, handle_level_irq);
107 return 0; 107 return 0;
108} 108}
109 109
110static void flipper_pic_unmap(struct irq_host *h, unsigned int irq) 110static void flipper_pic_unmap(struct irq_host *h, unsigned int irq)
111{ 111{
112 set_irq_chip_data(irq, NULL); 112 irq_set_chip_data(irq, NULL);
113 set_irq_chip(irq, NULL); 113 irq_set_chip(irq, NULL);
114} 114}
115 115
116static int flipper_pic_match(struct irq_host *h, struct device_node *np) 116static int flipper_pic_match(struct irq_host *h, struct device_node *np)
diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
index 35e448bd8479..2bdddfc9d520 100644
--- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
@@ -94,16 +94,16 @@ static struct irq_host *hlwd_irq_host;
94static int hlwd_pic_map(struct irq_host *h, unsigned int virq, 94static int hlwd_pic_map(struct irq_host *h, unsigned int virq,
95 irq_hw_number_t hwirq) 95 irq_hw_number_t hwirq)
96{ 96{
97 set_irq_chip_data(virq, h->host_data); 97 irq_set_chip_data(virq, h->host_data);
98 irq_to_desc(virq)->status |= IRQ_LEVEL; 98 irq_set_status_flags(virq, IRQ_LEVEL);
99 set_irq_chip_and_handler(virq, &hlwd_pic, handle_level_irq); 99 irq_set_chip_and_handler(virq, &hlwd_pic, handle_level_irq);
100 return 0; 100 return 0;
101} 101}
102 102
103static void hlwd_pic_unmap(struct irq_host *h, unsigned int irq) 103static void hlwd_pic_unmap(struct irq_host *h, unsigned int irq)
104{ 104{
105 set_irq_chip_data(irq, NULL); 105 irq_set_chip_data(irq, NULL);
106 set_irq_chip(irq, NULL); 106 irq_set_chip(irq, NULL);
107} 107}
108 108
109static struct irq_host_ops hlwd_irq_host_ops = { 109static struct irq_host_ops hlwd_irq_host_ops = {
@@ -129,8 +129,8 @@ static unsigned int __hlwd_pic_get_irq(struct irq_host *h)
129static void hlwd_pic_irq_cascade(unsigned int cascade_virq, 129static void hlwd_pic_irq_cascade(unsigned int cascade_virq,
130 struct irq_desc *desc) 130 struct irq_desc *desc)
131{ 131{
132 struct irq_chip *chip = get_irq_desc_chip(desc); 132 struct irq_chip *chip = irq_desc_get_chip(desc);
133 struct irq_host *irq_host = get_irq_data(cascade_virq); 133 struct irq_host *irq_host = irq_get_handler_data(cascade_virq);
134 unsigned int virq; 134 unsigned int virq;
135 135
136 raw_spin_lock(&desc->lock); 136 raw_spin_lock(&desc->lock);
@@ -145,7 +145,7 @@ static void hlwd_pic_irq_cascade(unsigned int cascade_virq,
145 145
146 raw_spin_lock(&desc->lock); 146 raw_spin_lock(&desc->lock);
147 chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */ 147 chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */
148 if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask) 148 if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask)
149 chip->irq_unmask(&desc->irq_data); 149 chip->irq_unmask(&desc->irq_data);
150 raw_spin_unlock(&desc->lock); 150 raw_spin_unlock(&desc->lock);
151} 151}
@@ -218,8 +218,8 @@ void hlwd_pic_probe(void)
218 host = hlwd_pic_init(np); 218 host = hlwd_pic_init(np);
219 BUG_ON(!host); 219 BUG_ON(!host);
220 cascade_virq = irq_of_parse_and_map(np, 0); 220 cascade_virq = irq_of_parse_and_map(np, 0);
221 set_irq_data(cascade_virq, host); 221 irq_set_handler_data(cascade_virq, host);
222 set_irq_chained_handler(cascade_virq, 222 irq_set_chained_handler(cascade_virq,
223 hlwd_pic_irq_cascade); 223 hlwd_pic_irq_cascade);
224 hlwd_irq_host = host; 224 hlwd_irq_host = host;
225 break; 225 break;
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c b/arch/powerpc/platforms/embedded6xx/holly.c
index b21fde589ca7..487bda0d18d8 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -198,8 +198,8 @@ static void __init holly_init_IRQ(void)
198 cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0); 198 cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
199 pr_debug("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, (u32) cascade_pci_irq); 199 pr_debug("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, (u32) cascade_pci_irq);
200 tsi108_pci_int_init(cascade_node); 200 tsi108_pci_int_init(cascade_node);
201 set_irq_data(cascade_pci_irq, mpic); 201 irq_set_handler_data(cascade_pci_irq, mpic);
202 set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade); 202 irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
203#endif 203#endif
204 /* Configure MPIC outputs to CPU0 */ 204 /* Configure MPIC outputs to CPU0 */
205 tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); 205 tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index 7a2ba39d7811..1cb907c94359 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -153,8 +153,8 @@ static void __init mpc7448_hpc2_init_IRQ(void)
153 DBG("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, 153 DBG("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__,
154 (u32) cascade_pci_irq); 154 (u32) cascade_pci_irq);
155 tsi108_pci_int_init(cascade_node); 155 tsi108_pci_int_init(cascade_node);
156 set_irq_data(cascade_pci_irq, mpic); 156 irq_set_handler_data(cascade_pci_irq, mpic);
157 set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade); 157 irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
158#endif 158#endif
159 /* Configure MPIC outputs to CPU0 */ 159 /* Configure MPIC outputs to CPU0 */
160 tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); 160 tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index 4fb96f0b2df6..52a6889832c7 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -220,7 +220,7 @@ void __init iSeries_activate_IRQs()
220 if (!desc) 220 if (!desc)
221 continue; 221 continue;
222 222
223 chip = get_irq_desc_chip(desc); 223 chip = irq_desc_get_chip(desc);
224 if (chip && chip->irq_startup) { 224 if (chip && chip->irq_startup) {
225 raw_spin_lock_irqsave(&desc->lock, flags); 225 raw_spin_lock_irqsave(&desc->lock, flags);
226 chip->irq_startup(&desc->irq_data); 226 chip->irq_startup(&desc->irq_data);
@@ -346,7 +346,7 @@ unsigned int iSeries_get_irq(void)
346static int iseries_irq_host_map(struct irq_host *h, unsigned int virq, 346static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
347 irq_hw_number_t hw) 347 irq_hw_number_t hw)
348{ 348{
349 set_irq_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq); 349 irq_set_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq);
350 350
351 return 0; 351 return 0;
352} 352}
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index 04296ffff8bf..dd2e48b28508 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -498,7 +498,7 @@ void __devinit maple_pci_irq_fixup(struct pci_dev *dev)
498 printk(KERN_DEBUG "Fixup U4 PCIe IRQ\n"); 498 printk(KERN_DEBUG "Fixup U4 PCIe IRQ\n");
499 dev->irq = irq_create_mapping(NULL, 1); 499 dev->irq = irq_create_mapping(NULL, 1);
500 if (dev->irq != NO_IRQ) 500 if (dev->irq != NO_IRQ)
501 set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW); 501 irq_set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW);
502 } 502 }
503 503
504 /* Hide AMD8111 IDE interrupt when in legacy mode so 504 /* Hide AMD8111 IDE interrupt when in legacy mode so
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index a6067b38d2ca..7c858e6f843c 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -239,7 +239,7 @@ static __init void pas_init_IRQ(void)
239 if (nmiprop) { 239 if (nmiprop) {
240 nmi_virq = irq_create_mapping(NULL, *nmiprop); 240 nmi_virq = irq_create_mapping(NULL, *nmiprop);
241 mpic_irq_set_priority(nmi_virq, 15); 241 mpic_irq_set_priority(nmi_virq, 15);
242 set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING); 242 irq_set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING);
243 mpic_unmask_irq(irq_get_irq_data(nmi_virq)); 243 mpic_unmask_irq(irq_get_irq_data(nmi_virq));
244 } 244 }
245 245
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 3bc075c788ef..ab6898942700 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -988,7 +988,7 @@ void __devinit pmac_pci_irq_fixup(struct pci_dev *dev)
988 dev->vendor == PCI_VENDOR_ID_DEC && 988 dev->vendor == PCI_VENDOR_ID_DEC &&
989 dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS) { 989 dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS) {
990 dev->irq = irq_create_mapping(NULL, 60); 990 dev->irq = irq_create_mapping(NULL, 60);
991 set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW); 991 irq_set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW);
992 } 992 }
993#endif /* CONFIG_PPC32 */ 993#endif /* CONFIG_PPC32 */
994} 994}
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index c55812bb6a51..023f24086a0a 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -157,7 +157,7 @@ static unsigned int pmac_startup_irq(struct irq_data *d)
157 int i = src >> 5; 157 int i = src >> 5;
158 158
159 raw_spin_lock_irqsave(&pmac_pic_lock, flags); 159 raw_spin_lock_irqsave(&pmac_pic_lock, flags);
160 if ((irq_to_desc(d->irq)->status & IRQ_LEVEL) == 0) 160 if (!irqd_is_level_type(d))
161 out_le32(&pmac_irq_hw[i]->ack, bit); 161 out_le32(&pmac_irq_hw[i]->ack, bit);
162 __set_bit(src, ppc_cached_irq_mask); 162 __set_bit(src, ppc_cached_irq_mask);
163 __pmac_set_irq_mask(src, 0); 163 __pmac_set_irq_mask(src, 0);
@@ -289,7 +289,6 @@ static int pmac_pic_host_match(struct irq_host *h, struct device_node *node)
289static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, 289static int pmac_pic_host_map(struct irq_host *h, unsigned int virq,
290 irq_hw_number_t hw) 290 irq_hw_number_t hw)
291{ 291{
292 struct irq_desc *desc = irq_to_desc(virq);
293 int level; 292 int level;
294 293
295 if (hw >= max_irqs) 294 if (hw >= max_irqs)
@@ -300,9 +299,9 @@ static int pmac_pic_host_map(struct irq_host *h, unsigned int virq,
300 */ 299 */
301 level = !!(level_mask[hw >> 5] & (1UL << (hw & 0x1f))); 300 level = !!(level_mask[hw >> 5] & (1UL << (hw & 0x1f)));
302 if (level) 301 if (level)
303 desc->status |= IRQ_LEVEL; 302 irq_set_status_flags(virq, IRQ_LEVEL);
304 set_irq_chip_and_handler(virq, &pmac_pic, level ? 303 irq_set_chip_and_handler(virq, &pmac_pic,
305 handle_level_irq : handle_edge_irq); 304 level ? handle_level_irq : handle_edge_irq);
306 return 0; 305 return 0;
307} 306}
308 307
@@ -472,8 +471,8 @@ int of_irq_map_oldworld(struct device_node *device, int index,
472 471
473static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc) 472static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc)
474{ 473{
475 struct irq_chip *chip = get_irq_desc_chip(desc); 474 struct irq_chip *chip = irq_desc_get_chip(desc);
476 struct mpic *mpic = get_irq_desc_data(desc); 475 struct mpic *mpic = irq_desc_get_handler_data(desc);
477 unsigned int cascade_irq = mpic_get_one_irq(mpic); 476 unsigned int cascade_irq = mpic_get_one_irq(mpic);
478 477
479 if (cascade_irq != NO_IRQ) 478 if (cascade_irq != NO_IRQ)
@@ -591,8 +590,8 @@ static int __init pmac_pic_probe_mpic(void)
591 of_node_put(slave); 590 of_node_put(slave);
592 return 0; 591 return 0;
593 } 592 }
594 set_irq_data(cascade, mpic2); 593 irq_set_handler_data(cascade, mpic2);
595 set_irq_chained_handler(cascade, pmac_u3_cascade); 594 irq_set_chained_handler(cascade, pmac_u3_cascade);
596 595
597 of_node_put(slave); 596 of_node_put(slave);
598 return 0; 597 return 0;
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 3988c86682a5..f2f6413b81d3 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -194,7 +194,7 @@ static int ps3_virq_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
194 pr_debug("%s:%d: outlet %lu => cpu %u, virq %u\n", __func__, __LINE__, 194 pr_debug("%s:%d: outlet %lu => cpu %u, virq %u\n", __func__, __LINE__,
195 outlet, cpu, *virq); 195 outlet, cpu, *virq);
196 196
197 result = set_irq_chip_data(*virq, pd); 197 result = irq_set_chip_data(*virq, pd);
198 198
199 if (result) { 199 if (result) {
200 pr_debug("%s:%d: set_irq_chip_data failed\n", 200 pr_debug("%s:%d: set_irq_chip_data failed\n",
@@ -221,12 +221,12 @@ fail_create:
221 221
222static int ps3_virq_destroy(unsigned int virq) 222static int ps3_virq_destroy(unsigned int virq)
223{ 223{
224 const struct ps3_private *pd = get_irq_chip_data(virq); 224 const struct ps3_private *pd = irq_get_chip_data(virq);
225 225
226 pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__, 226 pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__,
227 __LINE__, pd->ppe_id, pd->thread_id, virq); 227 __LINE__, pd->ppe_id, pd->thread_id, virq);
228 228
229 set_irq_chip_data(virq, NULL); 229 irq_set_chip_data(virq, NULL);
230 irq_dispose_mapping(virq); 230 irq_dispose_mapping(virq);
231 231
232 pr_debug("%s:%d <-\n", __func__, __LINE__); 232 pr_debug("%s:%d <-\n", __func__, __LINE__);
@@ -256,7 +256,7 @@ int ps3_irq_plug_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
256 goto fail_setup; 256 goto fail_setup;
257 } 257 }
258 258
259 pd = get_irq_chip_data(*virq); 259 pd = irq_get_chip_data(*virq);
260 260
261 /* Binds outlet to cpu + virq. */ 261 /* Binds outlet to cpu + virq. */
262 262
@@ -291,7 +291,7 @@ EXPORT_SYMBOL_GPL(ps3_irq_plug_setup);
291int ps3_irq_plug_destroy(unsigned int virq) 291int ps3_irq_plug_destroy(unsigned int virq)
292{ 292{
293 int result; 293 int result;
294 const struct ps3_private *pd = get_irq_chip_data(virq); 294 const struct ps3_private *pd = irq_get_chip_data(virq);
295 295
296 pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__, 296 pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__,
297 __LINE__, pd->ppe_id, pd->thread_id, virq); 297 __LINE__, pd->ppe_id, pd->thread_id, virq);
@@ -661,7 +661,7 @@ static void dump_bmp(struct ps3_private* pd) {};
661 661
662static void ps3_host_unmap(struct irq_host *h, unsigned int virq) 662static void ps3_host_unmap(struct irq_host *h, unsigned int virq)
663{ 663{
664 set_irq_chip_data(virq, NULL); 664 irq_set_chip_data(virq, NULL);
665} 665}
666 666
667static int ps3_host_map(struct irq_host *h, unsigned int virq, 667static int ps3_host_map(struct irq_host *h, unsigned int virq,
@@ -670,7 +670,7 @@ static int ps3_host_map(struct irq_host *h, unsigned int virq,
670 pr_debug("%s:%d: hwirq %lu, virq %u\n", __func__, __LINE__, hwirq, 670 pr_debug("%s:%d: hwirq %lu, virq %u\n", __func__, __LINE__, hwirq,
671 virq); 671 virq);
672 672
673 set_irq_chip_and_handler(virq, &ps3_irq_chip, handle_fasteoi_irq); 673 irq_set_chip_and_handler(virq, &ps3_irq_chip, handle_fasteoi_irq);
674 674
675 return 0; 675 return 0;
676} 676}
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index 18ac801f8e90..38d24e7e7bb1 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -137,7 +137,7 @@ static void rtas_teardown_msi_irqs(struct pci_dev *pdev)
137 if (entry->irq == NO_IRQ) 137 if (entry->irq == NO_IRQ)
138 continue; 138 continue;
139 139
140 set_irq_msi(entry->irq, NULL); 140 irq_set_msi_desc(entry->irq, NULL);
141 irq_dispose_mapping(entry->irq); 141 irq_dispose_mapping(entry->irq);
142 } 142 }
143 143
@@ -437,7 +437,7 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
437 } 437 }
438 438
439 dev_dbg(&pdev->dev, "rtas_msi: allocated virq %d\n", virq); 439 dev_dbg(&pdev->dev, "rtas_msi: allocated virq %d\n", virq);
440 set_irq_msi(virq, entry); 440 irq_set_msi_desc(virq, entry);
441 441
442 /* Read config space back so we can restore after reset */ 442 /* Read config space back so we can restore after reset */
443 read_msi_msg(virq, &msg); 443 read_msi_msg(virq, &msg);
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index 419707b07248..00cc3a094885 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -480,8 +480,32 @@ static void oops_to_nvram(struct kmsg_dumper *dumper,
480 const char *new_msgs, unsigned long new_len) 480 const char *new_msgs, unsigned long new_len)
481{ 481{
482 static unsigned int oops_count = 0; 482 static unsigned int oops_count = 0;
483 static bool panicking = false;
483 size_t text_len; 484 size_t text_len;
484 485
486 switch (reason) {
487 case KMSG_DUMP_RESTART:
488 case KMSG_DUMP_HALT:
489 case KMSG_DUMP_POWEROFF:
490 /* These are almost always orderly shutdowns. */
491 return;
492 case KMSG_DUMP_OOPS:
493 case KMSG_DUMP_KEXEC:
494 break;
495 case KMSG_DUMP_PANIC:
496 panicking = true;
497 break;
498 case KMSG_DUMP_EMERG:
499 if (panicking)
500 /* Panic report already captured. */
501 return;
502 break;
503 default:
504 pr_err("%s: ignoring unrecognized KMSG_DUMP_* reason %d\n",
505 __FUNCTION__, (int) reason);
506 return;
507 }
508
485 if (clobbering_unread_rtas_event()) 509 if (clobbering_unread_rtas_event())
486 return; 510 return;
487 511
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 2a0089a2c829..c319d04aa799 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -114,7 +114,7 @@ static void __init fwnmi_init(void)
114 114
115static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) 115static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc)
116{ 116{
117 struct irq_chip *chip = get_irq_desc_chip(desc); 117 struct irq_chip *chip = irq_desc_get_chip(desc);
118 unsigned int cascade_irq = i8259_irq(); 118 unsigned int cascade_irq = i8259_irq();
119 119
120 if (cascade_irq != NO_IRQ) 120 if (cascade_irq != NO_IRQ)
@@ -169,7 +169,7 @@ static void __init pseries_setup_i8259_cascade(void)
169 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); 169 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
170 i8259_init(found, intack); 170 i8259_init(found, intack);
171 of_node_put(found); 171 of_node_put(found);
172 set_irq_chained_handler(cascade, pseries_8259_cascade); 172 irq_set_chained_handler(cascade, pseries_8259_cascade);
173} 173}
174 174
175static void __init pseries_mpic_init_IRQ(void) 175static void __init pseries_mpic_init_IRQ(void)
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 0317cce877c6..d6479f9738f0 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -64,8 +64,8 @@ int smp_query_cpu_stopped(unsigned int pcpu)
64 int qcss_tok = rtas_token("query-cpu-stopped-state"); 64 int qcss_tok = rtas_token("query-cpu-stopped-state");
65 65
66 if (qcss_tok == RTAS_UNKNOWN_SERVICE) { 66 if (qcss_tok == RTAS_UNKNOWN_SERVICE) {
67 printk(KERN_INFO "Firmware doesn't support " 67 printk_once(KERN_INFO
68 "query-cpu-stopped-state\n"); 68 "Firmware doesn't support query-cpu-stopped-state\n");
69 return QCSS_HARDWARE_ERROR; 69 return QCSS_HARDWARE_ERROR;
70 } 70 }
71 71
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 01fea46c0335..ec8fe22047b7 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -204,33 +204,33 @@ static int get_irq_server(unsigned int virq, const struct cpumask *cpumask,
204 204
205static void xics_unmask_irq(struct irq_data *d) 205static void xics_unmask_irq(struct irq_data *d)
206{ 206{
207 unsigned int irq; 207 unsigned int hwirq;
208 int call_status; 208 int call_status;
209 int server; 209 int server;
210 210
211 pr_devel("xics: unmask virq %d\n", d->irq); 211 pr_devel("xics: unmask virq %d\n", d->irq);
212 212
213 irq = (unsigned int)irq_map[d->irq].hwirq; 213 hwirq = (unsigned int)irq_map[d->irq].hwirq;
214 pr_devel(" -> map to hwirq 0x%x\n", irq); 214 pr_devel(" -> map to hwirq 0x%x\n", hwirq);
215 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) 215 if (hwirq == XICS_IPI || hwirq == XICS_IRQ_SPURIOUS)
216 return; 216 return;
217 217
218 server = get_irq_server(d->irq, d->affinity, 0); 218 server = get_irq_server(d->irq, d->affinity, 0);
219 219
220 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, 220 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, hwirq, server,
221 DEFAULT_PRIORITY); 221 DEFAULT_PRIORITY);
222 if (call_status != 0) { 222 if (call_status != 0) {
223 printk(KERN_ERR 223 printk(KERN_ERR
224 "%s: ibm_set_xive irq %u server %x returned %d\n", 224 "%s: ibm_set_xive irq %u server %x returned %d\n",
225 __func__, irq, server, call_status); 225 __func__, hwirq, server, call_status);
226 return; 226 return;
227 } 227 }
228 228
229 /* Now unmask the interrupt (often a no-op) */ 229 /* Now unmask the interrupt (often a no-op) */
230 call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq); 230 call_status = rtas_call(ibm_int_on, 1, 1, NULL, hwirq);
231 if (call_status != 0) { 231 if (call_status != 0) {
232 printk(KERN_ERR "%s: ibm_int_on irq=%u returned %d\n", 232 printk(KERN_ERR "%s: ibm_int_on irq=%u returned %d\n",
233 __func__, irq, call_status); 233 __func__, hwirq, call_status);
234 return; 234 return;
235 } 235 }
236} 236}
@@ -250,46 +250,46 @@ static unsigned int xics_startup(struct irq_data *d)
250 return 0; 250 return 0;
251} 251}
252 252
253static void xics_mask_real_irq(struct irq_data *d) 253static void xics_mask_real_irq(unsigned int hwirq)
254{ 254{
255 int call_status; 255 int call_status;
256 256
257 if (d->irq == XICS_IPI) 257 if (hwirq == XICS_IPI)
258 return; 258 return;
259 259
260 call_status = rtas_call(ibm_int_off, 1, 1, NULL, d->irq); 260 call_status = rtas_call(ibm_int_off, 1, 1, NULL, hwirq);
261 if (call_status != 0) { 261 if (call_status != 0) {
262 printk(KERN_ERR "%s: ibm_int_off irq=%u returned %d\n", 262 printk(KERN_ERR "%s: ibm_int_off irq=%u returned %d\n",
263 __func__, d->irq, call_status); 263 __func__, hwirq, call_status);
264 return; 264 return;
265 } 265 }
266 266
267 /* Have to set XIVE to 0xff to be able to remove a slot */ 267 /* Have to set XIVE to 0xff to be able to remove a slot */
268 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, d->irq, 268 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, hwirq,
269 default_server, 0xff); 269 default_server, 0xff);
270 if (call_status != 0) { 270 if (call_status != 0) {
271 printk(KERN_ERR "%s: ibm_set_xive(0xff) irq=%u returned %d\n", 271 printk(KERN_ERR "%s: ibm_set_xive(0xff) irq=%u returned %d\n",
272 __func__, d->irq, call_status); 272 __func__, hwirq, call_status);
273 return; 273 return;
274 } 274 }
275} 275}
276 276
277static void xics_mask_irq(struct irq_data *d) 277static void xics_mask_irq(struct irq_data *d)
278{ 278{
279 unsigned int irq; 279 unsigned int hwirq;
280 280
281 pr_devel("xics: mask virq %d\n", d->irq); 281 pr_devel("xics: mask virq %d\n", d->irq);
282 282
283 irq = (unsigned int)irq_map[d->irq].hwirq; 283 hwirq = (unsigned int)irq_map[d->irq].hwirq;
284 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) 284 if (hwirq == XICS_IPI || hwirq == XICS_IRQ_SPURIOUS)
285 return; 285 return;
286 xics_mask_real_irq(d); 286 xics_mask_real_irq(hwirq);
287} 287}
288 288
289static void xics_mask_unknown_vec(unsigned int vec) 289static void xics_mask_unknown_vec(unsigned int vec)
290{ 290{
291 printk(KERN_ERR "Interrupt %u (real) is invalid, disabling it.\n", vec); 291 printk(KERN_ERR "Interrupt %u (real) is invalid, disabling it.\n", vec);
292 xics_mask_real_irq(irq_get_irq_data(vec)); 292 xics_mask_real_irq(vec);
293} 293}
294 294
295static inline unsigned int xics_xirr_vector(unsigned int xirr) 295static inline unsigned int xics_xirr_vector(unsigned int xirr)
@@ -373,37 +373,37 @@ static unsigned char pop_cppr(void)
373 373
374static void xics_eoi_direct(struct irq_data *d) 374static void xics_eoi_direct(struct irq_data *d)
375{ 375{
376 unsigned int irq = (unsigned int)irq_map[d->irq].hwirq; 376 unsigned int hwirq = (unsigned int)irq_map[d->irq].hwirq;
377 377
378 iosync(); 378 iosync();
379 direct_xirr_info_set((pop_cppr() << 24) | irq); 379 direct_xirr_info_set((pop_cppr() << 24) | hwirq);
380} 380}
381 381
382static void xics_eoi_lpar(struct irq_data *d) 382static void xics_eoi_lpar(struct irq_data *d)
383{ 383{
384 unsigned int irq = (unsigned int)irq_map[d->irq].hwirq; 384 unsigned int hwirq = (unsigned int)irq_map[d->irq].hwirq;
385 385
386 iosync(); 386 iosync();
387 lpar_xirr_info_set((pop_cppr() << 24) | irq); 387 lpar_xirr_info_set((pop_cppr() << 24) | hwirq);
388} 388}
389 389
390static int 390static int
391xics_set_affinity(struct irq_data *d, const struct cpumask *cpumask, bool force) 391xics_set_affinity(struct irq_data *d, const struct cpumask *cpumask, bool force)
392{ 392{
393 unsigned int irq; 393 unsigned int hwirq;
394 int status; 394 int status;
395 int xics_status[2]; 395 int xics_status[2];
396 int irq_server; 396 int irq_server;
397 397
398 irq = (unsigned int)irq_map[d->irq].hwirq; 398 hwirq = (unsigned int)irq_map[d->irq].hwirq;
399 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) 399 if (hwirq == XICS_IPI || hwirq == XICS_IRQ_SPURIOUS)
400 return -1; 400 return -1;
401 401
402 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); 402 status = rtas_call(ibm_get_xive, 1, 3, xics_status, hwirq);
403 403
404 if (status) { 404 if (status) {
405 printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n", 405 printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
406 __func__, irq, status); 406 __func__, hwirq, status);
407 return -1; 407 return -1;
408 } 408 }
409 409
@@ -418,11 +418,11 @@ xics_set_affinity(struct irq_data *d, const struct cpumask *cpumask, bool force)
418 } 418 }
419 419
420 status = rtas_call(ibm_set_xive, 3, 1, NULL, 420 status = rtas_call(ibm_set_xive, 3, 1, NULL,
421 irq, irq_server, xics_status[1]); 421 hwirq, irq_server, xics_status[1]);
422 422
423 if (status) { 423 if (status) {
424 printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n", 424 printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n",
425 __func__, irq, status); 425 __func__, hwirq, status);
426 return -1; 426 return -1;
427 } 427 }
428 428
@@ -470,8 +470,8 @@ static int xics_host_map(struct irq_host *h, unsigned int virq,
470 /* Insert the interrupt mapping into the radix tree for fast lookup */ 470 /* Insert the interrupt mapping into the radix tree for fast lookup */
471 irq_radix_revmap_insert(xics_host, virq, hw); 471 irq_radix_revmap_insert(xics_host, virq, hw);
472 472
473 irq_to_desc(virq)->status |= IRQ_LEVEL; 473 irq_set_status_flags(virq, IRQ_LEVEL);
474 set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq); 474 irq_set_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq);
475 return 0; 475 return 0;
476} 476}
477 477
@@ -600,7 +600,7 @@ static void xics_request_ipi(void)
600 * IPIs are marked IRQF_DISABLED as they must run with irqs 600 * IPIs are marked IRQF_DISABLED as they must run with irqs
601 * disabled 601 * disabled
602 */ 602 */
603 set_irq_handler(ipi, handle_percpu_irq); 603 irq_set_handler(ipi, handle_percpu_irq);
604 if (firmware_has_feature(FW_FEATURE_LPAR)) 604 if (firmware_has_feature(FW_FEATURE_LPAR))
605 rc = request_irq(ipi, xics_ipi_action_lpar, 605 rc = request_irq(ipi, xics_ipi_action_lpar,
606 IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL); 606 IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
@@ -874,7 +874,7 @@ void xics_kexec_teardown_cpu(int secondary)
874void xics_migrate_irqs_away(void) 874void xics_migrate_irqs_away(void)
875{ 875{
876 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id(); 876 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
877 unsigned int irq, virq; 877 int virq;
878 878
879 /* If we used to be the default server, move to the new "boot_cpuid" */ 879 /* If we used to be the default server, move to the new "boot_cpuid" */
880 if (hw_cpu == default_server) 880 if (hw_cpu == default_server)
@@ -892,6 +892,7 @@ void xics_migrate_irqs_away(void)
892 for_each_irq(virq) { 892 for_each_irq(virq) {
893 struct irq_desc *desc; 893 struct irq_desc *desc;
894 struct irq_chip *chip; 894 struct irq_chip *chip;
895 unsigned int hwirq;
895 int xics_status[2]; 896 int xics_status[2];
896 int status; 897 int status;
897 unsigned long flags; 898 unsigned long flags;
@@ -901,9 +902,9 @@ void xics_migrate_irqs_away(void)
901 continue; 902 continue;
902 if (irq_map[virq].host != xics_host) 903 if (irq_map[virq].host != xics_host)
903 continue; 904 continue;
904 irq = (unsigned int)irq_map[virq].hwirq; 905 hwirq = (unsigned int)irq_map[virq].hwirq;
905 /* We need to get IPIs still. */ 906 /* We need to get IPIs still. */
906 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) 907 if (hwirq == XICS_IPI || hwirq == XICS_IRQ_SPURIOUS)
907 continue; 908 continue;
908 909
909 desc = irq_to_desc(virq); 910 desc = irq_to_desc(virq);
@@ -912,16 +913,16 @@ void xics_migrate_irqs_away(void)
912 if (desc == NULL || desc->action == NULL) 913 if (desc == NULL || desc->action == NULL)
913 continue; 914 continue;
914 915
915 chip = get_irq_desc_chip(desc); 916 chip = irq_desc_get_chip(desc);
916 if (chip == NULL || chip->irq_set_affinity == NULL) 917 if (chip == NULL || chip->irq_set_affinity == NULL)
917 continue; 918 continue;
918 919
919 raw_spin_lock_irqsave(&desc->lock, flags); 920 raw_spin_lock_irqsave(&desc->lock, flags);
920 921
921 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); 922 status = rtas_call(ibm_get_xive, 1, 3, xics_status, hwirq);
922 if (status) { 923 if (status) {
923 printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n", 924 printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
924 __func__, irq, status); 925 __func__, hwirq, status);
925 goto unlock; 926 goto unlock;
926 } 927 }
927 928
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 0476bcc7c3e1..8b5aba263323 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -103,8 +103,8 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
103{ 103{
104 pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw); 104 pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw);
105 105
106 irq_to_desc(virq)->status |= IRQ_LEVEL; 106 irq_set_status_flags(virq, IRQ_LEVEL);
107 set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq); 107 irq_set_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq);
108 return 0; 108 return 0;
109} 109}
110 110
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index 473032556715..5495c1be472b 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -115,32 +115,25 @@ static void cpm2_ack(struct irq_data *d)
115 115
116static void cpm2_end_irq(struct irq_data *d) 116static void cpm2_end_irq(struct irq_data *d)
117{ 117{
118 struct irq_desc *desc;
119 int bit, word; 118 int bit, word;
120 unsigned int irq_nr = virq_to_hw(d->irq); 119 unsigned int irq_nr = virq_to_hw(d->irq);
121 120
122 desc = irq_to_desc(irq_nr); 121 bit = irq_to_siubit[irq_nr];
123 if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)) 122 word = irq_to_siureg[irq_nr];
124 && desc->action) {
125
126 bit = irq_to_siubit[irq_nr];
127 word = irq_to_siureg[irq_nr];
128 123
129 ppc_cached_irq_mask[word] |= 1 << bit; 124 ppc_cached_irq_mask[word] |= 1 << bit;
130 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); 125 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
131 126
132 /* 127 /*
133 * Work around large numbers of spurious IRQs on PowerPC 82xx 128 * Work around large numbers of spurious IRQs on PowerPC 82xx
134 * systems. 129 * systems.
135 */ 130 */
136 mb(); 131 mb();
137 }
138} 132}
139 133
140static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) 134static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type)
141{ 135{
142 unsigned int src = virq_to_hw(d->irq); 136 unsigned int src = virq_to_hw(d->irq);
143 struct irq_desc *desc = irq_to_desc(d->irq);
144 unsigned int vold, vnew, edibit; 137 unsigned int vold, vnew, edibit;
145 138
146 /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or 139 /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or
@@ -162,13 +155,11 @@ static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type)
162 goto err_sense; 155 goto err_sense;
163 } 156 }
164 157
165 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); 158 irqd_set_trigger_type(d, flow_type);
166 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; 159 if (flow_type & IRQ_TYPE_LEVEL_LOW)
167 if (flow_type & IRQ_TYPE_LEVEL_LOW) { 160 __irq_set_handler_locked(d->irq, handle_level_irq);
168 desc->status |= IRQ_LEVEL; 161 else
169 desc->handle_irq = handle_level_irq; 162 __irq_set_handler_locked(d->irq, handle_edge_irq);
170 } else
171 desc->handle_irq = handle_edge_irq;
172 163
173 /* internal IRQ senses are LEVEL_LOW 164 /* internal IRQ senses are LEVEL_LOW
174 * EXT IRQ and Port C IRQ senses are programmable 165 * EXT IRQ and Port C IRQ senses are programmable
@@ -179,7 +170,8 @@ static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type)
179 if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0) 170 if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0)
180 edibit = (31 - (CPM2_IRQ_PORTC0 - src)); 171 edibit = (31 - (CPM2_IRQ_PORTC0 - src));
181 else 172 else
182 return (flow_type & IRQ_TYPE_LEVEL_LOW) ? 0 : -EINVAL; 173 return (flow_type & IRQ_TYPE_LEVEL_LOW) ?
174 IRQ_SET_MASK_OK_NOCOPY : -EINVAL;
183 175
184 vold = in_be32(&cpm2_intctl->ic_siexr); 176 vold = in_be32(&cpm2_intctl->ic_siexr);
185 177
@@ -190,7 +182,7 @@ static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type)
190 182
191 if (vold != vnew) 183 if (vold != vnew)
192 out_be32(&cpm2_intctl->ic_siexr, vnew); 184 out_be32(&cpm2_intctl->ic_siexr, vnew);
193 return 0; 185 return IRQ_SET_MASK_OK_NOCOPY;
194 186
195err_sense: 187err_sense:
196 pr_err("CPM2 PIC: sense type 0x%x not supported\n", flow_type); 188 pr_err("CPM2 PIC: sense type 0x%x not supported\n", flow_type);
@@ -204,6 +196,7 @@ static struct irq_chip cpm2_pic = {
204 .irq_ack = cpm2_ack, 196 .irq_ack = cpm2_ack,
205 .irq_eoi = cpm2_end_irq, 197 .irq_eoi = cpm2_end_irq,
206 .irq_set_type = cpm2_set_irq_type, 198 .irq_set_type = cpm2_set_irq_type,
199 .flags = IRQCHIP_EOI_IF_HANDLED,
207}; 200};
208 201
209unsigned int cpm2_get_irq(void) 202unsigned int cpm2_get_irq(void)
@@ -226,8 +219,8 @@ static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq,
226{ 219{
227 pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw); 220 pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw);
228 221
229 irq_to_desc(virq)->status |= IRQ_LEVEL; 222 irq_set_status_flags(virq, IRQ_LEVEL);
230 set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq); 223 irq_set_chip_and_handler(virq, &cpm2_pic, handle_level_irq);
231 return 0; 224 return 0;
232} 225}
233 226
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 58e09b2833f2..d5679dc1e20f 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -64,10 +64,10 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
64 struct fsl_msi *msi_data = h->host_data; 64 struct fsl_msi *msi_data = h->host_data;
65 struct irq_chip *chip = &fsl_msi_chip; 65 struct irq_chip *chip = &fsl_msi_chip;
66 66
67 irq_to_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; 67 irq_set_status_flags(virq, IRQ_TYPE_EDGE_FALLING);
68 68
69 set_irq_chip_data(virq, msi_data); 69 irq_set_chip_data(virq, msi_data);
70 set_irq_chip_and_handler(virq, chip, handle_edge_irq); 70 irq_set_chip_and_handler(virq, chip, handle_edge_irq);
71 71
72 return 0; 72 return 0;
73} 73}
@@ -110,8 +110,8 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
110 list_for_each_entry(entry, &pdev->msi_list, list) { 110 list_for_each_entry(entry, &pdev->msi_list, list) {
111 if (entry->irq == NO_IRQ) 111 if (entry->irq == NO_IRQ)
112 continue; 112 continue;
113 msi_data = get_irq_data(entry->irq); 113 msi_data = irq_get_handler_data(entry->irq);
114 set_irq_msi(entry->irq, NULL); 114 irq_set_msi_desc(entry->irq, NULL);
115 msi_bitmap_free_hwirqs(&msi_data->bitmap, 115 msi_bitmap_free_hwirqs(&msi_data->bitmap,
116 virq_to_hw(entry->irq), 1); 116 virq_to_hw(entry->irq), 1);
117 irq_dispose_mapping(entry->irq); 117 irq_dispose_mapping(entry->irq);
@@ -168,8 +168,8 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
168 rc = -ENOSPC; 168 rc = -ENOSPC;
169 goto out_free; 169 goto out_free;
170 } 170 }
171 set_irq_data(virq, msi_data); 171 irq_set_handler_data(virq, msi_data);
172 set_irq_msi(virq, entry); 172 irq_set_msi_desc(virq, entry);
173 173
174 fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data); 174 fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data);
175 write_msi_msg(virq, &msg); 175 write_msi_msg(virq, &msg);
@@ -183,7 +183,8 @@ out_free:
183 183
184static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) 184static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
185{ 185{
186 struct irq_chip *chip = get_irq_desc_chip(desc); 186 struct irq_chip *chip = irq_desc_get_chip(desc);
187 struct irq_data *idata = irq_desc_get_irq_data(desc);
187 unsigned int cascade_irq; 188 unsigned int cascade_irq;
188 struct fsl_msi *msi_data; 189 struct fsl_msi *msi_data;
189 int msir_index = -1; 190 int msir_index = -1;
@@ -192,20 +193,20 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
192 u32 have_shift = 0; 193 u32 have_shift = 0;
193 struct fsl_msi_cascade_data *cascade_data; 194 struct fsl_msi_cascade_data *cascade_data;
194 195
195 cascade_data = (struct fsl_msi_cascade_data *)get_irq_data(irq); 196 cascade_data = (struct fsl_msi_cascade_data *)irq_get_handler_data(irq);
196 msi_data = cascade_data->msi_data; 197 msi_data = cascade_data->msi_data;
197 198
198 raw_spin_lock(&desc->lock); 199 raw_spin_lock(&desc->lock);
199 if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { 200 if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
200 if (chip->irq_mask_ack) 201 if (chip->irq_mask_ack)
201 chip->irq_mask_ack(&desc->irq_data); 202 chip->irq_mask_ack(idata);
202 else { 203 else {
203 chip->irq_mask(&desc->irq_data); 204 chip->irq_mask(idata);
204 chip->irq_ack(&desc->irq_data); 205 chip->irq_ack(idata);
205 } 206 }
206 } 207 }
207 208
208 if (unlikely(desc->status & IRQ_INPROGRESS)) 209 if (unlikely(irqd_irq_inprogress(idata)))
209 goto unlock; 210 goto unlock;
210 211
211 msir_index = cascade_data->index; 212 msir_index = cascade_data->index;
@@ -213,7 +214,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
213 if (msir_index >= NR_MSI_REG) 214 if (msir_index >= NR_MSI_REG)
214 cascade_irq = NO_IRQ; 215 cascade_irq = NO_IRQ;
215 216
216 desc->status |= IRQ_INPROGRESS; 217 irqd_set_chained_irq_inprogress(idata);
217 switch (msi_data->feature & FSL_PIC_IP_MASK) { 218 switch (msi_data->feature & FSL_PIC_IP_MASK) {
218 case FSL_PIC_IP_MPIC: 219 case FSL_PIC_IP_MPIC:
219 msir_value = fsl_msi_read(msi_data->msi_regs, 220 msir_value = fsl_msi_read(msi_data->msi_regs,
@@ -235,15 +236,15 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
235 have_shift += intr_index + 1; 236 have_shift += intr_index + 1;
236 msir_value = msir_value >> (intr_index + 1); 237 msir_value = msir_value >> (intr_index + 1);
237 } 238 }
238 desc->status &= ~IRQ_INPROGRESS; 239 irqd_clr_chained_irq_inprogress(idata);
239 240
240 switch (msi_data->feature & FSL_PIC_IP_MASK) { 241 switch (msi_data->feature & FSL_PIC_IP_MASK) {
241 case FSL_PIC_IP_MPIC: 242 case FSL_PIC_IP_MPIC:
242 chip->irq_eoi(&desc->irq_data); 243 chip->irq_eoi(idata);
243 break; 244 break;
244 case FSL_PIC_IP_IPIC: 245 case FSL_PIC_IP_IPIC:
245 if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask) 246 if (!irqd_irq_disabled(idata) && chip->irq_unmask)
246 chip->irq_unmask(&desc->irq_data); 247 chip->irq_unmask(idata);
247 break; 248 break;
248 } 249 }
249unlock: 250unlock:
@@ -261,7 +262,7 @@ static int fsl_of_msi_remove(struct platform_device *ofdev)
261 for (i = 0; i < NR_MSI_REG; i++) { 262 for (i = 0; i < NR_MSI_REG; i++) {
262 virq = msi->msi_virqs[i]; 263 virq = msi->msi_virqs[i];
263 if (virq != NO_IRQ) { 264 if (virq != NO_IRQ) {
264 cascade_data = get_irq_data(virq); 265 cascade_data = irq_get_handler_data(virq);
265 kfree(cascade_data); 266 kfree(cascade_data);
266 irq_dispose_mapping(virq); 267 irq_dispose_mapping(virq);
267 } 268 }
@@ -297,8 +298,8 @@ static int __devinit fsl_msi_setup_hwirq(struct fsl_msi *msi,
297 msi->msi_virqs[irq_index] = virt_msir; 298 msi->msi_virqs[irq_index] = virt_msir;
298 cascade_data->index = offset + irq_index; 299 cascade_data->index = offset + irq_index;
299 cascade_data->msi_data = msi; 300 cascade_data->msi_data = msi;
300 set_irq_data(virt_msir, cascade_data); 301 irq_set_handler_data(virt_msir, cascade_data);
301 set_irq_chained_handler(virt_msir, fsl_msi_cascade); 302 irq_set_chained_handler(virt_msir, fsl_msi_cascade);
302 303
303 return 0; 304 return 0;
304} 305}
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
index aeda4c8d0a0a..142770cb84b6 100644
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -175,13 +175,13 @@ static int i8259_host_map(struct irq_host *h, unsigned int virq,
175 175
176 /* We block the internal cascade */ 176 /* We block the internal cascade */
177 if (hw == 2) 177 if (hw == 2)
178 irq_to_desc(virq)->status |= IRQ_NOREQUEST; 178 irq_set_status_flags(virq, IRQ_NOREQUEST);
179 179
180 /* We use the level handler only for now, we might want to 180 /* We use the level handler only for now, we might want to
181 * be more cautious here but that works for now 181 * be more cautious here but that works for now
182 */ 182 */
183 irq_to_desc(virq)->status |= IRQ_LEVEL; 183 irq_set_status_flags(virq, IRQ_LEVEL);
184 set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq); 184 irq_set_chip_and_handler(virq, &i8259_pic, handle_level_irq);
185 return 0; 185 return 0;
186} 186}
187 187
@@ -191,7 +191,7 @@ static void i8259_host_unmap(struct irq_host *h, unsigned int virq)
191 i8259_mask_irq(irq_get_irq_data(virq)); 191 i8259_mask_irq(irq_get_irq_data(virq));
192 192
193 /* remove chip and handler */ 193 /* remove chip and handler */
194 set_irq_chip_and_handler(virq, NULL, NULL); 194 irq_set_chip_and_handler(virq, NULL, NULL);
195 195
196 /* Make sure it's completed */ 196 /* Make sure it's completed */
197 synchronize_irq(virq); 197 synchronize_irq(virq);
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 497047dc986e..fa438be962b7 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -605,7 +605,6 @@ static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type)
605{ 605{
606 struct ipic *ipic = ipic_from_irq(d->irq); 606 struct ipic *ipic = ipic_from_irq(d->irq);
607 unsigned int src = ipic_irq_to_hw(d->irq); 607 unsigned int src = ipic_irq_to_hw(d->irq);
608 struct irq_desc *desc = irq_to_desc(d->irq);
609 unsigned int vold, vnew, edibit; 608 unsigned int vold, vnew, edibit;
610 609
611 if (flow_type == IRQ_TYPE_NONE) 610 if (flow_type == IRQ_TYPE_NONE)
@@ -623,17 +622,16 @@ static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type)
623 printk(KERN_ERR "ipic: edge sense not supported on internal " 622 printk(KERN_ERR "ipic: edge sense not supported on internal "
624 "interrupts\n"); 623 "interrupts\n");
625 return -EINVAL; 624 return -EINVAL;
625
626 } 626 }
627 627
628 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); 628 irqd_set_trigger_type(d, flow_type);
629 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
630 if (flow_type & IRQ_TYPE_LEVEL_LOW) { 629 if (flow_type & IRQ_TYPE_LEVEL_LOW) {
631 desc->status |= IRQ_LEVEL; 630 __irq_set_handler_locked(d->irq, handle_level_irq);
632 desc->handle_irq = handle_level_irq; 631 d->chip = &ipic_level_irq_chip;
633 desc->irq_data.chip = &ipic_level_irq_chip;
634 } else { 632 } else {
635 desc->handle_irq = handle_edge_irq; 633 __irq_set_handler_locked(d->irq, handle_edge_irq);
636 desc->irq_data.chip = &ipic_edge_irq_chip; 634 d->chip = &ipic_edge_irq_chip;
637 } 635 }
638 636
639 /* only EXT IRQ senses are programmable on ipic 637 /* only EXT IRQ senses are programmable on ipic
@@ -655,7 +653,7 @@ static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type)
655 } 653 }
656 if (vold != vnew) 654 if (vold != vnew)
657 ipic_write(ipic->regs, IPIC_SECNR, vnew); 655 ipic_write(ipic->regs, IPIC_SECNR, vnew);
658 return 0; 656 return IRQ_SET_MASK_OK_NOCOPY;
659} 657}
660 658
661/* level interrupts and edge interrupts have different ack operations */ 659/* level interrupts and edge interrupts have different ack operations */
@@ -687,11 +685,11 @@ static int ipic_host_map(struct irq_host *h, unsigned int virq,
687{ 685{
688 struct ipic *ipic = h->host_data; 686 struct ipic *ipic = h->host_data;
689 687
690 set_irq_chip_data(virq, ipic); 688 irq_set_chip_data(virq, ipic);
691 set_irq_chip_and_handler(virq, &ipic_level_irq_chip, handle_level_irq); 689 irq_set_chip_and_handler(virq, &ipic_level_irq_chip, handle_level_irq);
692 690
693 /* Set default irq type */ 691 /* Set default irq type */
694 set_irq_type(virq, IRQ_TYPE_NONE); 692 irq_set_irq_type(virq, IRQ_TYPE_NONE);
695 693
696 return 0; 694 return 0;
697} 695}
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index 1a75a7fb4a99..a88800ff4d01 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -72,13 +72,6 @@ static void mpc8xx_end_irq(struct irq_data *d)
72 72
73static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) 73static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
74{ 74{
75 struct irq_desc *desc = irq_to_desc(d->irq);
76
77 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
78 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
79 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
80 desc->status |= IRQ_LEVEL;
81
82 if (flow_type & IRQ_TYPE_EDGE_FALLING) { 75 if (flow_type & IRQ_TYPE_EDGE_FALLING) {
83 irq_hw_number_t hw = (unsigned int)irq_map[d->irq].hwirq; 76 irq_hw_number_t hw = (unsigned int)irq_map[d->irq].hwirq;
84 unsigned int siel = in_be32(&siu_reg->sc_siel); 77 unsigned int siel = in_be32(&siu_reg->sc_siel);
@@ -87,7 +80,7 @@ static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
87 if ((hw & 1) == 0) { 80 if ((hw & 1) == 0) {
88 siel |= (0x80000000 >> hw); 81 siel |= (0x80000000 >> hw);
89 out_be32(&siu_reg->sc_siel, siel); 82 out_be32(&siu_reg->sc_siel, siel);
90 desc->handle_irq = handle_edge_irq; 83 __irq_set_handler_locked(d->irq, handle_edge_irq);
91 } 84 }
92 } 85 }
93 return 0; 86 return 0;
@@ -124,7 +117,7 @@ static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq,
124 pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw); 117 pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw);
125 118
126 /* Set default irq handle */ 119 /* Set default irq handle */
127 set_irq_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq); 120 irq_set_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq);
128 return 0; 121 return 0;
129} 122}
130 123
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c
index 232e701245d7..0892a2841c2b 100644
--- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -145,7 +145,7 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
145 145
146static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc) 146static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc)
147{ 147{
148 struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_desc_data(desc); 148 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
149 struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; 149 struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
150 unsigned int mask; 150 unsigned int mask;
151 151
@@ -278,9 +278,9 @@ static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq,
278 if (mpc8xxx_gc->of_dev_id_data) 278 if (mpc8xxx_gc->of_dev_id_data)
279 mpc8xxx_irq_chip.irq_set_type = mpc8xxx_gc->of_dev_id_data; 279 mpc8xxx_irq_chip.irq_set_type = mpc8xxx_gc->of_dev_id_data;
280 280
281 set_irq_chip_data(virq, h->host_data); 281 irq_set_chip_data(virq, h->host_data);
282 set_irq_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq); 282 irq_set_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq);
283 set_irq_type(virq, IRQ_TYPE_NONE); 283 irq_set_irq_type(virq, IRQ_TYPE_NONE);
284 284
285 return 0; 285 return 0;
286} 286}
@@ -369,8 +369,8 @@ static void __init mpc8xxx_add_controller(struct device_node *np)
369 out_be32(mm_gc->regs + GPIO_IER, 0xffffffff); 369 out_be32(mm_gc->regs + GPIO_IER, 0xffffffff);
370 out_be32(mm_gc->regs + GPIO_IMR, 0); 370 out_be32(mm_gc->regs + GPIO_IMR, 0);
371 371
372 set_irq_data(hwirq, mpc8xxx_gc); 372 irq_set_handler_data(hwirq, mpc8xxx_gc);
373 set_irq_chained_handler(hwirq, mpc8xxx_gpio_irq_cascade); 373 irq_set_chained_handler(hwirq, mpc8xxx_gpio_irq_cascade);
374 374
375skip_irq: 375skip_irq:
376 return; 376 return;
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 0f7c6718d261..f91c065bed5a 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -361,7 +361,7 @@ static inline void mpic_ht_end_irq(struct mpic *mpic, unsigned int source)
361} 361}
362 362
363static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source, 363static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
364 unsigned int irqflags) 364 bool level)
365{ 365{
366 struct mpic_irq_fixup *fixup = &mpic->fixups[source]; 366 struct mpic_irq_fixup *fixup = &mpic->fixups[source];
367 unsigned long flags; 367 unsigned long flags;
@@ -370,14 +370,14 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
370 if (fixup->base == NULL) 370 if (fixup->base == NULL)
371 return; 371 return;
372 372
373 DBG("startup_ht_interrupt(0x%x, 0x%x) index: %d\n", 373 DBG("startup_ht_interrupt(0x%x) index: %d\n",
374 source, irqflags, fixup->index); 374 source, fixup->index);
375 raw_spin_lock_irqsave(&mpic->fixup_lock, flags); 375 raw_spin_lock_irqsave(&mpic->fixup_lock, flags);
376 /* Enable and configure */ 376 /* Enable and configure */
377 writeb(0x10 + 2 * fixup->index, fixup->base + 2); 377 writeb(0x10 + 2 * fixup->index, fixup->base + 2);
378 tmp = readl(fixup->base + 4); 378 tmp = readl(fixup->base + 4);
379 tmp &= ~(0x23U); 379 tmp &= ~(0x23U);
380 if (irqflags & IRQ_LEVEL) 380 if (level)
381 tmp |= 0x22; 381 tmp |= 0x22;
382 writel(tmp, fixup->base + 4); 382 writel(tmp, fixup->base + 4);
383 raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags); 383 raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags);
@@ -389,8 +389,7 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
389#endif 389#endif
390} 390}
391 391
392static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source, 392static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source)
393 unsigned int irqflags)
394{ 393{
395 struct mpic_irq_fixup *fixup = &mpic->fixups[source]; 394 struct mpic_irq_fixup *fixup = &mpic->fixups[source];
396 unsigned long flags; 395 unsigned long flags;
@@ -399,7 +398,7 @@ static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source,
399 if (fixup->base == NULL) 398 if (fixup->base == NULL)
400 return; 399 return;
401 400
402 DBG("shutdown_ht_interrupt(0x%x, 0x%x)\n", source, irqflags); 401 DBG("shutdown_ht_interrupt(0x%x)\n", source);
403 402
404 /* Disable */ 403 /* Disable */
405 raw_spin_lock_irqsave(&mpic->fixup_lock, flags); 404 raw_spin_lock_irqsave(&mpic->fixup_lock, flags);
@@ -616,7 +615,7 @@ static struct mpic *mpic_find(unsigned int irq)
616 if (irq < NUM_ISA_INTERRUPTS) 615 if (irq < NUM_ISA_INTERRUPTS)
617 return NULL; 616 return NULL;
618 617
619 return get_irq_chip_data(irq); 618 return irq_get_chip_data(irq);
620} 619}
621 620
622/* Determine if the linux irq is an IPI */ 621/* Determine if the linux irq is an IPI */
@@ -650,7 +649,7 @@ static inline struct mpic * mpic_from_ipi(struct irq_data *d)
650/* Get the mpic structure from the irq number */ 649/* Get the mpic structure from the irq number */
651static inline struct mpic * mpic_from_irq(unsigned int irq) 650static inline struct mpic * mpic_from_irq(unsigned int irq)
652{ 651{
653 return get_irq_chip_data(irq); 652 return irq_get_chip_data(irq);
654} 653}
655 654
656/* Get the mpic structure from the irq data */ 655/* Get the mpic structure from the irq data */
@@ -738,7 +737,7 @@ static void mpic_unmask_ht_irq(struct irq_data *d)
738 737
739 mpic_unmask_irq(d); 738 mpic_unmask_irq(d);
740 739
741 if (irq_to_desc(d->irq)->status & IRQ_LEVEL) 740 if (irqd_is_level_type(d))
742 mpic_ht_end_irq(mpic, src); 741 mpic_ht_end_irq(mpic, src);
743} 742}
744 743
@@ -748,7 +747,7 @@ static unsigned int mpic_startup_ht_irq(struct irq_data *d)
748 unsigned int src = mpic_irq_to_hw(d->irq); 747 unsigned int src = mpic_irq_to_hw(d->irq);
749 748
750 mpic_unmask_irq(d); 749 mpic_unmask_irq(d);
751 mpic_startup_ht_interrupt(mpic, src, irq_to_desc(d->irq)->status); 750 mpic_startup_ht_interrupt(mpic, src, irqd_is_level_type(d));
752 751
753 return 0; 752 return 0;
754} 753}
@@ -758,7 +757,7 @@ static void mpic_shutdown_ht_irq(struct irq_data *d)
758 struct mpic *mpic = mpic_from_irq_data(d); 757 struct mpic *mpic = mpic_from_irq_data(d);
759 unsigned int src = mpic_irq_to_hw(d->irq); 758 unsigned int src = mpic_irq_to_hw(d->irq);
760 759
761 mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(d->irq)->status); 760 mpic_shutdown_ht_interrupt(mpic, src);
762 mpic_mask_irq(d); 761 mpic_mask_irq(d);
763} 762}
764 763
@@ -775,7 +774,7 @@ static void mpic_end_ht_irq(struct irq_data *d)
775 * latched another edge interrupt coming in anyway 774 * latched another edge interrupt coming in anyway
776 */ 775 */
777 776
778 if (irq_to_desc(d->irq)->status & IRQ_LEVEL) 777 if (irqd_is_level_type(d))
779 mpic_ht_end_irq(mpic, src); 778 mpic_ht_end_irq(mpic, src);
780 mpic_eoi(mpic); 779 mpic_eoi(mpic);
781} 780}
@@ -864,7 +863,6 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
864{ 863{
865 struct mpic *mpic = mpic_from_irq_data(d); 864 struct mpic *mpic = mpic_from_irq_data(d);
866 unsigned int src = mpic_irq_to_hw(d->irq); 865 unsigned int src = mpic_irq_to_hw(d->irq);
867 struct irq_desc *desc = irq_to_desc(d->irq);
868 unsigned int vecpri, vold, vnew; 866 unsigned int vecpri, vold, vnew;
869 867
870 DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", 868 DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n",
@@ -879,10 +877,7 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
879 if (flow_type == IRQ_TYPE_NONE) 877 if (flow_type == IRQ_TYPE_NONE)
880 flow_type = IRQ_TYPE_LEVEL_LOW; 878 flow_type = IRQ_TYPE_LEVEL_LOW;
881 879
882 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); 880 irqd_set_trigger_type(d, flow_type);
883 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
884 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
885 desc->status |= IRQ_LEVEL;
886 881
887 if (mpic_is_ht_interrupt(mpic, src)) 882 if (mpic_is_ht_interrupt(mpic, src))
888 vecpri = MPIC_VECPRI_POLARITY_POSITIVE | 883 vecpri = MPIC_VECPRI_POLARITY_POSITIVE |
@@ -897,7 +892,7 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
897 if (vold != vnew) 892 if (vold != vnew)
898 mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), vnew); 893 mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), vnew);
899 894
900 return 0; 895 return IRQ_SET_MASK_OK_NOCOPY;;
901} 896}
902 897
903void mpic_set_vector(unsigned int virq, unsigned int vector) 898void mpic_set_vector(unsigned int virq, unsigned int vector)
@@ -983,8 +978,8 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
983 WARN_ON(!(mpic->flags & MPIC_PRIMARY)); 978 WARN_ON(!(mpic->flags & MPIC_PRIMARY));
984 979
985 DBG("mpic: mapping as IPI\n"); 980 DBG("mpic: mapping as IPI\n");
986 set_irq_chip_data(virq, mpic); 981 irq_set_chip_data(virq, mpic);
987 set_irq_chip_and_handler(virq, &mpic->hc_ipi, 982 irq_set_chip_and_handler(virq, &mpic->hc_ipi,
988 handle_percpu_irq); 983 handle_percpu_irq);
989 return 0; 984 return 0;
990 } 985 }
@@ -1006,11 +1001,11 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
1006 1001
1007 DBG("mpic: mapping to irq chip @%p\n", chip); 1002 DBG("mpic: mapping to irq chip @%p\n", chip);
1008 1003
1009 set_irq_chip_data(virq, mpic); 1004 irq_set_chip_data(virq, mpic);
1010 set_irq_chip_and_handler(virq, chip, handle_fasteoi_irq); 1005 irq_set_chip_and_handler(virq, chip, handle_fasteoi_irq);
1011 1006
1012 /* Set default irq type */ 1007 /* Set default irq type */
1013 set_irq_type(virq, IRQ_TYPE_NONE); 1008 irq_set_irq_type(virq, IRQ_TYPE_NONE);
1014 1009
1015 /* If the MPIC was reset, then all vectors have already been 1010 /* If the MPIC was reset, then all vectors have already been
1016 * initialized. Otherwise, a per source lazy initialization 1011 * initialized. Otherwise, a per source lazy initialization
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c
index 0b7794acfce1..38e62382070c 100644
--- a/arch/powerpc/sysdev/mpic_pasemi_msi.c
+++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c
@@ -81,7 +81,7 @@ static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
81 if (entry->irq == NO_IRQ) 81 if (entry->irq == NO_IRQ)
82 continue; 82 continue;
83 83
84 set_irq_msi(entry->irq, NULL); 84 irq_set_msi_desc(entry->irq, NULL);
85 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, 85 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap,
86 virq_to_hw(entry->irq), ALLOC_CHUNK); 86 virq_to_hw(entry->irq), ALLOC_CHUNK);
87 irq_dispose_mapping(entry->irq); 87 irq_dispose_mapping(entry->irq);
@@ -131,9 +131,9 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
131 */ 131 */
132 mpic_set_vector(virq, 0); 132 mpic_set_vector(virq, 0);
133 133
134 set_irq_msi(virq, entry); 134 irq_set_msi_desc(virq, entry);
135 set_irq_chip(virq, &mpic_pasemi_msi_chip); 135 irq_set_chip(virq, &mpic_pasemi_msi_chip);
136 set_irq_type(virq, IRQ_TYPE_EDGE_RISING); 136 irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
137 137
138 pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%x) " \ 138 pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%x) " \
139 "addr 0x%x\n", virq, hwirq, msg.address_lo); 139 "addr 0x%x\n", virq, hwirq, msg.address_lo);
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index 71900ac78270..9a7aa0ed9c1c 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -129,7 +129,7 @@ static void u3msi_teardown_msi_irqs(struct pci_dev *pdev)
129 if (entry->irq == NO_IRQ) 129 if (entry->irq == NO_IRQ)
130 continue; 130 continue;
131 131
132 set_irq_msi(entry->irq, NULL); 132 irq_set_msi_desc(entry->irq, NULL);
133 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, 133 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap,
134 virq_to_hw(entry->irq), 1); 134 virq_to_hw(entry->irq), 1);
135 irq_dispose_mapping(entry->irq); 135 irq_dispose_mapping(entry->irq);
@@ -166,9 +166,9 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
166 return -ENOSPC; 166 return -ENOSPC;
167 } 167 }
168 168
169 set_irq_msi(virq, entry); 169 irq_set_msi_desc(virq, entry);
170 set_irq_chip(virq, &mpic_u3msi_chip); 170 irq_set_chip(virq, &mpic_u3msi_chip);
171 set_irq_type(virq, IRQ_TYPE_EDGE_RISING); 171 irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
172 172
173 pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", 173 pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n",
174 virq, hwirq, (unsigned long)addr); 174 virq, hwirq, (unsigned long)addr);
diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c
index bc61ebb8987c..e9c633c7c083 100644
--- a/arch/powerpc/sysdev/mv64x60_pic.c
+++ b/arch/powerpc/sysdev/mv64x60_pic.c
@@ -213,11 +213,12 @@ static int mv64x60_host_map(struct irq_host *h, unsigned int virq,
213{ 213{
214 int level1; 214 int level1;
215 215
216 irq_to_desc(virq)->status |= IRQ_LEVEL; 216 irq_set_status_flags(virq, IRQ_LEVEL);
217 217
218 level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET; 218 level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET;
219 BUG_ON(level1 > MV64x60_LEVEL1_GPP); 219 BUG_ON(level1 > MV64x60_LEVEL1_GPP);
220 set_irq_chip_and_handler(virq, mv64x60_chips[level1], handle_level_irq); 220 irq_set_chip_and_handler(virq, mv64x60_chips[level1],
221 handle_level_irq);
221 222
222 return 0; 223 return 0;
223} 224}
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 8c9ded8ea07c..832d6924ad1c 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -189,7 +189,7 @@ static inline void qe_ic_write(volatile __be32 __iomem * base, unsigned int reg
189 189
190static inline struct qe_ic *qe_ic_from_irq(unsigned int virq) 190static inline struct qe_ic *qe_ic_from_irq(unsigned int virq)
191{ 191{
192 return get_irq_chip_data(virq); 192 return irq_get_chip_data(virq);
193} 193}
194 194
195static inline struct qe_ic *qe_ic_from_irq_data(struct irq_data *d) 195static inline struct qe_ic *qe_ic_from_irq_data(struct irq_data *d)
@@ -267,10 +267,10 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq,
267 /* Default chip */ 267 /* Default chip */
268 chip = &qe_ic->hc_irq; 268 chip = &qe_ic->hc_irq;
269 269
270 set_irq_chip_data(virq, qe_ic); 270 irq_set_chip_data(virq, qe_ic);
271 irq_to_desc(virq)->status |= IRQ_LEVEL; 271 irq_set_status_flags(virq, IRQ_LEVEL);
272 272
273 set_irq_chip_and_handler(virq, chip, handle_level_irq); 273 irq_set_chip_and_handler(virq, chip, handle_level_irq);
274 274
275 return 0; 275 return 0;
276} 276}
@@ -386,13 +386,13 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,
386 386
387 qe_ic_write(qe_ic->regs, QEIC_CICR, temp); 387 qe_ic_write(qe_ic->regs, QEIC_CICR, temp);
388 388
389 set_irq_data(qe_ic->virq_low, qe_ic); 389 irq_set_handler_data(qe_ic->virq_low, qe_ic);
390 set_irq_chained_handler(qe_ic->virq_low, low_handler); 390 irq_set_chained_handler(qe_ic->virq_low, low_handler);
391 391
392 if (qe_ic->virq_high != NO_IRQ && 392 if (qe_ic->virq_high != NO_IRQ &&
393 qe_ic->virq_high != qe_ic->virq_low) { 393 qe_ic->virq_high != qe_ic->virq_low) {
394 set_irq_data(qe_ic->virq_high, qe_ic); 394 irq_set_handler_data(qe_ic->virq_high, qe_ic);
395 set_irq_chained_handler(qe_ic->virq_high, high_handler); 395 irq_set_chained_handler(qe_ic->virq_high, high_handler);
396 } 396 }
397} 397}
398 398
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index 02c91db90037..4d18658116e5 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -391,8 +391,8 @@ static int pci_irq_host_map(struct irq_host *h, unsigned int virq,
391 DBG("%s(%d, 0x%lx)\n", __func__, virq, hw); 391 DBG("%s(%d, 0x%lx)\n", __func__, virq, hw);
392 if ((virq >= 1) && (virq <= 4)){ 392 if ((virq >= 1) && (virq <= 4)){
393 irq = virq + IRQ_PCI_INTAD_BASE - 1; 393 irq = virq + IRQ_PCI_INTAD_BASE - 1;
394 irq_to_desc(irq)->status |= IRQ_LEVEL; 394 irq_set_status_flags(irq, IRQ_LEVEL);
395 set_irq_chip(irq, &tsi108_pci_irq); 395 irq_set_chip(irq, &tsi108_pci_irq);
396 } 396 }
397 return 0; 397 return 0;
398} 398}
@@ -431,7 +431,7 @@ void __init tsi108_pci_int_init(struct device_node *node)
431 431
432void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc) 432void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc)
433{ 433{
434 struct irq_chip *chip = get_irq_desc_chip(desc); 434 struct irq_chip *chip = irq_desc_get_chip(desc);
435 unsigned int cascade_irq = get_pci_source(); 435 unsigned int cascade_irq = get_pci_source();
436 436
437 if (cascade_irq != NO_IRQ) 437 if (cascade_irq != NO_IRQ)
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 835f7958b237..5d9138516628 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -57,7 +57,6 @@ struct uic {
57 57
58static void uic_unmask_irq(struct irq_data *d) 58static void uic_unmask_irq(struct irq_data *d)
59{ 59{
60 struct irq_desc *desc = irq_to_desc(d->irq);
61 struct uic *uic = irq_data_get_irq_chip_data(d); 60 struct uic *uic = irq_data_get_irq_chip_data(d);
62 unsigned int src = uic_irq_to_hw(d->irq); 61 unsigned int src = uic_irq_to_hw(d->irq);
63 unsigned long flags; 62 unsigned long flags;
@@ -66,7 +65,7 @@ static void uic_unmask_irq(struct irq_data *d)
66 sr = 1 << (31-src); 65 sr = 1 << (31-src);
67 spin_lock_irqsave(&uic->lock, flags); 66 spin_lock_irqsave(&uic->lock, flags);
68 /* ack level-triggered interrupts here */ 67 /* ack level-triggered interrupts here */
69 if (desc->status & IRQ_LEVEL) 68 if (irqd_is_level_type(d))
70 mtdcr(uic->dcrbase + UIC_SR, sr); 69 mtdcr(uic->dcrbase + UIC_SR, sr);
71 er = mfdcr(uic->dcrbase + UIC_ER); 70 er = mfdcr(uic->dcrbase + UIC_ER);
72 er |= sr; 71 er |= sr;
@@ -101,7 +100,6 @@ static void uic_ack_irq(struct irq_data *d)
101 100
102static void uic_mask_ack_irq(struct irq_data *d) 101static void uic_mask_ack_irq(struct irq_data *d)
103{ 102{
104 struct irq_desc *desc = irq_to_desc(d->irq);
105 struct uic *uic = irq_data_get_irq_chip_data(d); 103 struct uic *uic = irq_data_get_irq_chip_data(d);
106 unsigned int src = uic_irq_to_hw(d->irq); 104 unsigned int src = uic_irq_to_hw(d->irq);
107 unsigned long flags; 105 unsigned long flags;
@@ -120,7 +118,7 @@ static void uic_mask_ack_irq(struct irq_data *d)
120 * level interrupts are ack'ed after the actual 118 * level interrupts are ack'ed after the actual
121 * isr call in the uic_unmask_irq() 119 * isr call in the uic_unmask_irq()
122 */ 120 */
123 if (!(desc->status & IRQ_LEVEL)) 121 if (!irqd_is_level_type(d))
124 mtdcr(uic->dcrbase + UIC_SR, sr); 122 mtdcr(uic->dcrbase + UIC_SR, sr);
125 spin_unlock_irqrestore(&uic->lock, flags); 123 spin_unlock_irqrestore(&uic->lock, flags);
126} 124}
@@ -129,7 +127,6 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
129{ 127{
130 struct uic *uic = irq_data_get_irq_chip_data(d); 128 struct uic *uic = irq_data_get_irq_chip_data(d);
131 unsigned int src = uic_irq_to_hw(d->irq); 129 unsigned int src = uic_irq_to_hw(d->irq);
132 struct irq_desc *desc = irq_to_desc(d->irq);
133 unsigned long flags; 130 unsigned long flags;
134 int trigger, polarity; 131 int trigger, polarity;
135 u32 tr, pr, mask; 132 u32 tr, pr, mask;
@@ -166,11 +163,6 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
166 mtdcr(uic->dcrbase + UIC_PR, pr); 163 mtdcr(uic->dcrbase + UIC_PR, pr);
167 mtdcr(uic->dcrbase + UIC_TR, tr); 164 mtdcr(uic->dcrbase + UIC_TR, tr);
168 165
169 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
170 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
171 if (!trigger)
172 desc->status |= IRQ_LEVEL;
173
174 spin_unlock_irqrestore(&uic->lock, flags); 166 spin_unlock_irqrestore(&uic->lock, flags);
175 167
176 return 0; 168 return 0;
@@ -190,13 +182,13 @@ static int uic_host_map(struct irq_host *h, unsigned int virq,
190{ 182{
191 struct uic *uic = h->host_data; 183 struct uic *uic = h->host_data;
192 184
193 set_irq_chip_data(virq, uic); 185 irq_set_chip_data(virq, uic);
194 /* Despite the name, handle_level_irq() works for both level 186 /* Despite the name, handle_level_irq() works for both level
195 * and edge irqs on UIC. FIXME: check this is correct */ 187 * and edge irqs on UIC. FIXME: check this is correct */
196 set_irq_chip_and_handler(virq, &uic_irq_chip, handle_level_irq); 188 irq_set_chip_and_handler(virq, &uic_irq_chip, handle_level_irq);
197 189
198 /* Set default irq type */ 190 /* Set default irq type */
199 set_irq_type(virq, IRQ_TYPE_NONE); 191 irq_set_irq_type(virq, IRQ_TYPE_NONE);
200 192
201 return 0; 193 return 0;
202} 194}
@@ -220,17 +212,18 @@ static struct irq_host_ops uic_host_ops = {
220 212
221void uic_irq_cascade(unsigned int virq, struct irq_desc *desc) 213void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
222{ 214{
223 struct irq_chip *chip = get_irq_desc_chip(desc); 215 struct irq_chip *chip = irq_desc_get_chip(desc);
224 struct uic *uic = get_irq_data(virq); 216 struct irq_data *idata = irq_desc_get_irq_data(desc);
217 struct uic *uic = irq_get_handler_data(virq);
225 u32 msr; 218 u32 msr;
226 int src; 219 int src;
227 int subvirq; 220 int subvirq;
228 221
229 raw_spin_lock(&desc->lock); 222 raw_spin_lock(&desc->lock);
230 if (desc->status & IRQ_LEVEL) 223 if (irqd_is_level_type(idata))
231 chip->irq_mask(&desc->irq_data); 224 chip->irq_mask(idata);
232 else 225 else
233 chip->irq_mask_ack(&desc->irq_data); 226 chip->irq_mask_ack(idata);
234 raw_spin_unlock(&desc->lock); 227 raw_spin_unlock(&desc->lock);
235 228
236 msr = mfdcr(uic->dcrbase + UIC_MSR); 229 msr = mfdcr(uic->dcrbase + UIC_MSR);
@@ -244,10 +237,10 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
244 237
245uic_irq_ret: 238uic_irq_ret:
246 raw_spin_lock(&desc->lock); 239 raw_spin_lock(&desc->lock);
247 if (desc->status & IRQ_LEVEL) 240 if (irqd_is_level_type(idata))
248 chip->irq_ack(&desc->irq_data); 241 chip->irq_ack(idata);
249 if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask) 242 if (!irqd_irq_disabled(idata) && chip->irq_unmask)
250 chip->irq_unmask(&desc->irq_data); 243 chip->irq_unmask(idata);
251 raw_spin_unlock(&desc->lock); 244 raw_spin_unlock(&desc->lock);
252} 245}
253 246
@@ -336,8 +329,8 @@ void __init uic_init_tree(void)
336 329
337 cascade_virq = irq_of_parse_and_map(np, 0); 330 cascade_virq = irq_of_parse_and_map(np, 0);
338 331
339 set_irq_data(cascade_virq, uic); 332 irq_set_handler_data(cascade_virq, uic);
340 set_irq_chained_handler(cascade_virq, uic_irq_cascade); 333 irq_set_chained_handler(cascade_virq, uic_irq_cascade);
341 334
342 /* FIXME: setup critical cascade?? */ 335 /* FIXME: setup critical cascade?? */
343 } 336 }
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c
index 7436f3ed4df6..0a13fc19e287 100644
--- a/arch/powerpc/sysdev/xilinx_intc.c
+++ b/arch/powerpc/sysdev/xilinx_intc.c
@@ -79,12 +79,6 @@ static void xilinx_intc_mask(struct irq_data *d)
79 79
80static int xilinx_intc_set_type(struct irq_data *d, unsigned int flow_type) 80static int xilinx_intc_set_type(struct irq_data *d, unsigned int flow_type)
81{ 81{
82 struct irq_desc *desc = irq_to_desc(d->irq);
83
84 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
85 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
86 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
87 desc->status |= IRQ_LEVEL;
88 return 0; 82 return 0;
89} 83}
90 84
@@ -170,15 +164,15 @@ static int xilinx_intc_xlate(struct irq_host *h, struct device_node *ct,
170static int xilinx_intc_map(struct irq_host *h, unsigned int virq, 164static int xilinx_intc_map(struct irq_host *h, unsigned int virq,
171 irq_hw_number_t irq) 165 irq_hw_number_t irq)
172{ 166{
173 set_irq_chip_data(virq, h->host_data); 167 irq_set_chip_data(virq, h->host_data);
174 168
175 if (xilinx_intc_typetable[irq] == IRQ_TYPE_LEVEL_HIGH || 169 if (xilinx_intc_typetable[irq] == IRQ_TYPE_LEVEL_HIGH ||
176 xilinx_intc_typetable[irq] == IRQ_TYPE_LEVEL_LOW) { 170 xilinx_intc_typetable[irq] == IRQ_TYPE_LEVEL_LOW) {
177 set_irq_chip_and_handler(virq, &xilinx_intc_level_irqchip, 171 irq_set_chip_and_handler(virq, &xilinx_intc_level_irqchip,
178 handle_level_irq); 172 handle_level_irq);
179 } else { 173 } else {
180 set_irq_chip_and_handler(virq, &xilinx_intc_edge_irqchip, 174 irq_set_chip_and_handler(virq, &xilinx_intc_edge_irqchip,
181 handle_edge_irq); 175 handle_edge_irq);
182 } 176 }
183 return 0; 177 return 0;
184} 178}
@@ -229,7 +223,7 @@ int xilinx_intc_get_irq(void)
229 */ 223 */
230static void xilinx_i8259_cascade(unsigned int irq, struct irq_desc *desc) 224static void xilinx_i8259_cascade(unsigned int irq, struct irq_desc *desc)
231{ 225{
232 struct irq_chip *chip = get_irq_desc_chip(desc); 226 struct irq_chip *chip = irq_desc_get_chip(desc);
233 unsigned int cascade_irq = i8259_irq(); 227 unsigned int cascade_irq = i8259_irq();
234 228
235 if (cascade_irq) 229 if (cascade_irq)
@@ -256,7 +250,7 @@ static void __init xilinx_i8259_setup_cascade(void)
256 } 250 }
257 251
258 i8259_init(cascade_node, 0); 252 i8259_init(cascade_node, 0);
259 set_irq_chained_handler(cascade_irq, xilinx_i8259_cascade); 253 irq_set_chained_handler(cascade_irq, xilinx_i8259_cascade);
260 254
261 /* Program irq 7 (usb/audio), 14/15 (ide) to level sensitive */ 255 /* Program irq 7 (usb/audio), 14/15 (ide) to level sensitive */
262 /* This looks like a dirty hack to me --gcl */ 256 /* This looks like a dirty hack to me --gcl */
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-08 22:14:18 -0500