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authorThomas Gleixner <tglx@linutronix.de>2011-03-28 10:46:02 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 08:48:11 -0400
commitddaedd1c4aa0762563ca0cfdb22bbd8ef3ef785a (patch)
treebea57205b74adfff48e08b679b9d2b770dd8a903 /arch/powerpc
parent773e20d5b7bf948ab0207e1ddb81e52ae7e7c6f3 (diff)
powerpc-fsl-msi-use-irqd.patch
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/sysdev/fsl_msi.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 71965c6ca632..11f7aac89077 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -183,7 +183,8 @@ out_free:
183 183
184static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) 184static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
185{ 185{
186 struct irq_chip *chip = get_irq_desc_chip(desc); 186 struct irq_chip *chip = irq_desc_get_chip(desc);
187 struct irq_data *idata = irq_desc_get_irq_data(desc);
187 unsigned int cascade_irq; 188 unsigned int cascade_irq;
188 struct fsl_msi *msi_data; 189 struct fsl_msi *msi_data;
189 int msir_index = -1; 190 int msir_index = -1;
@@ -198,14 +199,14 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
198 raw_spin_lock(&desc->lock); 199 raw_spin_lock(&desc->lock);
199 if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { 200 if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
200 if (chip->irq_mask_ack) 201 if (chip->irq_mask_ack)
201 chip->irq_mask_ack(&desc->irq_data); 202 chip->irq_mask_ack(idata);
202 else { 203 else {
203 chip->irq_mask(&desc->irq_data); 204 chip->irq_mask(idata);
204 chip->irq_ack(&desc->irq_data); 205 chip->irq_ack(idata);
205 } 206 }
206 } 207 }
207 208
208 if (unlikely(desc->status & IRQ_INPROGRESS)) 209 if (unlikely(irqd_irq_inprogress(idata)))
209 goto unlock; 210 goto unlock;
210 211
211 msir_index = cascade_data->index; 212 msir_index = cascade_data->index;
@@ -213,7 +214,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
213 if (msir_index >= NR_MSI_REG) 214 if (msir_index >= NR_MSI_REG)
214 cascade_irq = NO_IRQ; 215 cascade_irq = NO_IRQ;
215 216
216 desc->status |= IRQ_INPROGRESS; 217 irqd_set_chained_irq_inprogress(idata);
217 switch (msi_data->feature & FSL_PIC_IP_MASK) { 218 switch (msi_data->feature & FSL_PIC_IP_MASK) {
218 case FSL_PIC_IP_MPIC: 219 case FSL_PIC_IP_MPIC:
219 msir_value = fsl_msi_read(msi_data->msi_regs, 220 msir_value = fsl_msi_read(msi_data->msi_regs,
@@ -235,15 +236,15 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
235 have_shift += intr_index + 1; 236 have_shift += intr_index + 1;
236 msir_value = msir_value >> (intr_index + 1); 237 msir_value = msir_value >> (intr_index + 1);
237 } 238 }
238 desc->status &= ~IRQ_INPROGRESS; 239 irqd_clr_chained_irq_inprogress(idata);
239 240
240 switch (msi_data->feature & FSL_PIC_IP_MASK) { 241 switch (msi_data->feature & FSL_PIC_IP_MASK) {
241 case FSL_PIC_IP_MPIC: 242 case FSL_PIC_IP_MPIC:
242 chip->irq_eoi(&desc->irq_data); 243 chip->irq_eoi(idata);
243 break; 244 break;
244 case FSL_PIC_IP_IPIC: 245 case FSL_PIC_IP_IPIC:
245 if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask) 246 if (!irqd_irq_disabled(idata) && chip->irq_unmask)
246 chip->irq_unmask(&desc->irq_data); 247 chip->irq_unmask(idata);
247 break; 248 break;
248 } 249 }
249unlock: 250unlock: