aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc
diff options
context:
space:
mode:
authorTimur Tabi <timur@freescale.com>2011-06-08 15:03:05 -0400
committerKumar Gala <galak@kernel.crashing.org>2011-06-22 07:14:54 -0400
commitf3fed682f78dfab384d3dc3f9ca7a7338a93c142 (patch)
tree86fb6bd8b175fc321d8db33aeef643e230fa98b9 /arch/powerpc
parentc02a02ee4db5cd8b95ee3cc705b535f443612583 (diff)
powerpc/p1022ds: fix audio-related properties in the device tree
On the Freescale P1022DS reference board, the SSI audio controller is connected in "asynchronous" mode to the codec's clocks, so the device tree needs an "fsl,ssi-asynchronous" property. Also remove the clock-frequency property from the wm8776 node, because the clock is enabled only if U-Boot enables it, and U-Boot will set the property if the clock is enabled. A future version of the P1022DS audio driver will configure the clock itself, but for now, the driver should not be told that the clock is running when it isn't. Also fix the FIFO depth to 15, instead of 16. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/boot/dts/p1022ds.dts9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index 4f685a779f4c..98d9426d4b85 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -209,8 +209,10 @@
209 wm8776:codec@1a { 209 wm8776:codec@1a {
210 compatible = "wlf,wm8776"; 210 compatible = "wlf,wm8776";
211 reg = <0x1a>; 211 reg = <0x1a>;
212 /* MCLK source is a stand-alone oscillator */ 212 /*
213 clock-frequency = <12288000>; 213 * clock-frequency will be set by U-Boot if
214 * the clock is enabled.
215 */
214 }; 216 };
215 }; 217 };
216 218
@@ -280,7 +282,8 @@
280 codec-handle = <&wm8776>; 282 codec-handle = <&wm8776>;
281 fsl,playback-dma = <&dma00>; 283 fsl,playback-dma = <&dma00>;
282 fsl,capture-dma = <&dma01>; 284 fsl,capture-dma = <&dma01>;
283 fsl,fifo-depth = <16>; 285 fsl,fifo-depth = <15>;
286 fsl,ssi-asynchronous;
284 }; 287 };
285 288
286 dma@c300 { 289 dma@c300 {