Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci

* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)
  x86/PCI: Expand the x86_msi_ops to have a restore MSIs.
  PCI: Increase resource array mask bit size in pcim_iomap_regions()
  PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES
  PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)
  PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB
  x86/PCI: amd: factor out MMCONFIG discovery
  PCI: Enable ATS at the device state restore
  PCI: msi: fix imbalanced refcount of msi irq sysfs objects
  PCI: kconfig: English typo in pci/pcie/Kconfig
  PCI/PM/Runtime: make PCI traces quieter
  PCI: remove pci_create_bus()
  xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources
  x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()
  x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()
  x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan
  sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources
  sparc/PCI: convert to pci_create_root_bus()
  sh/PCI: convert to pci_scan_root_bus() for correct root bus resources
  powerpc/PCI: convert to pci_create_root_bus()
  powerpc/PCI: split PHB part out of pcibios_map_io_space()
  ...

Fix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due
to the same patches being applied in other branches.

4 files changed, 40 insertions, 36 deletions

diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 882b6aa6c857..5d487657322e 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -226,7 +226,6 @@ extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
 /* Allocate & free a PCI host bridge structure */
 extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
 extern void pcibios_free_controller(struct pci_controller *phb);
-extern void pcibios_setup_phb_resources(struct pci_controller *hose);
 
 #ifdef CONFIG_PCI
 extern int pcibios_vaddr_is_ioport(void __iomem *address);
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 1c92013466e3..f54b3d26ce9d 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -46,11 +46,6 @@ struct pci_dev;
 #define pcibios_assign_all_busses() \
         (pci_has_flag(PCI_REASSIGN_ALL_BUS))
 
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
-
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
         /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index fa4a573d6716..cce98d76e905 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1131,6 +1131,11 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
         }
 }
 
+void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
+}
+
 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
         /* When called from the generic PCI probe, read PCI<->PCI bridge
@@ -1560,14 +1565,13 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
         return pci_enable_resources(dev, mask);
 }
 
-void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
+static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, struct list_head *resources)
 {
-        struct pci_bus *bus = hose->bus;
         struct resource *res;
         int i;
 
         /* Hookup PHB IO resource */
-        bus->resource[0] = res = &hose->io_resource;
+        res = &hose->io_resource;
 
         if (!res->flags) {
                 printk(KERN_WARNING "PCI: I/O resource not set for host"
@@ -1585,6 +1589,7 @@ void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
                  (unsigned long long)res->start,
                  (unsigned long long)res->end,
                  (unsigned long)res->flags);
+        pci_add_resource(resources, res);
 
         /* Hookup PHB Memory resources */
         for (i = 0; i < 3; ++i) {
@@ -1602,12 +1607,12 @@ void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
                         res->flags = IORESOURCE_MEM;
 #endif /* CONFIG_PPC32 */
                 }
-                bus->resource[i+1] = res;
 
                 pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n", i,
                          (unsigned long long)res->start,
                          (unsigned long long)res->end,
                          (unsigned long)res->flags);
+                pci_add_resource(resources, res);
         }
 
         pr_debug("PCI: PHB MEM offset     = %016llx\n",
@@ -1701,6 +1706,7 @@ struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
  */
 void __devinit pcibios_scan_phb(struct pci_controller *hose)
 {
+        LIST_HEAD(resources);
         struct pci_bus *bus;
         struct device_node *node = hose->dn;
         int mode;
@@ -1708,22 +1714,24 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
         pr_debug("PCI: Scanning PHB %s\n",
                  node ? node->full_name : "<NO NAME>");
 
+        /* Get some IO space for the new PHB */
+        pcibios_setup_phb_io_space(hose);
+
+        /* Wire up PHB bus resources */
+        pcibios_setup_phb_resources(hose, &resources);
+
         /* Create an empty bus for the toplevel */
-        bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
+        bus = pci_create_root_bus(hose->parent, hose->first_busno,
+                                  hose->ops, hose, &resources);
         if (bus == NULL) {
                 pr_err("Failed to create bus for PCI domain %04x\n",
                         hose->global_number);
+                pci_free_resource_list(&resources);
                 return;
         }
         bus->secondary = hose->first_busno;
         hose->bus = bus;
 
-        /* Get some IO space for the new PHB */
-        pcibios_setup_phb_io_space(hose);
-
-        /* Wire up PHB bus resources */
-        pcibios_setup_phb_resources(hose);
-
         /* Get probe mode and perform scan */
         mode = PCI_PROBE_NORMAL;
         if (node && ppc_md.pci_probe_mode)
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index bcf4bf9e72d9..3318d39b7d4c 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -131,30 +131,13 @@ EXPORT_SYMBOL_GPL(pcibios_unmap_io_space);
 
 #endif /* CONFIG_HOTPLUG */
 
-int __devinit pcibios_map_io_space(struct pci_bus *bus)
+static int __devinit pcibios_map_phb_io_space(struct pci_controller *hose)
 {
         struct vm_struct *area;
         unsigned long phys_page;
         unsigned long size_page;
         unsigned long io_virt_offset;
-        struct pci_controller *hose;
-
-        WARN_ON(bus == NULL);
-
-        /* If this not a PHB, nothing to do, page tables still exist and
-         * thus HPTEs will be faulted in when needed
-         */
-        if (bus->self) {
-                pr_debug("IO mapping for PCI-PCI bridge %s\n",
-                         pci_name(bus->self));
-                pr_debug("  virt=0x%016llx...0x%016llx\n",
-                         bus->resource[0]->start + _IO_BASE,
-                         bus->resource[0]->end + _IO_BASE);
-                return 0;
-        }
 
-        /* Get the host bridge */
-        hose = pci_bus_to_host(bus);
         phys_page = _ALIGN_DOWN(hose->io_base_phys, PAGE_SIZE);
         size_page = _ALIGN_UP(hose->pci_io_size, PAGE_SIZE);
 
@@ -198,11 +181,30 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
 
         return 0;
 }
+
+int __devinit pcibios_map_io_space(struct pci_bus *bus)
+{
+        WARN_ON(bus == NULL);
+
+        /* If this not a PHB, nothing to do, page tables still exist and
+         * thus HPTEs will be faulted in when needed
+         */
+        if (bus->self) {
+                pr_debug("IO mapping for PCI-PCI bridge %s\n",
+                         pci_name(bus->self));
+                pr_debug("  virt=0x%016llx...0x%016llx\n",
+                         bus->resource[0]->start + _IO_BASE,
+                         bus->resource[0]->end + _IO_BASE);
+                return 0;
+        }
+
+        return pcibios_map_phb_io_space(pci_bus_to_host(bus));
+}
 EXPORT_SYMBOL_GPL(pcibios_map_io_space);
 
 void __devinit pcibios_setup_phb_io_space(struct pci_controller *hose)
 {
-        pcibios_map_io_space(hose->bus);
+        pcibios_map_phb_io_space(hose);
 }
 
 #define IOBASE_BRIDGE_NUMBER    0