diff options
author | Becky Bruce <bgill@freescale.com> | 2006-02-07 22:29:42 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-02-10 00:51:57 -0500 |
commit | fbc94e7c3d78d53c7fa671e02e5bb6fbb3254f85 (patch) | |
tree | a0d9d70b948ca8de3ed16d1fef9dfb1a6033e27e /arch/powerpc | |
parent | e19217d42e3d12d74d9eca40827721a3ef1b251c (diff) |
[PATCH] powerpc: lindent 85xx platform code
Ran arch/powerpc/platforms/85xx through Lindent
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/platforms/85xx/mpc8540_ads.h | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_ads.c | 46 |
2 files changed, 19 insertions, 29 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc8540_ads.h b/arch/powerpc/platforms/85xx/mpc8540_ads.h index 47609c97e01e..b3ec88caad11 100644 --- a/arch/powerpc/platforms/85xx/mpc8540_ads.h +++ b/arch/powerpc/platforms/85xx/mpc8540_ads.h | |||
@@ -57,4 +57,4 @@ | |||
57 | /* Offset of CPM register space */ | 57 | /* Offset of CPM register space */ |
58 | #define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET) | 58 | #define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET) |
59 | 59 | ||
60 | #endif /* __MACH_MPC8540ADS_H__ */ | 60 | #endif /* __MACH_MPC8540ADS_H__ */ |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 9e8a91bc8018..ba6798d47654 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c | |||
@@ -38,7 +38,6 @@ unsigned long isa_io_base = 0; | |||
38 | unsigned long isa_mem_base = 0; | 38 | unsigned long isa_mem_base = 0; |
39 | #endif | 39 | #endif |
40 | 40 | ||
41 | |||
42 | /* | 41 | /* |
43 | * Internal interrupts are all Level Sensitive, and Positive Polarity | 42 | * Internal interrupts are all Level Sensitive, and Positive Polarity |
44 | * | 43 | * |
@@ -47,28 +46,27 @@ unsigned long isa_mem_base = 0; | |||
47 | */ | 46 | */ |
48 | static u_char mpc85xx_ads_openpic_initsenses[] __initdata = { | 47 | static u_char mpc85xx_ads_openpic_initsenses[] __initdata = { |
49 | MPC85XX_INTERNAL_IRQ_SENSES, | 48 | MPC85XX_INTERNAL_IRQ_SENSES, |
50 | 0x0, /* External 0: */ | 49 | 0x0, /* External 0: */ |
51 | #if defined(CONFIG_PCI) | 50 | #if defined(CONFIG_PCI) |
52 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 1: PCI slot 0 */ | 51 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 1: PCI slot 0 */ |
53 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 2: PCI slot 1 */ | 52 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 2: PCI slot 1 */ |
54 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 3: PCI slot 2 */ | 53 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 3: PCI slot 2 */ |
55 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 4: PCI slot 3 */ | 54 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 4: PCI slot 3 */ |
56 | #else | 55 | #else |
57 | 0x0, /* External 1: */ | 56 | 0x0, /* External 1: */ |
58 | 0x0, /* External 2: */ | 57 | 0x0, /* External 2: */ |
59 | 0x0, /* External 3: */ | 58 | 0x0, /* External 3: */ |
60 | 0x0, /* External 4: */ | 59 | 0x0, /* External 4: */ |
61 | #endif | 60 | #endif |
62 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */ | 61 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */ |
63 | 0x0, /* External 6: */ | 62 | 0x0, /* External 6: */ |
64 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */ | 63 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */ |
65 | 0x0, /* External 8: */ | 64 | 0x0, /* External 8: */ |
66 | 0x0, /* External 9: */ | 65 | 0x0, /* External 9: */ |
67 | 0x0, /* External 10: */ | 66 | 0x0, /* External 10: */ |
68 | 0x0, /* External 11: */ | 67 | 0x0, /* External 11: */ |
69 | }; | 68 | }; |
70 | 69 | ||
71 | |||
72 | void __init mpc85xx_ads_pic_init(void) | 70 | void __init mpc85xx_ads_pic_init(void) |
73 | { | 71 | { |
74 | struct mpic *mpic1; | 72 | struct mpic *mpic1; |
@@ -78,10 +76,11 @@ void __init mpc85xx_ads_pic_init(void) | |||
78 | OpenPIC_PAddr = get_immrbase() + MPC85xx_OPENPIC_OFFSET; | 76 | OpenPIC_PAddr = get_immrbase() + MPC85xx_OPENPIC_OFFSET; |
79 | 77 | ||
80 | mpic1 = mpic_alloc(OpenPIC_PAddr, | 78 | mpic1 = mpic_alloc(OpenPIC_PAddr, |
81 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 79 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, |
82 | 4, MPC85xx_OPENPIC_IRQ_OFFSET, 0, 250, | 80 | 4, MPC85xx_OPENPIC_IRQ_OFFSET, 0, 250, |
83 | mpc85xx_ads_openpic_initsenses, | 81 | mpc85xx_ads_openpic_initsenses, |
84 | sizeof(mpc85xx_ads_openpic_initsenses), " OpenPIC "); | 82 | sizeof(mpc85xx_ads_openpic_initsenses), |
83 | " OpenPIC "); | ||
85 | BUG_ON(mpic1 == NULL); | 84 | BUG_ON(mpic1 == NULL); |
86 | mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200); | 85 | mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200); |
87 | mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10280); | 86 | mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10280); |
@@ -105,12 +104,10 @@ void __init mpc85xx_ads_pic_init(void) | |||
105 | mpic_init(mpic1); | 104 | mpic_init(mpic1); |
106 | } | 105 | } |
107 | 106 | ||
108 | |||
109 | /* | 107 | /* |
110 | * Setup the architecture | 108 | * Setup the architecture |
111 | */ | 109 | */ |
112 | static void __init | 110 | static void __init mpc85xx_ads_setup_arch(void) |
113 | mpc85xx_ads_setup_arch(void) | ||
114 | { | 111 | { |
115 | struct device_node *cpu; | 112 | struct device_node *cpu; |
116 | 113 | ||
@@ -128,7 +125,6 @@ mpc85xx_ads_setup_arch(void) | |||
128 | loops_per_jiffy = 50000000 / HZ; | 125 | loops_per_jiffy = 50000000 / HZ; |
129 | of_node_put(cpu); | 126 | of_node_put(cpu); |
130 | } | 127 | } |
131 | |||
132 | #ifdef CONFIG_ROOT_NFS | 128 | #ifdef CONFIG_ROOT_NFS |
133 | ROOT_DEV = Root_NFS; | 129 | ROOT_DEV = Root_NFS; |
134 | #else | 130 | #else |
@@ -136,9 +132,7 @@ mpc85xx_ads_setup_arch(void) | |||
136 | #endif | 132 | #endif |
137 | } | 133 | } |
138 | 134 | ||
139 | 135 | void mpc85xx_ads_show_cpuinfo(struct seq_file *m) | |
140 | void | ||
141 | mpc85xx_ads_show_cpuinfo(struct seq_file *m) | ||
142 | { | 136 | { |
143 | uint pvid, svid, phid1; | 137 | uint pvid, svid, phid1; |
144 | uint memsize = total_memory; | 138 | uint memsize = total_memory; |
@@ -159,9 +153,7 @@ mpc85xx_ads_show_cpuinfo(struct seq_file *m) | |||
159 | seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); | 153 | seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); |
160 | } | 154 | } |
161 | 155 | ||
162 | 156 | void __init platform_init(void) | |
163 | void __init | ||
164 | platform_init(void) | ||
165 | { | 157 | { |
166 | ppc_md.setup_arch = mpc85xx_ads_setup_arch; | 158 | ppc_md.setup_arch = mpc85xx_ads_setup_arch; |
167 | ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo; | 159 | ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo; |
@@ -183,5 +175,3 @@ platform_init(void) | |||
183 | if (ppc_md.progress) | 175 | if (ppc_md.progress) |
184 | ppc_md.progress("mpc85xx_ads platform_init(): exit", 0); | 176 | ppc_md.progress("mpc85xx_ads platform_init(): exit", 0); |
185 | } | 177 | } |
186 | |||
187 | |||