[POWERPC] Check _PAGE_RW and _PAGE_PRESENT on kernel addresses

Previously, the TLB miss handlers assumed that pages above KERNELBASE are
always present and read/write.  This assumption is false in the case of
CONFIG_DEBUG_PAGEALLOC.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

1 files changed, 6 insertions, 6 deletions

diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 7d73a13450b0..0e3df1f55feb 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -475,10 +475,10 @@ InstructionTLBMiss:
         li      r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
         lwz     r2,PGDIR(r2)
         blt+    112f
+        mfspr   r2,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
+        rlwimi  r1,r2,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
         lis     r2,swapper_pg_dir@ha    /* if kernel address, use */
         addi    r2,r2,swapper_pg_dir@l  /* kernel page table */
-        mfspr   r1,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
-        rlwinm  r1,r1,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
 112:    tophys(r2,r2)
         rlwimi  r2,r3,12,20,29          /* insert top 10 bits of address */
         lwz     r2,0(r2)                /* get pmd entry */
@@ -549,10 +549,10 @@ DataLoadTLBMiss:
         li      r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
         lwz     r2,PGDIR(r2)
         blt+    112f
+        mfspr   r2,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
+        rlwimi  r1,r2,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
         lis     r2,swapper_pg_dir@ha    /* if kernel address, use */
         addi    r2,r2,swapper_pg_dir@l  /* kernel page table */
-        mfspr   r1,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
-        rlwinm  r1,r1,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
 112:    tophys(r2,r2)
         rlwimi  r2,r3,12,20,29          /* insert top 10 bits of address */
         lwz     r2,0(r2)                /* get pmd entry */
@@ -621,10 +621,10 @@ DataStoreTLBMiss:
         li      r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
         lwz     r2,PGDIR(r2)
         blt+    112f
+        mfspr   r2,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
+        rlwimi  r1,r2,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
         lis     r2,swapper_pg_dir@ha    /* if kernel address, use */
         addi    r2,r2,swapper_pg_dir@l  /* kernel page table */
-        mfspr   r1,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
-        rlwinm  r1,r1,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
 112:    tophys(r2,r2)
         rlwimi  r2,r3,12,20,29          /* insert top 10 bits of address */
         lwz     r2,0(r2)                /* get pmd entry */