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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-01-12 21:59:03 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-01-12 21:59:03 -0500
commit30aae739a9eb6db31ad7b08dac44bd302f41c709 (patch)
treee57a3e279946e141041adc7244d67d8c77c59e2e /arch/powerpc
parent37a76bd4f1b716949fc38a6842e89f0ccb8384d0 (diff)
parent6fd8be4bf72879b3039654388e985cabf8449af5 (diff)
Merge commit 'kumar/kumar-next' into next
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts2
-rw-r--r--arch/powerpc/include/asm/qe.h19
-rw-r--r--arch/powerpc/kernel/asm-offsets.c7
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S6
-rw-r--r--arch/powerpc/mm/fsl_booke_mmu.c9
-rw-r--r--arch/powerpc/mm/mmu_decl.h11
-rw-r--r--arch/powerpc/platforms/fsl_uli1575.c1
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c107
11 files changed, 117 insertions, 55 deletions
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index b9da42105066..0668d1048779 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -313,7 +313,7 @@
313 0x1000000 0x0 0x0 0xe1010000 0x0 0x10000>; 313 0x1000000 0x0 0x0 0xe1010000 0x0 0x10000>;
314 clock-frequency = <33333333>; 314 clock-frequency = <33333333>;
315 interrupt-parent = <&mpic>; 315 interrupt-parent = <&mpic>;
316 interrupts = <26 2>; 316 interrupts = <25 2>;
317 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 317 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
318 interrupt-map = < 318 interrupt-map = <
319 /* IDSEL 0x0 */ 319 /* IDSEL 0x0 */
@@ -350,7 +350,7 @@
350 0x1000000 0x0 0x0 0xe1020000 0x0 0x10000>; 350 0x1000000 0x0 0x0 0xe1020000 0x0 0x10000>;
351 clock-frequency = <33333333>; 351 clock-frequency = <33333333>;
352 interrupt-parent = <&mpic>; 352 interrupt-parent = <&mpic>;
353 interrupts = <25 2>; 353 interrupts = <26 2>;
354 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 354 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
355 interrupt-map = < 355 interrupt-map = <
356 /* IDSEL 0x0 */ 356 /* IDSEL 0x0 */
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 21459e161d02..3dcc001b8ed3 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -724,7 +724,7 @@
724 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; 724 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>;
725 clock-frequency = <33333333>; 725 clock-frequency = <33333333>;
726 interrupt-parent = <&mpic>; 726 interrupt-parent = <&mpic>;
727 interrupts = <26 2>; 727 interrupts = <25 2>;
728 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 728 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
729 interrupt-map = < 729 interrupt-map = <
730 /* IDSEL 0x0 */ 730 /* IDSEL 0x0 */
@@ -761,7 +761,7 @@
761 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; 761 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>;
762 clock-frequency = <33333333>; 762 clock-frequency = <33333333>;
763 interrupt-parent = <&mpic>; 763 interrupt-parent = <&mpic>;
764 interrupts = <27 2>; 764 interrupts = <26 2>;
765 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 765 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
766 interrupt-map = < 766 interrupt-map = <
767 /* IDSEL 0x0 */ 767 /* IDSEL 0x0 */
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index c114c4ee9931..fd462efa9e61 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -457,7 +457,7 @@
457 0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>; 457 0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>;
458 clock-frequency = <33333333>; 458 clock-frequency = <33333333>;
459 interrupt-parent = <&mpic>; 459 interrupt-parent = <&mpic>;
460 interrupts = <26 2>; 460 interrupts = <25 2>;
461 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 461 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
462 interrupt-map = < 462 interrupt-map = <
463 /* IDSEL 0x0 */ 463 /* IDSEL 0x0 */
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index 04ecda18d206..e35230f2ac93 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -208,7 +208,7 @@
208 0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>; 208 0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>;
209 clock-frequency = <33333333>; 209 clock-frequency = <33333333>;
210 interrupt-parent = <&mpic>; 210 interrupt-parent = <&mpic>;
211 interrupts = <27 2>; 211 interrupts = <26 2>;
212 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 212 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
213 interrupt-map = < 213 interrupt-map = <
214 /* IDSEL 0x0 */ 214 /* IDSEL 0x0 */
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
index a0a15311d0d8..2701753d9937 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/arch/powerpc/include/asm/qe.h
@@ -624,7 +624,7 @@ struct ucc_slow_pram {
624#define UCC_GETH_UCCE_RXF1 0x00000002 624#define UCC_GETH_UCCE_RXF1 0x00000002
625#define UCC_GETH_UCCE_RXF0 0x00000001 625#define UCC_GETH_UCCE_RXF0 0x00000001
626 626
627/* UPSMR, when used as a UART */ 627/* UCC Protocol Specific Mode Register (UPSMR), when used for UART */
628#define UCC_UART_UPSMR_FLC 0x8000 628#define UCC_UART_UPSMR_FLC 0x8000
629#define UCC_UART_UPSMR_SL 0x4000 629#define UCC_UART_UPSMR_SL 0x4000
630#define UCC_UART_UPSMR_CL_MASK 0x3000 630#define UCC_UART_UPSMR_CL_MASK 0x3000
@@ -652,6 +652,23 @@ struct ucc_slow_pram {
652#define UCC_UART_UPSMR_TPM_EVEN 0x0002 652#define UCC_UART_UPSMR_TPM_EVEN 0x0002
653#define UCC_UART_UPSMR_TPM_HIGH 0x0003 653#define UCC_UART_UPSMR_TPM_HIGH 0x0003
654 654
655/* UCC Protocol Specific Mode Register (UPSMR), when used for Ethernet */
656#define UCC_GETH_UPSMR_FTFE 0x80000000
657#define UCC_GETH_UPSMR_PTPE 0x40000000
658#define UCC_GETH_UPSMR_ECM 0x04000000
659#define UCC_GETH_UPSMR_HSE 0x02000000
660#define UCC_GETH_UPSMR_PRO 0x00400000
661#define UCC_GETH_UPSMR_CAP 0x00200000
662#define UCC_GETH_UPSMR_RSH 0x00100000
663#define UCC_GETH_UPSMR_RPM 0x00080000
664#define UCC_GETH_UPSMR_R10M 0x00040000
665#define UCC_GETH_UPSMR_RLPB 0x00020000
666#define UCC_GETH_UPSMR_TBIM 0x00010000
667#define UCC_GETH_UPSMR_RES1 0x00002000
668#define UCC_GETH_UPSMR_RMM 0x00001000
669#define UCC_GETH_UPSMR_CAM 0x00000400
670#define UCC_GETH_UPSMR_BRO 0x00000200
671
655/* UCC Transmit On Demand Register (UTODR) */ 672/* UCC Transmit On Demand Register (UTODR) */
656#define UCC_SLOW_TOD 0x8000 673#define UCC_SLOW_TOD 0x8000
657#define UCC_FAST_TOD 0x8000 674#define UCC_FAST_TOD 0x8000
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 9937fe44555f..19ee491e9e23 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -56,6 +56,10 @@
56#include "head_booke.h" 56#include "head_booke.h"
57#endif 57#endif
58 58
59#if defined(CONFIG_FSL_BOOKE)
60#include "../mm/mmu_decl.h"
61#endif
62
59int main(void) 63int main(void)
60{ 64{
61 DEFINE(THREAD, offsetof(struct task_struct, thread)); 65 DEFINE(THREAD, offsetof(struct task_struct, thread));
@@ -382,6 +386,9 @@ int main(void)
382 DEFINE(PGD_T_LOG2, PGD_T_LOG2); 386 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
383 DEFINE(PTE_T_LOG2, PTE_T_LOG2); 387 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
384#endif 388#endif
389#ifdef CONFIG_FSL_BOOKE
390 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
391#endif
385 392
386#ifdef CONFIG_KVM_EXIT_TIMING 393#ifdef CONFIG_KVM_EXIT_TIMING
387 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu, 394 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 11b549acc034..2f32720a44ae 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -389,10 +389,6 @@ skpinv: addi r6,r6,1 /* Increment */
389#endif 389#endif
390#endif 390#endif
391 391
392 mfspr r3,SPRN_TLB1CFG
393 andi. r3,r3,0xfff
394 lis r4,num_tlbcam_entries@ha
395 stw r3,num_tlbcam_entries@l(r4)
396/* 392/*
397 * Decide what sort of machine this is and initialize the MMU. 393 * Decide what sort of machine this is and initialize the MMU.
398 */ 394 */
@@ -909,7 +905,7 @@ KernelSPE:
909_GLOBAL(loadcam_entry) 905_GLOBAL(loadcam_entry)
910 lis r4,TLBCAM@ha 906 lis r4,TLBCAM@ha
911 addi r4,r4,TLBCAM@l 907 addi r4,r4,TLBCAM@l
912 mulli r5,r3,20 908 mulli r5,r3,TLBCAM_SIZE
913 add r3,r5,r4 909 add r3,r5,r4
914 lwz r4,0(r3) 910 lwz r4,0(r3)
915 mtspr SPRN_MAS0,r4 911 mtspr SPRN_MAS0,r4
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 23cee39534fd..1971e4ee3d6e 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -56,18 +56,11 @@
56 56
57extern void loadcam_entry(unsigned int index); 57extern void loadcam_entry(unsigned int index);
58unsigned int tlbcam_index; 58unsigned int tlbcam_index;
59unsigned int num_tlbcam_entries;
60static unsigned long __cam0, __cam1, __cam2; 59static unsigned long __cam0, __cam1, __cam2;
61 60
62#define NUM_TLBCAMS (16) 61#define NUM_TLBCAMS (16)
63 62
64struct tlbcam { 63struct tlbcam TLBCAM[NUM_TLBCAMS];
65 u32 MAS0;
66 u32 MAS1;
67 u32 MAS2;
68 u32 MAS3;
69 u32 MAS7;
70} TLBCAM[NUM_TLBCAMS];
71 64
72struct tlbcamrange { 65struct tlbcamrange {
73 unsigned long start; 66 unsigned long start;
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index ad123bced404..d1f9c62dc177 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -75,6 +75,15 @@ extern void _tlbia(void);
75#endif /* CONFIG_PPC_MMU_NOHASH */ 75#endif /* CONFIG_PPC_MMU_NOHASH */
76 76
77#ifdef CONFIG_PPC32 77#ifdef CONFIG_PPC32
78
79struct tlbcam {
80 u32 MAS0;
81 u32 MAS1;
82 u32 MAS2;
83 u32 MAS3;
84 u32 MAS7;
85};
86
78extern void mapin_ram(void); 87extern void mapin_ram(void);
79extern int map_page(unsigned long va, phys_addr_t pa, int flags); 88extern int map_page(unsigned long va, phys_addr_t pa, int flags);
80extern void setbat(int index, unsigned long virt, phys_addr_t phys, 89extern void setbat(int index, unsigned long virt, phys_addr_t phys,
@@ -90,8 +99,6 @@ extern unsigned int rtas_data, rtas_size;
90struct hash_pte; 99struct hash_pte;
91extern struct hash_pte *Hash, *Hash_end; 100extern struct hash_pte *Hash, *Hash_end;
92extern unsigned long Hash_size, Hash_mask; 101extern unsigned long Hash_size, Hash_mask;
93
94extern unsigned int num_tlbcam_entries;
95#endif 102#endif
96 103
97extern unsigned long ioremap_bot; 104extern unsigned long ioremap_bot;
diff --git a/arch/powerpc/platforms/fsl_uli1575.c b/arch/powerpc/platforms/fsl_uli1575.c
index 8c619963becc..1db6b9e037fc 100644
--- a/arch/powerpc/platforms/fsl_uli1575.c
+++ b/arch/powerpc/platforms/fsl_uli1575.c
@@ -249,6 +249,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
249DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); 249DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
250DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5249, quirk_final_uli5249); 250DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5249, quirk_final_uli5249);
251DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x1575, quirk_final_uli1575); 251DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x1575, quirk_final_uli1575);
252DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
252 253
253static void __devinit hpcd_quirk_uli1575(struct pci_dev *dev) 254static void __devinit hpcd_quirk_uli1575(struct pci_dev *dev)
254{ 255{
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index f611d0369cc8..9817f63723dd 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -28,63 +28,104 @@
28#include <sysdev/fsl_pci.h> 28#include <sysdev/fsl_pci.h>
29 29
30#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) 30#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
31static int __init setup_one_atmu(struct ccsr_pci __iomem *pci,
32 unsigned int index, const struct resource *res,
33 resource_size_t offset)
34{
35 resource_size_t pci_addr = res->start - offset;
36 resource_size_t phys_addr = res->start;
37 resource_size_t size = res->end - res->start + 1;
38 u32 flags = 0x80044000; /* enable & mem R/W */
39 unsigned int i;
40
41 pr_debug("PCI MEM resource start 0x%016llx, size 0x%016llx.\n",
42 (u64)res->start, (u64)size);
43
44 if (res->flags & IORESOURCE_PREFETCH)
45 flags |= 0x10000000; /* enable relaxed ordering */
46
47 for (i = 0; size > 0; i++) {
48 unsigned int bits = min(__ilog2(size),
49 __ffs(pci_addr | phys_addr));
50
51 if (index + i >= 5)
52 return -1;
53
54 out_be32(&pci->pow[index + i].potar, pci_addr >> 12);
55 out_be32(&pci->pow[index + i].potear, (u64)pci_addr >> 44);
56 out_be32(&pci->pow[index + i].powbar, phys_addr >> 12);
57 out_be32(&pci->pow[index + i].powar, flags | (bits - 1));
58
59 pci_addr += (resource_size_t)1U << bits;
60 phys_addr += (resource_size_t)1U << bits;
61 size -= (resource_size_t)1U << bits;
62 }
63
64 return i;
65}
66
31/* atmu setup for fsl pci/pcie controller */ 67/* atmu setup for fsl pci/pcie controller */
32static void __init setup_pci_atmu(struct pci_controller *hose, 68static void __init setup_pci_atmu(struct pci_controller *hose,
33 struct resource *rsrc) 69 struct resource *rsrc)
34{ 70{
35 struct ccsr_pci __iomem *pci; 71 struct ccsr_pci __iomem *pci;
36 int i; 72 int i, j, n;
37 73
38 pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n", 74 pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n",
39 (u64)rsrc->start, (u64)rsrc->end - (u64)rsrc->start + 1); 75 (u64)rsrc->start, (u64)rsrc->end - (u64)rsrc->start + 1);
40 pci = ioremap(rsrc->start, rsrc->end - rsrc->start + 1); 76 pci = ioremap(rsrc->start, rsrc->end - rsrc->start + 1);
77 if (!pci) {
78 dev_err(hose->parent, "Unable to map ATMU registers\n");
79 return;
80 }
41 81
42 /* Disable all windows (except powar0 since its ignored) */ 82 /* Disable all windows (except powar0 since it's ignored) */
43 for(i = 1; i < 5; i++) 83 for(i = 1; i < 5; i++)
44 out_be32(&pci->pow[i].powar, 0); 84 out_be32(&pci->pow[i].powar, 0);
45 for(i = 0; i < 3; i++) 85 for(i = 0; i < 3; i++)
46 out_be32(&pci->piw[i].piwar, 0); 86 out_be32(&pci->piw[i].piwar, 0);
47 87
48 /* Setup outbound MEM window */ 88 /* Setup outbound MEM window */
49 for(i = 0; i < 3; i++) 89 for(i = 0, j = 1; i < 3; i++) {
50 if (hose->mem_resources[i].flags & IORESOURCE_MEM){ 90 if (!(hose->mem_resources[i].flags & IORESOURCE_MEM))
51 resource_size_t pci_addr_start = 91 continue;
52 hose->mem_resources[i].start - 92
53 hose->pci_mem_offset; 93 n = setup_one_atmu(pci, j, &hose->mem_resources[i],
54 pr_debug("PCI MEM resource start 0x%016llx, size 0x%016llx.\n", 94 hose->pci_mem_offset);
55 (u64)hose->mem_resources[i].start, 95
56 (u64)hose->mem_resources[i].end 96 if (n < 0 || j >= 5) {
57 - (u64)hose->mem_resources[i].start + 1); 97 pr_err("Ran out of outbound PCI ATMUs for resource %d!\n", i);
58 out_be32(&pci->pow[i+1].potar, (pci_addr_start >> 12)); 98 hose->mem_resources[i].flags |= IORESOURCE_DISABLED;
59 out_be32(&pci->pow[i+1].potear, 0); 99 } else
60 out_be32(&pci->pow[i+1].powbar, 100 j += n;
61 (hose->mem_resources[i].start >> 12)); 101 }
62 /* Enable, Mem R/W */
63 out_be32(&pci->pow[i+1].powar, 0x80044000
64 | (__ilog2(hose->mem_resources[i].end
65 - hose->mem_resources[i].start + 1) - 1));
66 }
67 102
68 /* Setup outbound IO window */ 103 /* Setup outbound IO window */
69 if (hose->io_resource.flags & IORESOURCE_IO){ 104 if (hose->io_resource.flags & IORESOURCE_IO) {
70 pr_debug("PCI IO resource start 0x%016llx, size 0x%016llx, " 105 if (j >= 5) {
71 "phy base 0x%016llx.\n", 106 pr_err("Ran out of outbound PCI ATMUs for IO resource\n");
72 (u64)hose->io_resource.start, 107 } else {
73 (u64)hose->io_resource.end - (u64)hose->io_resource.start + 1, 108 pr_debug("PCI IO resource start 0x%016llx, size 0x%016llx, "
74 (u64)hose->io_base_phys); 109 "phy base 0x%016llx.\n",
75 out_be32(&pci->pow[i+1].potar, (hose->io_resource.start >> 12)); 110 (u64)hose->io_resource.start,
76 out_be32(&pci->pow[i+1].potear, 0); 111 (u64)hose->io_resource.end - (u64)hose->io_resource.start + 1,
77 out_be32(&pci->pow[i+1].powbar, (hose->io_base_phys >> 12)); 112 (u64)hose->io_base_phys);
78 /* Enable, IO R/W */ 113 out_be32(&pci->pow[j].potar, (hose->io_resource.start >> 12));
79 out_be32(&pci->pow[i+1].powar, 0x80088000 114 out_be32(&pci->pow[j].potear, 0);
80 | (__ilog2(hose->io_resource.end 115 out_be32(&pci->pow[j].powbar, (hose->io_base_phys >> 12));
81 - hose->io_resource.start + 1) - 1)); 116 /* Enable, IO R/W */
117 out_be32(&pci->pow[j].powar, 0x80088000
118 | (__ilog2(hose->io_resource.end
119 - hose->io_resource.start + 1) - 1));
120 }
82 } 121 }
83 122
84 /* Setup 2G inbound Memory Window @ 1 */ 123 /* Setup 2G inbound Memory Window @ 1 */
85 out_be32(&pci->piw[2].pitar, 0x00000000); 124 out_be32(&pci->piw[2].pitar, 0x00000000);
86 out_be32(&pci->piw[2].piwbar,0x00000000); 125 out_be32(&pci->piw[2].piwbar,0x00000000);
87 out_be32(&pci->piw[2].piwar, PIWAR_2G); 126 out_be32(&pci->piw[2].piwar, PIWAR_2G);
127
128 iounmap(pci);
88} 129}
89 130
90static void __init setup_pci_cmd(struct pci_controller *hose) 131static void __init setup_pci_cmd(struct pci_controller *hose)