diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2006-07-10 07:44:42 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-07-10 16:24:20 -0400 |
commit | 6e99e4582861578fb00d84d085f8f283569f51dd (patch) | |
tree | 8890d540932f02fa47e49248adcc918b42c335b8 /arch/powerpc | |
parent | 50099328e4fe7c9f8981f408071a1ff82d59ddf8 (diff) |
[PATCH] powerpc: fix trigger handling in the new irq code
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/kernel/ibmebus.c | 2 | ||||
-rw-r--r-- | arch/powerpc/kernel/irq.c | 47 | ||||
-rw-r--r-- | arch/powerpc/kernel/pci_32.c | 36 | ||||
-rw-r--r-- | arch/powerpc/kernel/pci_64.c | 36 | ||||
-rw-r--r-- | arch/powerpc/platforms/cell/interrupt.c | 4 | ||||
-rw-r--r-- | arch/powerpc/platforms/cell/spider-pic.c | 70 | ||||
-rw-r--r-- | arch/powerpc/platforms/cell/spu_base.c | 6 | ||||
-rw-r--r-- | arch/powerpc/platforms/iseries/irq.c | 4 | ||||
-rw-r--r-- | arch/powerpc/platforms/powermac/pci.c | 13 | ||||
-rw-r--r-- | arch/powerpc/platforms/powermac/pic.c | 8 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/ras.c | 3 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/xics.c | 34 | ||||
-rw-r--r-- | arch/powerpc/sysdev/i8259.c | 4 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpic.c | 180 |
14 files changed, 243 insertions, 204 deletions
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c index 97ddc02a3d42..68e5ab0443d2 100644 --- a/arch/powerpc/kernel/ibmebus.c +++ b/arch/powerpc/kernel/ibmebus.c | |||
@@ -323,7 +323,7 @@ int ibmebus_request_irq(struct ibmebus_dev *dev, | |||
323 | unsigned long irq_flags, const char * devname, | 323 | unsigned long irq_flags, const char * devname, |
324 | void *dev_id) | 324 | void *dev_id) |
325 | { | 325 | { |
326 | unsigned int irq = irq_create_mapping(NULL, ist, 0); | 326 | unsigned int irq = irq_create_mapping(NULL, ist); |
327 | 327 | ||
328 | if (irq == NO_IRQ) | 328 | if (irq == NO_IRQ) |
329 | return -EINVAL; | 329 | return -EINVAL; |
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 8cf987809c66..01bdae35cb55 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -391,15 +391,14 @@ struct irq_host *irq_alloc_host(unsigned int revmap_type, | |||
391 | irq_map[i].host = host; | 391 | irq_map[i].host = host; |
392 | smp_wmb(); | 392 | smp_wmb(); |
393 | 393 | ||
394 | /* Clear some flags */ | 394 | /* Clear norequest flags */ |
395 | get_irq_desc(i)->status | 395 | get_irq_desc(i)->status &= ~IRQ_NOREQUEST; |
396 | &= ~(IRQ_NOREQUEST | IRQ_LEVEL); | ||
397 | 396 | ||
398 | /* Legacy flags are left to default at this point, | 397 | /* Legacy flags are left to default at this point, |
399 | * one can then use irq_create_mapping() to | 398 | * one can then use irq_create_mapping() to |
400 | * explicitely change them | 399 | * explicitely change them |
401 | */ | 400 | */ |
402 | ops->map(host, i, i, 0); | 401 | ops->map(host, i, i); |
403 | } | 402 | } |
404 | break; | 403 | break; |
405 | case IRQ_HOST_MAP_LINEAR: | 404 | case IRQ_HOST_MAP_LINEAR: |
@@ -457,13 +456,11 @@ void irq_set_virq_count(unsigned int count) | |||
457 | } | 456 | } |
458 | 457 | ||
459 | unsigned int irq_create_mapping(struct irq_host *host, | 458 | unsigned int irq_create_mapping(struct irq_host *host, |
460 | irq_hw_number_t hwirq, | 459 | irq_hw_number_t hwirq) |
461 | unsigned int flags) | ||
462 | { | 460 | { |
463 | unsigned int virq, hint; | 461 | unsigned int virq, hint; |
464 | 462 | ||
465 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx, 0x%x)\n", | 463 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
466 | host, hwirq, flags); | ||
467 | 464 | ||
468 | /* Look for default host if nececssary */ | 465 | /* Look for default host if nececssary */ |
469 | if (host == NULL) | 466 | if (host == NULL) |
@@ -482,7 +479,6 @@ unsigned int irq_create_mapping(struct irq_host *host, | |||
482 | virq = irq_find_mapping(host, hwirq); | 479 | virq = irq_find_mapping(host, hwirq); |
483 | if (virq != IRQ_NONE) { | 480 | if (virq != IRQ_NONE) { |
484 | pr_debug("irq: -> existing mapping on virq %d\n", virq); | 481 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
485 | host->ops->map(host, virq, hwirq, flags); | ||
486 | return virq; | 482 | return virq; |
487 | } | 483 | } |
488 | 484 | ||
@@ -504,18 +500,18 @@ unsigned int irq_create_mapping(struct irq_host *host, | |||
504 | } | 500 | } |
505 | pr_debug("irq: -> obtained virq %d\n", virq); | 501 | pr_debug("irq: -> obtained virq %d\n", virq); |
506 | 502 | ||
507 | /* Clear some flags */ | 503 | /* Clear IRQ_NOREQUEST flag */ |
508 | get_irq_desc(virq)->status &= ~(IRQ_NOREQUEST | IRQ_LEVEL); | 504 | get_irq_desc(virq)->status &= ~IRQ_NOREQUEST; |
509 | 505 | ||
510 | /* map it */ | 506 | /* map it */ |
511 | if (host->ops->map(host, virq, hwirq, flags)) { | 507 | smp_wmb(); |
508 | irq_map[virq].hwirq = hwirq; | ||
509 | smp_mb(); | ||
510 | if (host->ops->map(host, virq, hwirq)) { | ||
512 | pr_debug("irq: -> mapping failed, freeing\n"); | 511 | pr_debug("irq: -> mapping failed, freeing\n"); |
513 | irq_free_virt(virq, 1); | 512 | irq_free_virt(virq, 1); |
514 | return NO_IRQ; | 513 | return NO_IRQ; |
515 | } | 514 | } |
516 | smp_wmb(); | ||
517 | irq_map[virq].hwirq = hwirq; | ||
518 | smp_mb(); | ||
519 | return virq; | 515 | return virq; |
520 | } | 516 | } |
521 | EXPORT_SYMBOL_GPL(irq_create_mapping); | 517 | EXPORT_SYMBOL_GPL(irq_create_mapping); |
@@ -525,25 +521,38 @@ extern unsigned int irq_create_of_mapping(struct device_node *controller, | |||
525 | { | 521 | { |
526 | struct irq_host *host; | 522 | struct irq_host *host; |
527 | irq_hw_number_t hwirq; | 523 | irq_hw_number_t hwirq; |
528 | unsigned int flags = IRQ_TYPE_NONE; | 524 | unsigned int type = IRQ_TYPE_NONE; |
525 | unsigned int virq; | ||
529 | 526 | ||
530 | if (controller == NULL) | 527 | if (controller == NULL) |
531 | host = irq_default_host; | 528 | host = irq_default_host; |
532 | else | 529 | else |
533 | host = irq_find_host(controller); | 530 | host = irq_find_host(controller); |
534 | if (host == NULL) | 531 | if (host == NULL) { |
532 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | ||
533 | controller->full_name); | ||
535 | return NO_IRQ; | 534 | return NO_IRQ; |
535 | } | ||
536 | 536 | ||
537 | /* If host has no translation, then we assume interrupt line */ | 537 | /* If host has no translation, then we assume interrupt line */ |
538 | if (host->ops->xlate == NULL) | 538 | if (host->ops->xlate == NULL) |
539 | hwirq = intspec[0]; | 539 | hwirq = intspec[0]; |
540 | else { | 540 | else { |
541 | if (host->ops->xlate(host, controller, intspec, intsize, | 541 | if (host->ops->xlate(host, controller, intspec, intsize, |
542 | &hwirq, &flags)) | 542 | &hwirq, &type)) |
543 | return NO_IRQ; | 543 | return NO_IRQ; |
544 | } | 544 | } |
545 | 545 | ||
546 | return irq_create_mapping(host, hwirq, flags); | 546 | /* Create mapping */ |
547 | virq = irq_create_mapping(host, hwirq); | ||
548 | if (virq == NO_IRQ) | ||
549 | return virq; | ||
550 | |||
551 | /* Set type if specified and different than the current one */ | ||
552 | if (type != IRQ_TYPE_NONE && | ||
553 | type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK)) | ||
554 | set_irq_type(virq, type); | ||
555 | return virq; | ||
547 | } | 556 | } |
548 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); | 557 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
549 | 558 | ||
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c index 898dae8ab6d9..09b1e1bbb29b 100644 --- a/arch/powerpc/kernel/pci_32.c +++ b/arch/powerpc/kernel/pci_32.c | |||
@@ -11,6 +11,7 @@ | |||
11 | #include <linux/sched.h> | 11 | #include <linux/sched.h> |
12 | #include <linux/errno.h> | 12 | #include <linux/errno.h> |
13 | #include <linux/bootmem.h> | 13 | #include <linux/bootmem.h> |
14 | #include <linux/irq.h> | ||
14 | 15 | ||
15 | #include <asm/processor.h> | 16 | #include <asm/processor.h> |
16 | #include <asm/io.h> | 17 | #include <asm/io.h> |
@@ -18,7 +19,6 @@ | |||
18 | #include <asm/sections.h> | 19 | #include <asm/sections.h> |
19 | #include <asm/pci-bridge.h> | 20 | #include <asm/pci-bridge.h> |
20 | #include <asm/byteorder.h> | 21 | #include <asm/byteorder.h> |
21 | #include <asm/irq.h> | ||
22 | #include <asm/uaccess.h> | 22 | #include <asm/uaccess.h> |
23 | #include <asm/machdep.h> | 23 | #include <asm/machdep.h> |
24 | 24 | ||
@@ -1420,15 +1420,37 @@ int pci_read_irq_line(struct pci_dev *pci_dev) | |||
1420 | 1420 | ||
1421 | DBG("Try to map irq for %s...\n", pci_name(pci_dev)); | 1421 | DBG("Try to map irq for %s...\n", pci_name(pci_dev)); |
1422 | 1422 | ||
1423 | /* Try to get a mapping from the device-tree */ | ||
1423 | if (of_irq_map_pci(pci_dev, &oirq)) { | 1424 | if (of_irq_map_pci(pci_dev, &oirq)) { |
1424 | DBG(" -> failed !\n"); | 1425 | u8 line, pin; |
1425 | return -1; | 1426 | |
1426 | } | 1427 | /* If that fails, lets fallback to what is in the config |
1428 | * space and map that through the default controller. We | ||
1429 | * also set the type to level low since that's what PCI | ||
1430 | * interrupts are. If your platform does differently, then | ||
1431 | * either provide a proper interrupt tree or don't use this | ||
1432 | * function. | ||
1433 | */ | ||
1434 | if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin)) | ||
1435 | return -1; | ||
1436 | if (pin == 0) | ||
1437 | return -1; | ||
1438 | if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) || | ||
1439 | line == 0xff) { | ||
1440 | return -1; | ||
1441 | } | ||
1442 | DBG(" -> no map ! Using irq line %d from PCI config\n", line); | ||
1427 | 1443 | ||
1428 | DBG(" -> got one, spec %d cells (0x%08x...) on %s\n", | 1444 | virq = irq_create_mapping(NULL, line); |
1429 | oirq.size, oirq.specifier[0], oirq.controller->full_name); | 1445 | if (virq != NO_IRQ) |
1446 | set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); | ||
1447 | } else { | ||
1448 | DBG(" -> got one, spec %d cells (0x%08x...) on %s\n", | ||
1449 | oirq.size, oirq.specifier[0], oirq.controller->full_name); | ||
1430 | 1450 | ||
1431 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, oirq.size); | 1451 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, |
1452 | oirq.size); | ||
1453 | } | ||
1432 | if(virq == NO_IRQ) { | 1454 | if(virq == NO_IRQ) { |
1433 | DBG(" -> failed to map !\n"); | 1455 | DBG(" -> failed to map !\n"); |
1434 | return -1; | 1456 | return -1; |
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index efc0b5559ee0..2fce7738e9e2 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c | |||
@@ -21,13 +21,13 @@ | |||
21 | #include <linux/mm.h> | 21 | #include <linux/mm.h> |
22 | #include <linux/list.h> | 22 | #include <linux/list.h> |
23 | #include <linux/syscalls.h> | 23 | #include <linux/syscalls.h> |
24 | #include <linux/irq.h> | ||
24 | 25 | ||
25 | #include <asm/processor.h> | 26 | #include <asm/processor.h> |
26 | #include <asm/io.h> | 27 | #include <asm/io.h> |
27 | #include <asm/prom.h> | 28 | #include <asm/prom.h> |
28 | #include <asm/pci-bridge.h> | 29 | #include <asm/pci-bridge.h> |
29 | #include <asm/byteorder.h> | 30 | #include <asm/byteorder.h> |
30 | #include <asm/irq.h> | ||
31 | #include <asm/machdep.h> | 31 | #include <asm/machdep.h> |
32 | #include <asm/ppc-pci.h> | 32 | #include <asm/ppc-pci.h> |
33 | 33 | ||
@@ -1289,15 +1289,37 @@ int pci_read_irq_line(struct pci_dev *pci_dev) | |||
1289 | 1289 | ||
1290 | DBG("Try to map irq for %s...\n", pci_name(pci_dev)); | 1290 | DBG("Try to map irq for %s...\n", pci_name(pci_dev)); |
1291 | 1291 | ||
1292 | /* Try to get a mapping from the device-tree */ | ||
1292 | if (of_irq_map_pci(pci_dev, &oirq)) { | 1293 | if (of_irq_map_pci(pci_dev, &oirq)) { |
1293 | DBG(" -> failed !\n"); | 1294 | u8 line, pin; |
1294 | return -1; | 1295 | |
1295 | } | 1296 | /* If that fails, lets fallback to what is in the config |
1297 | * space and map that through the default controller. We | ||
1298 | * also set the type to level low since that's what PCI | ||
1299 | * interrupts are. If your platform does differently, then | ||
1300 | * either provide a proper interrupt tree or don't use this | ||
1301 | * function. | ||
1302 | */ | ||
1303 | if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin)) | ||
1304 | return -1; | ||
1305 | if (pin == 0) | ||
1306 | return -1; | ||
1307 | if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) || | ||
1308 | line == 0xff) { | ||
1309 | return -1; | ||
1310 | } | ||
1311 | DBG(" -> no map ! Using irq line %d from PCI config\n", line); | ||
1296 | 1312 | ||
1297 | DBG(" -> got one, spec %d cells (0x%08x...) on %s\n", | 1313 | virq = irq_create_mapping(NULL, line); |
1298 | oirq.size, oirq.specifier[0], oirq.controller->full_name); | 1314 | if (virq != NO_IRQ) |
1315 | set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); | ||
1316 | } else { | ||
1317 | DBG(" -> got one, spec %d cells (0x%08x...) on %s\n", | ||
1318 | oirq.size, oirq.specifier[0], oirq.controller->full_name); | ||
1299 | 1319 | ||
1300 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, oirq.size); | 1320 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, |
1321 | oirq.size); | ||
1322 | } | ||
1301 | if(virq == NO_IRQ) { | 1323 | if(virq == NO_IRQ) { |
1302 | DBG(" -> failed to map !\n"); | 1324 | DBG(" -> failed to map !\n"); |
1303 | return -1; | 1325 | return -1; |
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c index 9d5da7896892..d7bbb61109f9 100644 --- a/arch/powerpc/platforms/cell/interrupt.c +++ b/arch/powerpc/platforms/cell/interrupt.c | |||
@@ -159,7 +159,7 @@ static void iic_request_ipi(int ipi, const char *name) | |||
159 | if (iic_hosts[node] == NULL) | 159 | if (iic_hosts[node] == NULL) |
160 | continue; | 160 | continue; |
161 | virq = irq_create_mapping(iic_hosts[node], | 161 | virq = irq_create_mapping(iic_hosts[node], |
162 | iic_ipi_to_irq(ipi), 0); | 162 | iic_ipi_to_irq(ipi)); |
163 | if (virq == NO_IRQ) { | 163 | if (virq == NO_IRQ) { |
164 | printk(KERN_ERR | 164 | printk(KERN_ERR |
165 | "iic: failed to map IPI %s on node %d\n", | 165 | "iic: failed to map IPI %s on node %d\n", |
@@ -197,7 +197,7 @@ static int iic_host_match(struct irq_host *h, struct device_node *node) | |||
197 | } | 197 | } |
198 | 198 | ||
199 | static int iic_host_map(struct irq_host *h, unsigned int virq, | 199 | static int iic_host_map(struct irq_host *h, unsigned int virq, |
200 | irq_hw_number_t hw, unsigned int flags) | 200 | irq_hw_number_t hw) |
201 | { | 201 | { |
202 | if (hw < IIC_IRQ_IPI0) | 202 | if (hw < IIC_IRQ_IPI0) |
203 | set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq); | 203 | set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq); |
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index ae7ef88f1a37..15217bb0402f 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c | |||
@@ -85,9 +85,6 @@ static void spider_unmask_irq(unsigned int virq) | |||
85 | struct spider_pic *pic = spider_virq_to_pic(virq); | 85 | struct spider_pic *pic = spider_virq_to_pic(virq); |
86 | void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq); | 86 | void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq); |
87 | 87 | ||
88 | /* We use no locking as we should be covered by the descriptor lock | ||
89 | * for access to invidual source configuration registers | ||
90 | */ | ||
91 | out_be32(cfg, in_be32(cfg) | 0x30000000u); | 88 | out_be32(cfg, in_be32(cfg) | 0x30000000u); |
92 | } | 89 | } |
93 | 90 | ||
@@ -96,9 +93,6 @@ static void spider_mask_irq(unsigned int virq) | |||
96 | struct spider_pic *pic = spider_virq_to_pic(virq); | 93 | struct spider_pic *pic = spider_virq_to_pic(virq); |
97 | void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq); | 94 | void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq); |
98 | 95 | ||
99 | /* We use no locking as we should be covered by the descriptor lock | ||
100 | * for access to invidual source configuration registers | ||
101 | */ | ||
102 | out_be32(cfg, in_be32(cfg) & ~0x30000000u); | 96 | out_be32(cfg, in_be32(cfg) & ~0x30000000u); |
103 | } | 97 | } |
104 | 98 | ||
@@ -120,26 +114,14 @@ static void spider_ack_irq(unsigned int virq) | |||
120 | out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf)); | 114 | out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf)); |
121 | } | 115 | } |
122 | 116 | ||
123 | static struct irq_chip spider_pic = { | 117 | static int spider_set_irq_type(unsigned int virq, unsigned int type) |
124 | .typename = " SPIDER ", | ||
125 | .unmask = spider_unmask_irq, | ||
126 | .mask = spider_mask_irq, | ||
127 | .ack = spider_ack_irq, | ||
128 | }; | ||
129 | |||
130 | static int spider_host_match(struct irq_host *h, struct device_node *node) | ||
131 | { | ||
132 | struct spider_pic *pic = h->host_data; | ||
133 | return node == pic->of_node; | ||
134 | } | ||
135 | |||
136 | static int spider_host_map(struct irq_host *h, unsigned int virq, | ||
137 | irq_hw_number_t hw, unsigned int flags) | ||
138 | { | 118 | { |
139 | unsigned int sense = flags & IRQ_TYPE_SENSE_MASK; | 119 | unsigned int sense = type & IRQ_TYPE_SENSE_MASK; |
140 | struct spider_pic *pic = h->host_data; | 120 | struct spider_pic *pic = spider_virq_to_pic(virq); |
121 | unsigned int hw = irq_map[virq].hwirq; | ||
141 | void __iomem *cfg = spider_get_irq_config(pic, hw); | 122 | void __iomem *cfg = spider_get_irq_config(pic, hw); |
142 | int level = 0; | 123 | struct irq_desc *desc = get_irq_desc(virq); |
124 | u32 old_mask; | ||
143 | u32 ic; | 125 | u32 ic; |
144 | 126 | ||
145 | /* Note that only level high is supported for most interrupts */ | 127 | /* Note that only level high is supported for most interrupts */ |
@@ -157,29 +139,57 @@ static int spider_host_map(struct irq_host *h, unsigned int virq, | |||
157 | break; | 139 | break; |
158 | case IRQ_TYPE_LEVEL_LOW: | 140 | case IRQ_TYPE_LEVEL_LOW: |
159 | ic = 0x0; | 141 | ic = 0x0; |
160 | level = 1; | ||
161 | break; | 142 | break; |
162 | case IRQ_TYPE_LEVEL_HIGH: | 143 | case IRQ_TYPE_LEVEL_HIGH: |
163 | case IRQ_TYPE_NONE: | 144 | case IRQ_TYPE_NONE: |
164 | ic = 0x1; | 145 | ic = 0x1; |
165 | level = 1; | ||
166 | break; | 146 | break; |
167 | default: | 147 | default: |
168 | return -EINVAL; | 148 | return -EINVAL; |
169 | } | 149 | } |
170 | 150 | ||
151 | /* Update irq_desc */ | ||
152 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); | ||
153 | desc->status |= type & IRQ_TYPE_SENSE_MASK; | ||
154 | if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) | ||
155 | desc->status |= IRQ_LEVEL; | ||
156 | |||
171 | /* Configure the source. One gross hack that was there before and | 157 | /* Configure the source. One gross hack that was there before and |
172 | * that I've kept around is the priority to the BE which I set to | 158 | * that I've kept around is the priority to the BE which I set to |
173 | * be the same as the interrupt source number. I don't know wether | 159 | * be the same as the interrupt source number. I don't know wether |
174 | * that's supposed to make any kind of sense however, we'll have to | 160 | * that's supposed to make any kind of sense however, we'll have to |
175 | * decide that, but for now, I'm not changing the behaviour. | 161 | * decide that, but for now, I'm not changing the behaviour. |
176 | */ | 162 | */ |
177 | out_be32(cfg, (ic << 24) | (0x7 << 16) | (pic->node_id << 4) | 0xe); | 163 | old_mask = in_be32(cfg) & 0x30000000u; |
164 | out_be32(cfg, old_mask | (ic << 24) | (0x7 << 16) | | ||
165 | (pic->node_id << 4) | 0xe); | ||
178 | out_be32(cfg + 4, (0x2 << 16) | (hw & 0xff)); | 166 | out_be32(cfg + 4, (0x2 << 16) | (hw & 0xff)); |
179 | 167 | ||
180 | if (level) | 168 | return 0; |
181 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 169 | } |
170 | |||
171 | static struct irq_chip spider_pic = { | ||
172 | .typename = " SPIDER ", | ||
173 | .unmask = spider_unmask_irq, | ||
174 | .mask = spider_mask_irq, | ||
175 | .ack = spider_ack_irq, | ||
176 | .set_type = spider_set_irq_type, | ||
177 | }; | ||
178 | |||
179 | static int spider_host_match(struct irq_host *h, struct device_node *node) | ||
180 | { | ||
181 | struct spider_pic *pic = h->host_data; | ||
182 | return node == pic->of_node; | ||
183 | } | ||
184 | |||
185 | static int spider_host_map(struct irq_host *h, unsigned int virq, | ||
186 | irq_hw_number_t hw) | ||
187 | { | ||
182 | set_irq_chip_and_handler(virq, &spider_pic, handle_level_irq); | 188 | set_irq_chip_and_handler(virq, &spider_pic, handle_level_irq); |
189 | |||
190 | /* Set default irq type */ | ||
191 | set_irq_type(virq, IRQ_TYPE_NONE); | ||
192 | |||
183 | return 0; | 193 | return 0; |
184 | } | 194 | } |
185 | 195 | ||
@@ -283,7 +293,7 @@ static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic) | |||
283 | if (iic_host == NULL) | 293 | if (iic_host == NULL) |
284 | return NO_IRQ; | 294 | return NO_IRQ; |
285 | /* Manufacture an IIC interrupt number of class 2 */ | 295 | /* Manufacture an IIC interrupt number of class 2 */ |
286 | virq = irq_create_mapping(iic_host, 0x20 | unit, 0); | 296 | virq = irq_create_mapping(iic_host, 0x20 | unit); |
287 | if (virq == NO_IRQ) | 297 | if (virq == NO_IRQ) |
288 | printk(KERN_ERR "spider_pic: failed to map cascade !"); | 298 | printk(KERN_ERR "spider_pic: failed to map cascade !"); |
289 | return virq; | 299 | return virq; |
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index 5d2313a6c82b..d06042deb021 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c | |||
@@ -583,9 +583,9 @@ static int __init spu_map_interrupts(struct spu *spu, struct device_node *np) | |||
583 | spu->isrc = isrc = tmp[0]; | 583 | spu->isrc = isrc = tmp[0]; |
584 | 584 | ||
585 | /* Now map interrupts of all 3 classes */ | 585 | /* Now map interrupts of all 3 classes */ |
586 | spu->irqs[0] = irq_create_mapping(host, 0x00 | isrc, 0); | 586 | spu->irqs[0] = irq_create_mapping(host, 0x00 | isrc); |
587 | spu->irqs[1] = irq_create_mapping(host, 0x10 | isrc, 0); | 587 | spu->irqs[1] = irq_create_mapping(host, 0x10 | isrc); |
588 | spu->irqs[2] = irq_create_mapping(host, 0x20 | isrc, 0); | 588 | spu->irqs[2] = irq_create_mapping(host, 0x20 | isrc); |
589 | 589 | ||
590 | /* Right now, we only fail if class 2 failed */ | 590 | /* Right now, we only fail if class 2 failed */ |
591 | return spu->irqs[2] == NO_IRQ ? -EINVAL : 0; | 591 | return spu->irqs[2] == NO_IRQ ? -EINVAL : 0; |
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c index 2275e64f3152..e32446877e78 100644 --- a/arch/powerpc/platforms/iseries/irq.c +++ b/arch/powerpc/platforms/iseries/irq.c | |||
@@ -300,7 +300,7 @@ int __init iSeries_allocate_IRQ(HvBusNumber bus, | |||
300 | realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3) | 300 | realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3) |
301 | + function; | 301 | + function; |
302 | 302 | ||
303 | return irq_create_mapping(NULL, realirq, IRQ_TYPE_NONE); | 303 | return irq_create_mapping(NULL, realirq); |
304 | } | 304 | } |
305 | 305 | ||
306 | #endif /* CONFIG_PCI */ | 306 | #endif /* CONFIG_PCI */ |
@@ -341,7 +341,7 @@ unsigned int iSeries_get_irq(struct pt_regs *regs) | |||
341 | } | 341 | } |
342 | 342 | ||
343 | static int iseries_irq_host_map(struct irq_host *h, unsigned int virq, | 343 | static int iseries_irq_host_map(struct irq_host *h, unsigned int virq, |
344 | irq_hw_number_t hw, unsigned int flags) | 344 | irq_hw_number_t hw) |
345 | { | 345 | { |
346 | set_irq_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq); | 346 | set_irq_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq); |
347 | 347 | ||
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index 556b349797e8..205d04471161 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/string.h> | 16 | #include <linux/string.h> |
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/bootmem.h> | 18 | #include <linux/bootmem.h> |
19 | #include <linux/irq.h> | ||
19 | 20 | ||
20 | #include <asm/sections.h> | 21 | #include <asm/sections.h> |
21 | #include <asm/io.h> | 22 | #include <asm/io.h> |
@@ -24,10 +25,7 @@ | |||
24 | #include <asm/machdep.h> | 25 | #include <asm/machdep.h> |
25 | #include <asm/pmac_feature.h> | 26 | #include <asm/pmac_feature.h> |
26 | #include <asm/grackle.h> | 27 | #include <asm/grackle.h> |
27 | #ifdef CONFIG_PPC64 | ||
28 | //#include <asm/iommu.h> | ||
29 | #include <asm/ppc-pci.h> | 28 | #include <asm/ppc-pci.h> |
30 | #endif | ||
31 | 29 | ||
32 | #undef DEBUG | 30 | #undef DEBUG |
33 | 31 | ||
@@ -46,7 +44,6 @@ static int has_uninorth; | |||
46 | static struct pci_controller *u3_agp; | 44 | static struct pci_controller *u3_agp; |
47 | static struct pci_controller *u4_pcie; | 45 | static struct pci_controller *u4_pcie; |
48 | static struct pci_controller *u3_ht; | 46 | static struct pci_controller *u3_ht; |
49 | #define has_second_ohare 0 | ||
50 | #else | 47 | #else |
51 | static int has_second_ohare; | 48 | static int has_second_ohare; |
52 | #endif /* CONFIG_PPC64 */ | 49 | #endif /* CONFIG_PPC64 */ |
@@ -993,6 +990,7 @@ void __init pmac_pcibios_fixup(void) | |||
993 | /* Read interrupt from the device-tree */ | 990 | /* Read interrupt from the device-tree */ |
994 | pci_read_irq_line(dev); | 991 | pci_read_irq_line(dev); |
995 | 992 | ||
993 | #ifdef CONFIG_PPC32 | ||
996 | /* Fixup interrupt for the modem/ethernet combo controller. | 994 | /* Fixup interrupt for the modem/ethernet combo controller. |
997 | * on machines with a second ohare chip. | 995 | * on machines with a second ohare chip. |
998 | * The number in the device tree (27) is bogus (correct for | 996 | * The number in the device tree (27) is bogus (correct for |
@@ -1002,8 +1000,11 @@ void __init pmac_pcibios_fixup(void) | |||
1002 | */ | 1000 | */ |
1003 | if (has_second_ohare && | 1001 | if (has_second_ohare && |
1004 | dev->vendor == PCI_VENDOR_ID_DEC && | 1002 | dev->vendor == PCI_VENDOR_ID_DEC && |
1005 | dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS) | 1003 | dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS) { |
1006 | dev->irq = irq_create_mapping(NULL, 60, 0); | 1004 | dev->irq = irq_create_mapping(NULL, 60); |
1005 | set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW); | ||
1006 | } | ||
1007 | #endif /* CONFIG_PPC32 */ | ||
1007 | } | 1008 | } |
1008 | } | 1009 | } |
1009 | 1010 | ||
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 3d328bc1f7e0..060789e31c67 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
@@ -291,7 +291,7 @@ static int pmac_pic_host_match(struct irq_host *h, struct device_node *node) | |||
291 | } | 291 | } |
292 | 292 | ||
293 | static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, | 293 | static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, |
294 | irq_hw_number_t hw, unsigned int flags) | 294 | irq_hw_number_t hw) |
295 | { | 295 | { |
296 | struct irq_desc *desc = get_irq_desc(virq); | 296 | struct irq_desc *desc = get_irq_desc(virq); |
297 | int level; | 297 | int level; |
@@ -318,6 +318,7 @@ static int pmac_pic_host_xlate(struct irq_host *h, struct device_node *ct, | |||
318 | unsigned int *out_flags) | 318 | unsigned int *out_flags) |
319 | 319 | ||
320 | { | 320 | { |
321 | *out_flags = IRQ_TYPE_NONE; | ||
321 | *out_hwirq = *intspec; | 322 | *out_hwirq = *intspec; |
322 | return 0; | 323 | return 0; |
323 | } | 324 | } |
@@ -434,7 +435,7 @@ static void __init pmac_pic_probe_oldstyle(void) | |||
434 | 435 | ||
435 | printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); | 436 | printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); |
436 | #ifdef CONFIG_XMON | 437 | #ifdef CONFIG_XMON |
437 | setup_irq(irq_create_mapping(NULL, 20, 0), &xmon_action); | 438 | setup_irq(irq_create_mapping(NULL, 20), &xmon_action); |
438 | #endif | 439 | #endif |
439 | } | 440 | } |
440 | #endif /* CONFIG_PPC32 */ | 441 | #endif /* CONFIG_PPC32 */ |
@@ -579,9 +580,10 @@ void __init pmac_pic_init(void) | |||
579 | flags |= OF_IMAP_OLDWORLD_MAC; | 580 | flags |= OF_IMAP_OLDWORLD_MAC; |
580 | if (get_property(of_chosen, "linux,bootx", NULL) != NULL) | 581 | if (get_property(of_chosen, "linux,bootx", NULL) != NULL) |
581 | flags |= OF_IMAP_NO_PHANDLE; | 582 | flags |= OF_IMAP_NO_PHANDLE; |
582 | of_irq_map_init(flags); | ||
583 | #endif /* CONFIG_PPC_32 */ | 583 | #endif /* CONFIG_PPC_32 */ |
584 | 584 | ||
585 | of_irq_map_init(flags); | ||
586 | |||
585 | /* We first try to detect Apple's new Core99 chipset, since mac-io | 587 | /* We first try to detect Apple's new Core99 chipset, since mac-io |
586 | * is quite different on those machines and contains an IBM MPIC2. | 588 | * is quite different on those machines and contains an IBM MPIC2. |
587 | */ | 589 | */ |
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index 9df783088b61..c7ffde1a614e 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c | |||
@@ -93,8 +93,7 @@ static void request_ras_irqs(struct device_node *np, | |||
93 | for (i = 0; i < opicplen; i++) { | 93 | for (i = 0; i < opicplen; i++) { |
94 | if (count > 15) | 94 | if (count > 15) |
95 | break; | 95 | break; |
96 | virqs[count] = irq_create_mapping(NULL, *(opicprop++), | 96 | virqs[count] = irq_create_mapping(NULL, *(opicprop++)); |
97 | IRQ_TYPE_NONE); | ||
98 | if (virqs[count] == NO_IRQ) | 97 | if (virqs[count] == NO_IRQ) |
99 | printk(KERN_ERR "Unable to allocate interrupt " | 98 | printk(KERN_ERR "Unable to allocate interrupt " |
100 | "number for %s\n", np->full_name); | 99 | "number for %s\n", np->full_name); |
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index 716972aa9777..2d0da6f9e244 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c | |||
@@ -502,16 +502,9 @@ static int xics_host_match(struct irq_host *h, struct device_node *node) | |||
502 | } | 502 | } |
503 | 503 | ||
504 | static int xics_host_map_direct(struct irq_host *h, unsigned int virq, | 504 | static int xics_host_map_direct(struct irq_host *h, unsigned int virq, |
505 | irq_hw_number_t hw, unsigned int flags) | 505 | irq_hw_number_t hw) |
506 | { | 506 | { |
507 | unsigned int sense = flags & IRQ_TYPE_SENSE_MASK; | 507 | pr_debug("xics: map_direct virq %d, hwirq 0x%lx\n", virq, hw); |
508 | |||
509 | pr_debug("xics: map_direct virq %d, hwirq 0x%lx, flags: 0x%x\n", | ||
510 | virq, hw, flags); | ||
511 | |||
512 | if (sense && sense != IRQ_TYPE_LEVEL_LOW) | ||
513 | printk(KERN_WARNING "xics: using unsupported sense 0x%x" | ||
514 | " for irq %d (h: 0x%lx)\n", flags, virq, hw); | ||
515 | 508 | ||
516 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 509 | get_irq_desc(virq)->status |= IRQ_LEVEL; |
517 | set_irq_chip_and_handler(virq, &xics_pic_direct, handle_fasteoi_irq); | 510 | set_irq_chip_and_handler(virq, &xics_pic_direct, handle_fasteoi_irq); |
@@ -519,16 +512,9 @@ static int xics_host_map_direct(struct irq_host *h, unsigned int virq, | |||
519 | } | 512 | } |
520 | 513 | ||
521 | static int xics_host_map_lpar(struct irq_host *h, unsigned int virq, | 514 | static int xics_host_map_lpar(struct irq_host *h, unsigned int virq, |
522 | irq_hw_number_t hw, unsigned int flags) | 515 | irq_hw_number_t hw) |
523 | { | 516 | { |
524 | unsigned int sense = flags & IRQ_TYPE_SENSE_MASK; | 517 | pr_debug("xics: map_direct virq %d, hwirq 0x%lx\n", virq, hw); |
525 | |||
526 | pr_debug("xics: map_lpar virq %d, hwirq 0x%lx, flags: 0x%x\n", | ||
527 | virq, hw, flags); | ||
528 | |||
529 | if (sense && sense != IRQ_TYPE_LEVEL_LOW) | ||
530 | printk(KERN_WARNING "xics: using unsupported sense 0x%x" | ||
531 | " for irq %d (h: 0x%lx)\n", flags, virq, hw); | ||
532 | 518 | ||
533 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 519 | get_irq_desc(virq)->status |= IRQ_LEVEL; |
534 | set_irq_chip_and_handler(virq, &xics_pic_lpar, handle_fasteoi_irq); | 520 | set_irq_chip_and_handler(virq, &xics_pic_lpar, handle_fasteoi_irq); |
@@ -757,7 +743,7 @@ void xics_request_IPIs(void) | |||
757 | { | 743 | { |
758 | unsigned int ipi; | 744 | unsigned int ipi; |
759 | 745 | ||
760 | ipi = irq_create_mapping(xics_host, XICS_IPI, 0); | 746 | ipi = irq_create_mapping(xics_host, XICS_IPI); |
761 | BUG_ON(ipi == NO_IRQ); | 747 | BUG_ON(ipi == NO_IRQ); |
762 | 748 | ||
763 | /* | 749 | /* |
@@ -783,6 +769,14 @@ void xics_teardown_cpu(int secondary) | |||
783 | xics_set_cpu_priority(cpu, 0); | 769 | xics_set_cpu_priority(cpu, 0); |
784 | 770 | ||
785 | /* | 771 | /* |
772 | * Clear IPI | ||
773 | */ | ||
774 | if (firmware_has_feature(FW_FEATURE_LPAR)) | ||
775 | lpar_qirr_info(cpu, 0xff); | ||
776 | else | ||
777 | direct_qirr_info(cpu, 0xff); | ||
778 | |||
779 | /* | ||
786 | * we need to EOI the IPI if we got here from kexec down IPI | 780 | * we need to EOI the IPI if we got here from kexec down IPI |
787 | * | 781 | * |
788 | * probably need to check all the other interrupts too | 782 | * probably need to check all the other interrupts too |
@@ -795,7 +789,7 @@ void xics_teardown_cpu(int secondary) | |||
795 | return; | 789 | return; |
796 | desc = get_irq_desc(ipi); | 790 | desc = get_irq_desc(ipi); |
797 | if (desc->chip && desc->chip->eoi) | 791 | if (desc->chip && desc->chip->eoi) |
798 | desc->chip->eoi(XICS_IPI); | 792 | desc->chip->eoi(ipi); |
799 | 793 | ||
800 | /* | 794 | /* |
801 | * Some machines need to have at least one cpu in the GIQ, | 795 | * Some machines need to have at least one cpu in the GIQ, |
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index 72c73a6105cd..9855820b9548 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c | |||
@@ -169,7 +169,7 @@ static int i8259_host_match(struct irq_host *h, struct device_node *node) | |||
169 | } | 169 | } |
170 | 170 | ||
171 | static int i8259_host_map(struct irq_host *h, unsigned int virq, | 171 | static int i8259_host_map(struct irq_host *h, unsigned int virq, |
172 | irq_hw_number_t hw, unsigned int flags) | 172 | irq_hw_number_t hw) |
173 | { | 173 | { |
174 | pr_debug("i8259_host_map(%d, 0x%lx)\n", virq, hw); | 174 | pr_debug("i8259_host_map(%d, 0x%lx)\n", virq, hw); |
175 | 175 | ||
@@ -177,7 +177,7 @@ static int i8259_host_map(struct irq_host *h, unsigned int virq, | |||
177 | if (hw == 2) | 177 | if (hw == 2) |
178 | get_irq_desc(virq)->status |= IRQ_NOREQUEST; | 178 | get_irq_desc(virq)->status |= IRQ_NOREQUEST; |
179 | 179 | ||
180 | /* We use the level stuff only for now, we might want to | 180 | /* We use the level handler only for now, we might want to |
181 | * be more cautious here but that works for now | 181 | * be more cautious here but that works for now |
182 | */ | 182 | */ |
183 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 183 | get_irq_desc(virq)->status |= IRQ_LEVEL; |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 9cecebaa0360..c39c4a0b1cda 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -337,6 +337,17 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic) | |||
337 | } | 337 | } |
338 | } | 338 | } |
339 | 339 | ||
340 | #else /* CONFIG_MPIC_BROKEN_U3 */ | ||
341 | |||
342 | static inline int mpic_is_ht_interrupt(struct mpic *mpic, unsigned int source) | ||
343 | { | ||
344 | return 0; | ||
345 | } | ||
346 | |||
347 | static void __init mpic_scan_ht_pics(struct mpic *mpic) | ||
348 | { | ||
349 | } | ||
350 | |||
340 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | 351 | #endif /* CONFIG_MPIC_BROKEN_U3 */ |
341 | 352 | ||
342 | 353 | ||
@@ -405,11 +416,9 @@ static void mpic_unmask_irq(unsigned int irq) | |||
405 | unsigned int loops = 100000; | 416 | unsigned int loops = 100000; |
406 | struct mpic *mpic = mpic_from_irq(irq); | 417 | struct mpic *mpic = mpic_from_irq(irq); |
407 | unsigned int src = mpic_irq_to_hw(irq); | 418 | unsigned int src = mpic_irq_to_hw(irq); |
408 | unsigned long flags; | ||
409 | 419 | ||
410 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); | 420 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); |
411 | 421 | ||
412 | spin_lock_irqsave(&mpic_lock, flags); | ||
413 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, | 422 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, |
414 | mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & | 423 | mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & |
415 | ~MPIC_VECPRI_MASK); | 424 | ~MPIC_VECPRI_MASK); |
@@ -420,7 +429,6 @@ static void mpic_unmask_irq(unsigned int irq) | |||
420 | break; | 429 | break; |
421 | } | 430 | } |
422 | } while(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK); | 431 | } while(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK); |
423 | spin_unlock_irqrestore(&mpic_lock, flags); | ||
424 | } | 432 | } |
425 | 433 | ||
426 | static void mpic_mask_irq(unsigned int irq) | 434 | static void mpic_mask_irq(unsigned int irq) |
@@ -428,11 +436,9 @@ static void mpic_mask_irq(unsigned int irq) | |||
428 | unsigned int loops = 100000; | 436 | unsigned int loops = 100000; |
429 | struct mpic *mpic = mpic_from_irq(irq); | 437 | struct mpic *mpic = mpic_from_irq(irq); |
430 | unsigned int src = mpic_irq_to_hw(irq); | 438 | unsigned int src = mpic_irq_to_hw(irq); |
431 | unsigned long flags; | ||
432 | 439 | ||
433 | DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); | 440 | DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); |
434 | 441 | ||
435 | spin_lock_irqsave(&mpic_lock, flags); | ||
436 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, | 442 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, |
437 | mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) | | 443 | mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) | |
438 | MPIC_VECPRI_MASK); | 444 | MPIC_VECPRI_MASK); |
@@ -444,7 +450,6 @@ static void mpic_mask_irq(unsigned int irq) | |||
444 | break; | 450 | break; |
445 | } | 451 | } |
446 | } while(!(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK)); | 452 | } while(!(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK)); |
447 | spin_unlock_irqrestore(&mpic_lock, flags); | ||
448 | } | 453 | } |
449 | 454 | ||
450 | static void mpic_end_irq(unsigned int irq) | 455 | static void mpic_end_irq(unsigned int irq) |
@@ -512,8 +517,7 @@ static void mpic_end_ht_irq(unsigned int irq) | |||
512 | mpic_ht_end_irq(mpic, src); | 517 | mpic_ht_end_irq(mpic, src); |
513 | mpic_eoi(mpic); | 518 | mpic_eoi(mpic); |
514 | } | 519 | } |
515 | 520 | #endif /* !CONFIG_MPIC_BROKEN_U3 */ | |
516 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | ||
517 | 521 | ||
518 | #ifdef CONFIG_SMP | 522 | #ifdef CONFIG_SMP |
519 | 523 | ||
@@ -560,47 +564,74 @@ static void mpic_set_affinity(unsigned int irq, cpumask_t cpumask) | |||
560 | mpic_physmask(cpus_addr(tmp)[0])); | 564 | mpic_physmask(cpus_addr(tmp)[0])); |
561 | } | 565 | } |
562 | 566 | ||
563 | static unsigned int mpic_flags_to_vecpri(unsigned int flags, int *level) | 567 | static unsigned int mpic_type_to_vecpri(unsigned int type) |
564 | { | 568 | { |
565 | unsigned int vecpri; | ||
566 | |||
567 | /* Now convert sense value */ | 569 | /* Now convert sense value */ |
568 | switch(flags & IRQ_TYPE_SENSE_MASK) { | 570 | switch(type & IRQ_TYPE_SENSE_MASK) { |
569 | case IRQ_TYPE_EDGE_RISING: | 571 | case IRQ_TYPE_EDGE_RISING: |
570 | vecpri = MPIC_VECPRI_SENSE_EDGE | | 572 | return MPIC_VECPRI_SENSE_EDGE | MPIC_VECPRI_POLARITY_POSITIVE; |
571 | MPIC_VECPRI_POLARITY_POSITIVE; | ||
572 | *level = 0; | ||
573 | break; | ||
574 | case IRQ_TYPE_EDGE_FALLING: | 573 | case IRQ_TYPE_EDGE_FALLING: |
575 | vecpri = MPIC_VECPRI_SENSE_EDGE | | 574 | case IRQ_TYPE_EDGE_BOTH: |
576 | MPIC_VECPRI_POLARITY_NEGATIVE; | 575 | return MPIC_VECPRI_SENSE_EDGE | MPIC_VECPRI_POLARITY_NEGATIVE; |
577 | *level = 0; | ||
578 | break; | ||
579 | case IRQ_TYPE_LEVEL_HIGH: | 576 | case IRQ_TYPE_LEVEL_HIGH: |
580 | vecpri = MPIC_VECPRI_SENSE_LEVEL | | 577 | return MPIC_VECPRI_SENSE_LEVEL | MPIC_VECPRI_POLARITY_POSITIVE; |
581 | MPIC_VECPRI_POLARITY_POSITIVE; | ||
582 | *level = 1; | ||
583 | break; | ||
584 | case IRQ_TYPE_LEVEL_LOW: | 578 | case IRQ_TYPE_LEVEL_LOW: |
585 | default: | 579 | default: |
586 | vecpri = MPIC_VECPRI_SENSE_LEVEL | | 580 | return MPIC_VECPRI_SENSE_LEVEL | MPIC_VECPRI_POLARITY_NEGATIVE; |
587 | MPIC_VECPRI_POLARITY_NEGATIVE; | ||
588 | *level = 1; | ||
589 | } | 581 | } |
590 | return vecpri; | 582 | } |
583 | |||
584 | static int mpic_set_irq_type(unsigned int virq, unsigned int flow_type) | ||
585 | { | ||
586 | struct mpic *mpic = mpic_from_irq(virq); | ||
587 | unsigned int src = mpic_irq_to_hw(virq); | ||
588 | struct irq_desc *desc = get_irq_desc(virq); | ||
589 | unsigned int vecpri, vold, vnew; | ||
590 | |||
591 | pr_debug("mpic: set_irq_type(mpic:@%p,virq:%d,src:%d,type:0x%x)\n", | ||
592 | mpic, virq, src, flow_type); | ||
593 | |||
594 | if (src >= mpic->irq_count) | ||
595 | return -EINVAL; | ||
596 | |||
597 | if (flow_type == IRQ_TYPE_NONE) | ||
598 | if (mpic->senses && src < mpic->senses_count) | ||
599 | flow_type = mpic->senses[src]; | ||
600 | if (flow_type == IRQ_TYPE_NONE) | ||
601 | flow_type = IRQ_TYPE_LEVEL_LOW; | ||
602 | |||
603 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); | ||
604 | desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; | ||
605 | if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) | ||
606 | desc->status |= IRQ_LEVEL; | ||
607 | |||
608 | if (mpic_is_ht_interrupt(mpic, src)) | ||
609 | vecpri = MPIC_VECPRI_POLARITY_POSITIVE | | ||
610 | MPIC_VECPRI_SENSE_EDGE; | ||
611 | else | ||
612 | vecpri = mpic_type_to_vecpri(flow_type); | ||
613 | |||
614 | vold = mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI); | ||
615 | vnew = vold & ~(MPIC_VECPRI_POLARITY_MASK | MPIC_VECPRI_SENSE_MASK); | ||
616 | vnew |= vecpri; | ||
617 | if (vold != vnew) | ||
618 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, vnew); | ||
619 | |||
620 | return 0; | ||
591 | } | 621 | } |
592 | 622 | ||
593 | static struct irq_chip mpic_irq_chip = { | 623 | static struct irq_chip mpic_irq_chip = { |
594 | .mask = mpic_mask_irq, | 624 | .mask = mpic_mask_irq, |
595 | .unmask = mpic_unmask_irq, | 625 | .unmask = mpic_unmask_irq, |
596 | .eoi = mpic_end_irq, | 626 | .eoi = mpic_end_irq, |
627 | .set_type = mpic_set_irq_type, | ||
597 | }; | 628 | }; |
598 | 629 | ||
599 | #ifdef CONFIG_SMP | 630 | #ifdef CONFIG_SMP |
600 | static struct irq_chip mpic_ipi_chip = { | 631 | static struct irq_chip mpic_ipi_chip = { |
601 | .mask = mpic_mask_ipi, | 632 | .mask = mpic_mask_ipi, |
602 | .unmask = mpic_unmask_ipi, | 633 | .unmask = mpic_unmask_ipi, |
603 | .eoi = mpic_end_ipi, | 634 | .eoi = mpic_end_ipi, |
604 | }; | 635 | }; |
605 | #endif /* CONFIG_SMP */ | 636 | #endif /* CONFIG_SMP */ |
606 | 637 | ||
@@ -611,6 +642,7 @@ static struct irq_chip mpic_irq_ht_chip = { | |||
611 | .mask = mpic_mask_irq, | 642 | .mask = mpic_mask_irq, |
612 | .unmask = mpic_unmask_ht_irq, | 643 | .unmask = mpic_unmask_ht_irq, |
613 | .eoi = mpic_end_ht_irq, | 644 | .eoi = mpic_end_ht_irq, |
645 | .set_type = mpic_set_irq_type, | ||
614 | }; | 646 | }; |
615 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | 647 | #endif /* CONFIG_MPIC_BROKEN_U3 */ |
616 | 648 | ||
@@ -624,18 +656,12 @@ static int mpic_host_match(struct irq_host *h, struct device_node *node) | |||
624 | } | 656 | } |
625 | 657 | ||
626 | static int mpic_host_map(struct irq_host *h, unsigned int virq, | 658 | static int mpic_host_map(struct irq_host *h, unsigned int virq, |
627 | irq_hw_number_t hw, unsigned int flags) | 659 | irq_hw_number_t hw) |
628 | { | 660 | { |
629 | struct irq_desc *desc = get_irq_desc(virq); | ||
630 | struct irq_chip *chip; | ||
631 | struct mpic *mpic = h->host_data; | 661 | struct mpic *mpic = h->host_data; |
632 | u32 v, vecpri = MPIC_VECPRI_SENSE_LEVEL | | 662 | struct irq_chip *chip; |
633 | MPIC_VECPRI_POLARITY_NEGATIVE; | ||
634 | int level; | ||
635 | unsigned long iflags; | ||
636 | 663 | ||
637 | pr_debug("mpic: map virq %d, hwirq 0x%lx, flags: 0x%x\n", | 664 | pr_debug("mpic: map virq %d, hwirq 0x%lx\n", virq, hw); |
638 | virq, hw, flags); | ||
639 | 665 | ||
640 | if (hw == MPIC_VEC_SPURRIOUS) | 666 | if (hw == MPIC_VEC_SPURRIOUS) |
641 | return -EINVAL; | 667 | return -EINVAL; |
@@ -654,44 +680,23 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq, | |||
654 | if (hw >= mpic->irq_count) | 680 | if (hw >= mpic->irq_count) |
655 | return -EINVAL; | 681 | return -EINVAL; |
656 | 682 | ||
657 | /* If no sense provided, check default sense array */ | 683 | /* Default chip */ |
658 | if (((flags & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_NONE) && | ||
659 | mpic->senses && hw < mpic->senses_count) | ||
660 | flags |= mpic->senses[hw]; | ||
661 | |||
662 | vecpri = mpic_flags_to_vecpri(flags, &level); | ||
663 | if (level) | ||
664 | desc->status |= IRQ_LEVEL; | ||
665 | chip = &mpic->hc_irq; | 684 | chip = &mpic->hc_irq; |
666 | 685 | ||
667 | #ifdef CONFIG_MPIC_BROKEN_U3 | 686 | #ifdef CONFIG_MPIC_BROKEN_U3 |
668 | /* Check for HT interrupts, override vecpri */ | 687 | /* Check for HT interrupts, override vecpri */ |
669 | if (mpic_is_ht_interrupt(mpic, hw)) { | 688 | if (mpic_is_ht_interrupt(mpic, hw)) |
670 | vecpri &= ~(MPIC_VECPRI_SENSE_MASK | | ||
671 | MPIC_VECPRI_POLARITY_MASK); | ||
672 | vecpri |= MPIC_VECPRI_POLARITY_POSITIVE; | ||
673 | chip = &mpic->hc_ht_irq; | 689 | chip = &mpic->hc_ht_irq; |
674 | } | 690 | #endif /* CONFIG_MPIC_BROKEN_U3 */ |
675 | #endif | ||
676 | 691 | ||
677 | /* Reconfigure irq. We must preserve the mask bit as we can be called | 692 | pr_debug("mpic: mapping to irq chip @%p\n", chip); |
678 | * while the interrupt is still active (This may change in the future | ||
679 | * but for now, it is the case). | ||
680 | */ | ||
681 | spin_lock_irqsave(&mpic_lock, iflags); | ||
682 | v = mpic_irq_read(hw, MPIC_IRQ_VECTOR_PRI); | ||
683 | vecpri = (v & | ||
684 | ~(MPIC_VECPRI_POLARITY_MASK | MPIC_VECPRI_SENSE_MASK)) | | ||
685 | vecpri; | ||
686 | if (vecpri != v) | ||
687 | mpic_irq_write(hw, MPIC_IRQ_VECTOR_PRI, vecpri); | ||
688 | spin_unlock_irqrestore(&mpic_lock, iflags); | ||
689 | |||
690 | pr_debug("mpic: mapping as IRQ, vecpri = 0x%08x (was 0x%08x)\n", | ||
691 | vecpri, v); | ||
692 | 693 | ||
693 | set_irq_chip_data(virq, mpic); | 694 | set_irq_chip_data(virq, mpic); |
694 | set_irq_chip_and_handler(virq, chip, handle_fasteoi_irq); | 695 | set_irq_chip_and_handler(virq, chip, handle_fasteoi_irq); |
696 | |||
697 | /* Set default irq type */ | ||
698 | set_irq_type(virq, IRQ_TYPE_NONE); | ||
699 | |||
695 | return 0; | 700 | return 0; |
696 | } | 701 | } |
697 | 702 | ||
@@ -906,41 +911,16 @@ void __init mpic_init(struct mpic *mpic) | |||
906 | if (mpic->irq_count == 0) | 911 | if (mpic->irq_count == 0) |
907 | mpic->irq_count = mpic->num_sources; | 912 | mpic->irq_count = mpic->num_sources; |
908 | 913 | ||
909 | #ifdef CONFIG_MPIC_BROKEN_U3 | ||
910 | /* Do the HT PIC fixups on U3 broken mpic */ | 914 | /* Do the HT PIC fixups on U3 broken mpic */ |
911 | DBG("MPIC flags: %x\n", mpic->flags); | 915 | DBG("MPIC flags: %x\n", mpic->flags); |
912 | if ((mpic->flags & MPIC_BROKEN_U3) && (mpic->flags & MPIC_PRIMARY)) | 916 | if ((mpic->flags & MPIC_BROKEN_U3) && (mpic->flags & MPIC_PRIMARY)) |
913 | mpic_scan_ht_pics(mpic); | 917 | mpic_scan_ht_pics(mpic); |
914 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | ||
915 | 918 | ||
916 | for (i = 0; i < mpic->num_sources; i++) { | 919 | for (i = 0; i < mpic->num_sources; i++) { |
917 | /* start with vector = source number, and masked */ | 920 | /* start with vector = source number, and masked */ |
918 | u32 vecpri = MPIC_VECPRI_MASK | i | (8 << MPIC_VECPRI_PRIORITY_SHIFT); | 921 | u32 vecpri = MPIC_VECPRI_MASK | i | |
919 | int level = 1; | 922 | (8 << MPIC_VECPRI_PRIORITY_SHIFT); |
920 | 923 | ||
921 | /* do senses munging */ | ||
922 | if (mpic->senses && i < mpic->senses_count) | ||
923 | vecpri |= mpic_flags_to_vecpri(mpic->senses[i], | ||
924 | &level); | ||
925 | else | ||
926 | vecpri |= MPIC_VECPRI_SENSE_LEVEL; | ||
927 | |||
928 | /* deal with broken U3 */ | ||
929 | if (mpic->flags & MPIC_BROKEN_U3) { | ||
930 | #ifdef CONFIG_MPIC_BROKEN_U3 | ||
931 | if (mpic_is_ht_interrupt(mpic, i)) { | ||
932 | vecpri &= ~(MPIC_VECPRI_SENSE_MASK | | ||
933 | MPIC_VECPRI_POLARITY_MASK); | ||
934 | vecpri |= MPIC_VECPRI_POLARITY_POSITIVE; | ||
935 | } | ||
936 | #else | ||
937 | printk(KERN_ERR "mpic: BROKEN_U3 set, but CONFIG doesn't match\n"); | ||
938 | #endif | ||
939 | } | ||
940 | |||
941 | DBG("setup source %d, vecpri: %08x, level: %d\n", i, vecpri, | ||
942 | (level != 0)); | ||
943 | |||
944 | /* init hw */ | 924 | /* init hw */ |
945 | mpic_irq_write(i, MPIC_IRQ_VECTOR_PRI, vecpri); | 925 | mpic_irq_write(i, MPIC_IRQ_VECTOR_PRI, vecpri); |
946 | mpic_irq_write(i, MPIC_IRQ_DESTINATION, | 926 | mpic_irq_write(i, MPIC_IRQ_DESTINATION, |
@@ -1154,7 +1134,7 @@ void mpic_request_ipis(void) | |||
1154 | 1134 | ||
1155 | for (i = 0; i < 4; i++) { | 1135 | for (i = 0; i < 4; i++) { |
1156 | unsigned int vipi = irq_create_mapping(mpic->irqhost, | 1136 | unsigned int vipi = irq_create_mapping(mpic->irqhost, |
1157 | MPIC_VEC_IPI_0 + i, 0); | 1137 | MPIC_VEC_IPI_0 + i); |
1158 | if (vipi == NO_IRQ) { | 1138 | if (vipi == NO_IRQ) { |
1159 | printk(KERN_ERR "Failed to map IPI %d\n", i); | 1139 | printk(KERN_ERR "Failed to map IPI %d\n", i); |
1160 | break; | 1140 | break; |