Merge remote branch 'kumar/next' into merge

9 files changed, 58 insertions, 16 deletions

diff --git a/arch/powerpc/boot/dts/mpc8308rdb.dts b/arch/powerpc/boot/dts/mpc8308rdb.dts
index d3db02f98ddd..a0bd1881081e 100644
--- a/arch/powerpc/boot/dts/mpc8308rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8308rdb.dts
@@ -109,7 +109,7 @@
                 #address-cells = <1>;
                 #size-cells = <1>;
                 device_type = "soc";
-                compatible = "fsl,mpc8315-immr", "simple-bus";
+                compatible = "fsl,mpc8308-immr", "simple-bus";
                 ranges = <0 0xe0000000 0x00100000>;
                 reg = <0xe0000000 0x00000200>;
                 bus-frequency = <0>;
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index 2bbecbb4cbf9..69422eb24d97 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -291,13 +291,13 @@
                         ranges = <0x0 0xc100 0x200>;
                         cell-index = <1>;
                         dma00: dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
+                                compatible = "fsl,ssi-dma-channel";
                                 reg = <0x0 0x80>;
                                 cell-index = <0>;
                                 interrupts = <76 2>;
                         };
                         dma01: dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
+                                compatible = "fsl,ssi-dma-channel";
                                 reg = <0x80 0x80>;
                                 cell-index = <1>;
                                 interrupts = <77 2>;
diff --git a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h
index 4e10f508570a..0edb6842b13d 100644
--- a/arch/powerpc/include/asm/immap_qe.h
+++ b/arch/powerpc/include/asm/immap_qe.h
@@ -467,13 +467,22 @@ struct qe_immap {
 extern struct qe_immap __iomem *qe_immr;
 extern phys_addr_t get_qe_base(void);
 
-static inline unsigned long immrbar_virt_to_phys(void *address)
+/*
+ * Returns the offset within the QE address space of the given pointer.
+ *
+ * Note that the QE does not support 36-bit physical addresses, so if
+ * get_qe_base() returns a number above 4GB, the caller will probably fail.
+ */
+static inline phys_addr_t immrbar_virt_to_phys(void *address)
 {
-        if ( ((u32)address >= (u32)qe_immr) &&
-                        ((u32)address < ((u32)qe_immr + QE_IMMAP_SIZE)) )
-                return (unsigned long)(address - (u32)qe_immr +
-                                (u32)get_qe_base());
-        return (unsigned long)virt_to_phys(address);
+        void *q = (void *)qe_immr;
+
+        /* Is it a MURAM address? */
+        if ((address >= q) && (address < (q + QE_IMMAP_SIZE)))
+                return get_qe_base() + (address - q);
+
+        /* It's an address returned by kmalloc */
+        return virt_to_phys(address);
 }
 
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index ff0005eec7dd..125fc1ad665d 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -283,6 +283,7 @@
 #define HID0_NOPTI      (1<<0)          /* No-op dcbt and dcbst instr. */
 
 #define SPRN_HID1       0x3F1           /* Hardware Implementation Register 1 */
+#ifdef CONFIG_6xx
 #define HID1_EMCP       (1<<31)         /* 7450 Machine Check Pin Enable */
 #define HID1_DFS        (1<<22)         /* 7447A Dynamic Frequency Scaling */
 #define HID1_PC0        (1<<16)         /* 7450 PLL_CFG[0] */
@@ -292,6 +293,7 @@
 #define HID1_SYNCBE     (1<<11)         /* 7450 ABE for sync, eieio */
 #define HID1_ABE        (1<<10)         /* 7450 Address Broadcast Enable */
 #define HID1_PS         (1<<16)         /* 750FX PLL selection */
+#endif
 #define SPRN_HID2       0x3F8           /* Hardware Implementation Register 2 */
 #define SPRN_HID2_GEKKO 0x398           /* Gekko HID2 Register */
 #define SPRN_IABR       0x3F2   /* Instruction Address Breakpoint Register */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 667a498eaee1..e68c69bf741a 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -246,6 +246,20 @@
                                         store or cache line push */
 #endif
 
+/* Bit definitions for the HID1 */
+#ifdef CONFIG_E500
+/* e500v1/v2 */
+#define HID1_PLL_CFG_MASK 0xfc000000    /* PLL_CFG input pins */
+#define HID1_RFXE       0x00020000      /* Read fault exception enable */
+#define HID1_R1DPE      0x00008000      /* R1 data bus parity enable */
+#define HID1_R2DPE      0x00004000      /* R2 data bus parity enable */
+#define HID1_ASTME      0x00002000      /* Address bus streaming mode enable */
+#define HID1_ABE        0x00001000      /* Address broadcast enable */
+#define HID1_MPXTT      0x00000400      /* MPX re-map transfer type */
+#define HID1_ATS        0x00000080      /* Atomic status */
+#define HID1_MID_MASK   0x0000000f      /* MID input pins */
+#endif
+
 /* Bit definitions for the DBSR. */
 /*
  * DBSR bits which have conflicting definitions on true Book E versus IBM 40x.
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 894e64fa481e..5c518ad3445c 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -64,6 +64,12 @@ _GLOBAL(__setup_cpu_e500v2)
         bl      __e500_icache_setup
         bl      __e500_dcache_setup
         bl      __setup_e500_ivors
+#ifdef CONFIG_RAPIDIO
+        /* Ensure that RFXE is set */
+        mfspr   r3,SPRN_HID1
+        oris    r3,r3,HID1_RFXE@h
+        mtspr   SPRN_HID1,r3
+#endif
         mtlr    r4
         blr
 _GLOBAL(__setup_cpu_e500mc)
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index 0fea8811d45b..82a434510d83 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -35,6 +35,8 @@
 
 /* system i/o configuration register high */
 #define MPC83XX_SICRH_OFFS         0x118
+#define MPC8308_SICRH_USB_MASK     0x000c0000
+#define MPC8308_SICRH_USB_ULPI     0x00040000
 #define MPC834X_SICRH_USB_UTMI     0x00020000
 #define MPC831X_SICRH_USB_MASK     0x000000e0
 #define MPC831X_SICRH_USB_ULPI     0x000000a0
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index 3ba4bb7d41bb..2c64164722d0 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -127,7 +127,8 @@ int mpc831x_usb_cfg(void)
 
         /* Configure clock */
         immr_node = of_get_parent(np);
-        if (immr_node && of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))
+        if (immr_node && (of_device_is_compatible(immr_node, "fsl,mpc8315-immr") ||
+                        of_device_is_compatible(immr_node, "fsl,mpc8308-immr")))
                 clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
                                 MPC8315_SCCR_USB_MASK,
                                 MPC8315_SCCR_USB_DRCM_01);
@@ -138,7 +139,11 @@ int mpc831x_usb_cfg(void)
 
         /* Configure pin mux for ULPI.  There is no pin mux for UTMI */
         if (prop && !strcmp(prop, "ulpi")) {
-                if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) {
+                if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) {
+                        clrsetbits_be32(immap + MPC83XX_SICRH_OFFS,
+                                        MPC8308_SICRH_USB_MASK,
+                                        MPC8308_SICRH_USB_ULPI);
+                } else if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) {
                         clrsetbits_be32(immap + MPC83XX_SICRL_OFFS,
                                         MPC8315_SICRL_USB_MASK,
                                         MPC8315_SICRL_USB_ULPI);
@@ -173,6 +178,9 @@ int mpc831x_usb_cfg(void)
                      !strcmp(prop, "utmi"))) {
                 u32 refsel;
 
+                if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr"))
+                        goto out;
+
                 if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))
                         refsel = CONTROL_REFSEL_24MHZ;
                 else
@@ -186,9 +194,11 @@ int mpc831x_usb_cfg(void)
                 temp = CONTROL_PHY_CLK_SEL_ULPI;
 #ifdef CONFIG_USB_OTG
                 /* Set OTG_PORT */
-                dr_mode = of_get_property(np, "dr_mode", NULL);
-                if (dr_mode && !strcmp(dr_mode, "otg"))
-                        temp |= CONTROL_OTG_PORT;
+                if (!of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) {
+                        dr_mode = of_get_property(np, "dr_mode", NULL);
+                        if (dr_mode && !strcmp(dr_mode, "otg"))
+                                temp |= CONTROL_OTG_PORT;
+                }
 #endif /* CONFIG_USB_OTG */
                 out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp);
         } else {
@@ -196,6 +206,7 @@ int mpc831x_usb_cfg(void)
                 ret = -EINVAL;
         }
 
+out:
         iounmap(usb_regs);
         of_node_put(np);
         return ret;
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 9f99bef2adec..8c6cab013278 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -1555,8 +1555,6 @@ int fsl_rio_setup(struct platform_device *dev)
         saved_mcheck_exception = ppc_md.machine_check_exception;
         ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
 #endif
-        /* Ensure that RFXE is set */
-        mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
 
         return 0;
 err: