diff options
author | Scott Wood <scottwood@freescale.com> | 2008-04-10 16:45:02 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-04-17 02:01:40 -0400 |
commit | 3dd82a1ea72438a545634b3ef90c53313d2caffa (patch) | |
tree | 3c45e2973499935be638784a64698ef0a3a12196 /arch/powerpc | |
parent | 632395e19c9268bb15a5022b8e0c6b645a1937d7 (diff) |
[POWERPC] CPM: Always use new binding.
The kconfig entry can go away once arch/ppc and references to the config in
drivers are removed.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/platforms/82xx/Kconfig | 3 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/Kconfig | 8 | ||||
-rw-r--r-- | arch/powerpc/platforms/8xx/Kconfig | 4 | ||||
-rw-r--r-- | arch/powerpc/platforms/Kconfig | 8 | ||||
-rw-r--r-- | arch/powerpc/sysdev/cpm1.c | 112 | ||||
-rw-r--r-- | arch/powerpc/sysdev/cpm2.c | 97 | ||||
-rw-r--r-- | arch/powerpc/sysdev/cpm_common.c | 3 | ||||
-rw-r--r-- | arch/powerpc/sysdev/fsl_soc.c | 541 |
8 files changed, 1 insertions, 775 deletions
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig index 4fad6c7bf9f1..917ac8891555 100644 --- a/arch/powerpc/platforms/82xx/Kconfig +++ b/arch/powerpc/platforms/82xx/Kconfig | |||
@@ -11,7 +11,6 @@ config MPC8272_ADS | |||
11 | select 8260 | 11 | select 8260 |
12 | select FSL_SOC | 12 | select FSL_SOC |
13 | select PQ2_ADS_PCI_PIC if PCI | 13 | select PQ2_ADS_PCI_PIC if PCI |
14 | select PPC_CPM_NEW_BINDING | ||
15 | help | 14 | help |
16 | This option enables support for the MPC8272 ADS board | 15 | This option enables support for the MPC8272 ADS board |
17 | 16 | ||
@@ -22,7 +21,6 @@ config PQ2FADS | |||
22 | select 8260 | 21 | select 8260 |
23 | select FSL_SOC | 22 | select FSL_SOC |
24 | select PQ2_ADS_PCI_PIC if PCI | 23 | select PQ2_ADS_PCI_PIC if PCI |
25 | select PPC_CPM_NEW_BINDING | ||
26 | help | 24 | help |
27 | This option enables support for the PQ2FADS board | 25 | This option enables support for the PQ2FADS board |
28 | 26 | ||
@@ -31,7 +29,6 @@ config EP8248E | |||
31 | select 8272 | 29 | select 8272 |
32 | select 8260 | 30 | select 8260 |
33 | select FSL_SOC | 31 | select FSL_SOC |
34 | select PPC_CPM_NEW_BINDING | ||
35 | select MDIO_BITBANG | 32 | select MDIO_BITBANG |
36 | help | 33 | help |
37 | This enables support for the Embedded Planet EP8248E board. | 34 | This enables support for the Embedded Planet EP8248E board. |
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 28bc6e58a970..7ff29d53dc2d 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -19,7 +19,6 @@ config MPC8540_ADS | |||
19 | config MPC8560_ADS | 19 | config MPC8560_ADS |
20 | bool "Freescale MPC8560 ADS" | 20 | bool "Freescale MPC8560 ADS" |
21 | select DEFAULT_UIMAGE | 21 | select DEFAULT_UIMAGE |
22 | select PPC_CPM_NEW_BINDING | ||
23 | select CPM2 | 22 | select CPM2 |
24 | help | 23 | help |
25 | This option enables support for the MPC 8560 ADS board | 24 | This option enables support for the MPC 8560 ADS board |
@@ -48,7 +47,6 @@ config MPC85xx_DS | |||
48 | 47 | ||
49 | config KSI8560 | 48 | config KSI8560 |
50 | bool "Emerson KSI8560" | 49 | bool "Emerson KSI8560" |
51 | select PPC_CPM_NEW_BINDING | ||
52 | select DEFAULT_UIMAGE | 50 | select DEFAULT_UIMAGE |
53 | help | 51 | help |
54 | This option enables support for the Emerson KSI8560 board | 52 | This option enables support for the Emerson KSI8560 board |
@@ -60,14 +58,12 @@ config STX_GP3 | |||
60 | board. | 58 | board. |
61 | select CPM2 | 59 | select CPM2 |
62 | select DEFAULT_UIMAGE | 60 | select DEFAULT_UIMAGE |
63 | select PPC_CPM_NEW_BINDING | ||
64 | 61 | ||
65 | config TQM8540 | 62 | config TQM8540 |
66 | bool "TQ Components TQM8540" | 63 | bool "TQ Components TQM8540" |
67 | help | 64 | help |
68 | This option enables support for the TQ Components TQM8540 board. | 65 | This option enables support for the TQ Components TQM8540 board. |
69 | select DEFAULT_UIMAGE | 66 | select DEFAULT_UIMAGE |
70 | select PPC_CPM_NEW_BINDING | ||
71 | select TQM85xx | 67 | select TQM85xx |
72 | 68 | ||
73 | config TQM8541 | 69 | config TQM8541 |
@@ -75,7 +71,6 @@ config TQM8541 | |||
75 | help | 71 | help |
76 | This option enables support for the TQ Components TQM8541 board. | 72 | This option enables support for the TQ Components TQM8541 board. |
77 | select DEFAULT_UIMAGE | 73 | select DEFAULT_UIMAGE |
78 | select PPC_CPM_NEW_BINDING | ||
79 | select TQM85xx | 74 | select TQM85xx |
80 | select CPM2 | 75 | select CPM2 |
81 | 76 | ||
@@ -84,7 +79,6 @@ config TQM8555 | |||
84 | help | 79 | help |
85 | This option enables support for the TQ Components TQM8555 board. | 80 | This option enables support for the TQ Components TQM8555 board. |
86 | select DEFAULT_UIMAGE | 81 | select DEFAULT_UIMAGE |
87 | select PPC_CPM_NEW_BINDING | ||
88 | select TQM85xx | 82 | select TQM85xx |
89 | select CPM2 | 83 | select CPM2 |
90 | 84 | ||
@@ -93,7 +87,6 @@ config TQM8560 | |||
93 | help | 87 | help |
94 | This option enables support for the TQ Components TQM8560 board. | 88 | This option enables support for the TQ Components TQM8560 board. |
95 | select DEFAULT_UIMAGE | 89 | select DEFAULT_UIMAGE |
96 | select PPC_CPM_NEW_BINDING | ||
97 | select TQM85xx | 90 | select TQM85xx |
98 | select CPM2 | 91 | select CPM2 |
99 | 92 | ||
@@ -106,7 +99,6 @@ config SBC8548 | |||
106 | config SBC8560 | 99 | config SBC8560 |
107 | bool "Wind River SBC8560" | 100 | bool "Wind River SBC8560" |
108 | select DEFAULT_UIMAGE | 101 | select DEFAULT_UIMAGE |
109 | select PPC_CPM_NEW_BINDING if CPM2 | ||
110 | help | 102 | help |
111 | This option enables support for the Wind River SBC8560 board | 103 | This option enables support for the Wind River SBC8560 board |
112 | 104 | ||
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig index 7fd224ca233d..6fc849e51e48 100644 --- a/arch/powerpc/platforms/8xx/Kconfig +++ b/arch/powerpc/platforms/8xx/Kconfig | |||
@@ -18,7 +18,6 @@ config MPC8XXFADS | |||
18 | config MPC86XADS | 18 | config MPC86XADS |
19 | bool "MPC86XADS" | 19 | bool "MPC86XADS" |
20 | select CPM1 | 20 | select CPM1 |
21 | select PPC_CPM_NEW_BINDING | ||
22 | help | 21 | help |
23 | MPC86x Application Development System by Freescale Semiconductor. | 22 | MPC86x Application Development System by Freescale Semiconductor. |
24 | The MPC86xADS is meant to serve as a platform for s/w and h/w | 23 | The MPC86xADS is meant to serve as a platform for s/w and h/w |
@@ -27,7 +26,6 @@ config MPC86XADS | |||
27 | config MPC885ADS | 26 | config MPC885ADS |
28 | bool "MPC885ADS" | 27 | bool "MPC885ADS" |
29 | select CPM1 | 28 | select CPM1 |
30 | select PPC_CPM_NEW_BINDING | ||
31 | help | 29 | help |
32 | Freescale Semiconductor MPC885 Application Development System (ADS). | 30 | Freescale Semiconductor MPC885 Application Development System (ADS). |
33 | Also known as DUET. | 31 | Also known as DUET. |
@@ -37,7 +35,6 @@ config MPC885ADS | |||
37 | config PPC_EP88XC | 35 | config PPC_EP88XC |
38 | bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)" | 36 | bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)" |
39 | select CPM1 | 37 | select CPM1 |
40 | select PPC_CPM_NEW_BINDING | ||
41 | help | 38 | help |
42 | This enables support for the Embedded Planet EP88xC board. | 39 | This enables support for the Embedded Planet EP88xC board. |
43 | 40 | ||
@@ -47,7 +44,6 @@ config PPC_EP88XC | |||
47 | config PPC_ADDER875 | 44 | config PPC_ADDER875 |
48 | bool "Analogue & Micro Adder 875" | 45 | bool "Analogue & Micro Adder 875" |
49 | select CPM1 | 46 | select CPM1 |
50 | select PPC_CPM_NEW_BINDING | ||
51 | select REDBOOT | 47 | select REDBOOT |
52 | help | 48 | help |
53 | This enables support for the Analogue & Micro Adder 875 | 49 | This enables support for the Analogue & Micro Adder 875 |
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index a578b966ecbc..f38c50b4ce56 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig | |||
@@ -290,13 +290,7 @@ config CPM2 | |||
290 | config PPC_CPM_NEW_BINDING | 290 | config PPC_CPM_NEW_BINDING |
291 | bool | 291 | bool |
292 | depends on CPM1 || CPM2 | 292 | depends on CPM1 || CPM2 |
293 | help | 293 | default y |
294 | Select this if your board has been converted to use the new | ||
295 | device tree bindings for CPM, and no longer needs the | ||
296 | ioport callbacks or the platform device glue code. | ||
297 | |||
298 | The fs_enet and cpm_uart drivers will be built as | ||
299 | of_platform devices. | ||
300 | 294 | ||
301 | config AXON_RAM | 295 | config AXON_RAM |
302 | tristate "Axon DDR2 memory device driver" | 296 | tristate "Axon DDR2 memory device driver" |
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 3eceeb5f3ee7..58292a086c16 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c | |||
@@ -44,9 +44,6 @@ | |||
44 | 44 | ||
45 | #define CPM_MAP_SIZE (0x4000) | 45 | #define CPM_MAP_SIZE (0x4000) |
46 | 46 | ||
47 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
48 | static void m8xx_cpm_dpinit(void); | ||
49 | #endif | ||
50 | cpm8xx_t __iomem *cpmp; /* Pointer to comm processor space */ | 47 | cpm8xx_t __iomem *cpmp; /* Pointer to comm processor space */ |
51 | immap_t __iomem *mpc8xx_immr; | 48 | immap_t __iomem *mpc8xx_immr; |
52 | static cpic8xx_t __iomem *cpic_reg; | 49 | static cpic8xx_t __iomem *cpic_reg; |
@@ -229,12 +226,7 @@ void __init cpm_reset(void) | |||
229 | out_be32(&siu_conf->sc_sdcr, 1); | 226 | out_be32(&siu_conf->sc_sdcr, 1); |
230 | immr_unmap(siu_conf); | 227 | immr_unmap(siu_conf); |
231 | 228 | ||
232 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
233 | cpm_muram_init(); | 229 | cpm_muram_init(); |
234 | #else | ||
235 | /* Reclaim the DP memory for our use. */ | ||
236 | m8xx_cpm_dpinit(); | ||
237 | #endif | ||
238 | } | 230 | } |
239 | 231 | ||
240 | static DEFINE_SPINLOCK(cmd_lock); | 232 | static DEFINE_SPINLOCK(cmd_lock); |
@@ -293,110 +285,6 @@ cpm_setbrg(uint brg, uint rate) | |||
293 | CPM_BRG_EN | CPM_BRG_DIV16); | 285 | CPM_BRG_EN | CPM_BRG_DIV16); |
294 | } | 286 | } |
295 | 287 | ||
296 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
297 | /* | ||
298 | * dpalloc / dpfree bits. | ||
299 | */ | ||
300 | static spinlock_t cpm_dpmem_lock; | ||
301 | /* | ||
302 | * 16 blocks should be enough to satisfy all requests | ||
303 | * until the memory subsystem goes up... | ||
304 | */ | ||
305 | static rh_block_t cpm_boot_dpmem_rh_block[16]; | ||
306 | static rh_info_t cpm_dpmem_info; | ||
307 | |||
308 | #define CPM_DPMEM_ALIGNMENT 8 | ||
309 | static u8 __iomem *dpram_vbase; | ||
310 | static phys_addr_t dpram_pbase; | ||
311 | |||
312 | static void m8xx_cpm_dpinit(void) | ||
313 | { | ||
314 | spin_lock_init(&cpm_dpmem_lock); | ||
315 | |||
316 | dpram_vbase = cpmp->cp_dpmem; | ||
317 | dpram_pbase = get_immrbase() + offsetof(immap_t, im_cpm.cp_dpmem); | ||
318 | |||
319 | /* Initialize the info header */ | ||
320 | rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT, | ||
321 | sizeof(cpm_boot_dpmem_rh_block) / | ||
322 | sizeof(cpm_boot_dpmem_rh_block[0]), | ||
323 | cpm_boot_dpmem_rh_block); | ||
324 | |||
325 | /* | ||
326 | * Attach the usable dpmem area. | ||
327 | * XXX: This is actually crap. CPM_DATAONLY_BASE and | ||
328 | * CPM_DATAONLY_SIZE are a subset of the available dparm. It varies | ||
329 | * with the processor and the microcode patches applied / activated. | ||
330 | * But the following should be at least safe. | ||
331 | */ | ||
332 | rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE); | ||
333 | } | ||
334 | |||
335 | /* | ||
336 | * Allocate the requested size worth of DP memory. | ||
337 | * This function returns an offset into the DPRAM area. | ||
338 | * Use cpm_dpram_addr() to get the virtual address of the area. | ||
339 | */ | ||
340 | unsigned long cpm_dpalloc(uint size, uint align) | ||
341 | { | ||
342 | unsigned long start; | ||
343 | unsigned long flags; | ||
344 | |||
345 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | ||
346 | cpm_dpmem_info.alignment = align; | ||
347 | start = rh_alloc(&cpm_dpmem_info, size, "commproc"); | ||
348 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | ||
349 | |||
350 | return (uint)start; | ||
351 | } | ||
352 | EXPORT_SYMBOL(cpm_dpalloc); | ||
353 | |||
354 | int cpm_dpfree(unsigned long offset) | ||
355 | { | ||
356 | int ret; | ||
357 | unsigned long flags; | ||
358 | |||
359 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | ||
360 | ret = rh_free(&cpm_dpmem_info, offset); | ||
361 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | ||
362 | |||
363 | return ret; | ||
364 | } | ||
365 | EXPORT_SYMBOL(cpm_dpfree); | ||
366 | |||
367 | unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align) | ||
368 | { | ||
369 | unsigned long start; | ||
370 | unsigned long flags; | ||
371 | |||
372 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | ||
373 | cpm_dpmem_info.alignment = align; | ||
374 | start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc"); | ||
375 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | ||
376 | |||
377 | return start; | ||
378 | } | ||
379 | EXPORT_SYMBOL(cpm_dpalloc_fixed); | ||
380 | |||
381 | void cpm_dpdump(void) | ||
382 | { | ||
383 | rh_dump(&cpm_dpmem_info); | ||
384 | } | ||
385 | EXPORT_SYMBOL(cpm_dpdump); | ||
386 | |||
387 | void *cpm_dpram_addr(unsigned long offset) | ||
388 | { | ||
389 | return (void *)(dpram_vbase + offset); | ||
390 | } | ||
391 | EXPORT_SYMBOL(cpm_dpram_addr); | ||
392 | |||
393 | uint cpm_dpram_phys(u8 *addr) | ||
394 | { | ||
395 | return (dpram_pbase + (uint)(addr - dpram_vbase)); | ||
396 | } | ||
397 | EXPORT_SYMBOL(cpm_dpram_phys); | ||
398 | #endif /* !CONFIG_PPC_CPM_NEW_BINDING */ | ||
399 | |||
400 | struct cpm_ioport16 { | 288 | struct cpm_ioport16 { |
401 | __be16 dir, par, odr_sor, dat, intr; | 289 | __be16 dir, par, odr_sor, dat, intr; |
402 | __be16 res[3]; | 290 | __be16 res[3]; |
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c index 4ab3f1f5a7c3..5a6c5dfc53ef 100644 --- a/arch/powerpc/sysdev/cpm2.c +++ b/arch/powerpc/sysdev/cpm2.c | |||
@@ -46,10 +46,6 @@ | |||
46 | 46 | ||
47 | #include <sysdev/fsl_soc.h> | 47 | #include <sysdev/fsl_soc.h> |
48 | 48 | ||
49 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
50 | static void cpm2_dpinit(void); | ||
51 | #endif | ||
52 | |||
53 | cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */ | 49 | cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */ |
54 | 50 | ||
55 | /* We allocate this here because it is used almost exclusively for | 51 | /* We allocate this here because it is used almost exclusively for |
@@ -71,11 +67,7 @@ void __init cpm2_reset(void) | |||
71 | 67 | ||
72 | /* Reclaim the DP memory for our use. | 68 | /* Reclaim the DP memory for our use. |
73 | */ | 69 | */ |
74 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
75 | cpm_muram_init(); | 70 | cpm_muram_init(); |
76 | #else | ||
77 | cpm2_dpinit(); | ||
78 | #endif | ||
79 | 71 | ||
80 | /* Tell everyone where the comm processor resides. | 72 | /* Tell everyone where the comm processor resides. |
81 | */ | 73 | */ |
@@ -353,95 +345,6 @@ int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock) | |||
353 | return ret; | 345 | return ret; |
354 | } | 346 | } |
355 | 347 | ||
356 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
357 | /* | ||
358 | * dpalloc / dpfree bits. | ||
359 | */ | ||
360 | static spinlock_t cpm_dpmem_lock; | ||
361 | /* 16 blocks should be enough to satisfy all requests | ||
362 | * until the memory subsystem goes up... */ | ||
363 | static rh_block_t cpm_boot_dpmem_rh_block[16]; | ||
364 | static rh_info_t cpm_dpmem_info; | ||
365 | static u8 __iomem *im_dprambase; | ||
366 | |||
367 | static void cpm2_dpinit(void) | ||
368 | { | ||
369 | spin_lock_init(&cpm_dpmem_lock); | ||
370 | |||
371 | /* initialize the info header */ | ||
372 | rh_init(&cpm_dpmem_info, 1, | ||
373 | sizeof(cpm_boot_dpmem_rh_block) / | ||
374 | sizeof(cpm_boot_dpmem_rh_block[0]), | ||
375 | cpm_boot_dpmem_rh_block); | ||
376 | |||
377 | im_dprambase = cpm2_immr; | ||
378 | |||
379 | /* Attach the usable dpmem area */ | ||
380 | /* XXX: This is actually crap. CPM_DATAONLY_BASE and | ||
381 | * CPM_DATAONLY_SIZE is only a subset of the available dpram. It | ||
382 | * varies with the processor and the microcode patches activated. | ||
383 | * But the following should be at least safe. | ||
384 | */ | ||
385 | rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE); | ||
386 | } | ||
387 | |||
388 | /* This function returns an index into the DPRAM area. | ||
389 | */ | ||
390 | unsigned long cpm_dpalloc(uint size, uint align) | ||
391 | { | ||
392 | unsigned long start; | ||
393 | unsigned long flags; | ||
394 | |||
395 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | ||
396 | cpm_dpmem_info.alignment = align; | ||
397 | start = rh_alloc(&cpm_dpmem_info, size, "commproc"); | ||
398 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | ||
399 | |||
400 | return (uint)start; | ||
401 | } | ||
402 | EXPORT_SYMBOL(cpm_dpalloc); | ||
403 | |||
404 | int cpm_dpfree(unsigned long offset) | ||
405 | { | ||
406 | int ret; | ||
407 | unsigned long flags; | ||
408 | |||
409 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | ||
410 | ret = rh_free(&cpm_dpmem_info, offset); | ||
411 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | ||
412 | |||
413 | return ret; | ||
414 | } | ||
415 | EXPORT_SYMBOL(cpm_dpfree); | ||
416 | |||
417 | /* not sure if this is ever needed */ | ||
418 | unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align) | ||
419 | { | ||
420 | unsigned long start; | ||
421 | unsigned long flags; | ||
422 | |||
423 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | ||
424 | cpm_dpmem_info.alignment = align; | ||
425 | start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc"); | ||
426 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | ||
427 | |||
428 | return start; | ||
429 | } | ||
430 | EXPORT_SYMBOL(cpm_dpalloc_fixed); | ||
431 | |||
432 | void cpm_dpdump(void) | ||
433 | { | ||
434 | rh_dump(&cpm_dpmem_info); | ||
435 | } | ||
436 | EXPORT_SYMBOL(cpm_dpdump); | ||
437 | |||
438 | void *cpm_dpram_addr(unsigned long offset) | ||
439 | { | ||
440 | return (void *)(im_dprambase + offset); | ||
441 | } | ||
442 | EXPORT_SYMBOL(cpm_dpram_addr); | ||
443 | #endif /* !CONFIG_PPC_CPM_NEW_BINDING */ | ||
444 | |||
445 | struct cpm2_ioports { | 348 | struct cpm2_ioports { |
446 | u32 dir, par, sor, odr, dat; | 349 | u32 dir, par, sor, odr, dat; |
447 | u32 res[3]; | 350 | u32 res[3]; |
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c index 165981c87786..cb7df2dce44f 100644 --- a/arch/powerpc/sysdev/cpm_common.c +++ b/arch/powerpc/sysdev/cpm_common.c | |||
@@ -58,7 +58,6 @@ void __init udbg_init_cpm(void) | |||
58 | } | 58 | } |
59 | #endif | 59 | #endif |
60 | 60 | ||
61 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
62 | static spinlock_t cpm_muram_lock; | 61 | static spinlock_t cpm_muram_lock; |
63 | static rh_block_t cpm_boot_muram_rh_block[16]; | 62 | static rh_block_t cpm_boot_muram_rh_block[16]; |
64 | static rh_info_t cpm_muram_info; | 63 | static rh_info_t cpm_muram_info; |
@@ -199,5 +198,3 @@ dma_addr_t cpm_muram_dma(void __iomem *addr) | |||
199 | return muram_pbase + ((u8 __iomem *)addr - muram_vbase); | 198 | return muram_pbase + ((u8 __iomem *)addr - muram_vbase); |
200 | } | 199 | } |
201 | EXPORT_SYMBOL(cpm_muram_dma); | 200 | EXPORT_SYMBOL(cpm_muram_dma); |
202 | |||
203 | #endif /* CONFIG_PPC_CPM_NEW_BINDING */ | ||
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 2c5388ce902a..642e45e1f160 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -735,547 +735,6 @@ err: | |||
735 | 735 | ||
736 | arch_initcall(fsl_usb_of_init); | 736 | arch_initcall(fsl_usb_of_init); |
737 | 737 | ||
738 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
739 | #ifdef CONFIG_CPM2 | ||
740 | |||
741 | extern void init_scc_ioports(struct fs_uart_platform_info*); | ||
742 | |||
743 | static const char fcc_regs[] = "fcc_regs"; | ||
744 | static const char fcc_regs_c[] = "fcc_regs_c"; | ||
745 | static const char fcc_pram[] = "fcc_pram"; | ||
746 | static char bus_id[9][BUS_ID_SIZE]; | ||
747 | |||
748 | static int __init fs_enet_of_init(void) | ||
749 | { | ||
750 | struct device_node *np; | ||
751 | unsigned int i; | ||
752 | struct platform_device *fs_enet_dev; | ||
753 | struct resource res; | ||
754 | int ret; | ||
755 | |||
756 | for (np = NULL, i = 0; | ||
757 | (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL; | ||
758 | i++) { | ||
759 | struct resource r[4]; | ||
760 | struct device_node *phy, *mdio; | ||
761 | struct fs_platform_info fs_enet_data; | ||
762 | const unsigned int *id, *phy_addr, *phy_irq; | ||
763 | const void *mac_addr; | ||
764 | const phandle *ph; | ||
765 | const char *model; | ||
766 | |||
767 | memset(r, 0, sizeof(r)); | ||
768 | memset(&fs_enet_data, 0, sizeof(fs_enet_data)); | ||
769 | |||
770 | ret = of_address_to_resource(np, 0, &r[0]); | ||
771 | if (ret) | ||
772 | goto err; | ||
773 | r[0].name = fcc_regs; | ||
774 | |||
775 | ret = of_address_to_resource(np, 1, &r[1]); | ||
776 | if (ret) | ||
777 | goto err; | ||
778 | r[1].name = fcc_pram; | ||
779 | |||
780 | ret = of_address_to_resource(np, 2, &r[2]); | ||
781 | if (ret) | ||
782 | goto err; | ||
783 | r[2].name = fcc_regs_c; | ||
784 | fs_enet_data.fcc_regs_c = r[2].start; | ||
785 | |||
786 | of_irq_to_resource(np, 0, &r[3]); | ||
787 | |||
788 | fs_enet_dev = | ||
789 | platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4); | ||
790 | |||
791 | if (IS_ERR(fs_enet_dev)) { | ||
792 | ret = PTR_ERR(fs_enet_dev); | ||
793 | goto err; | ||
794 | } | ||
795 | |||
796 | model = of_get_property(np, "model", NULL); | ||
797 | if (model == NULL) { | ||
798 | ret = -ENODEV; | ||
799 | goto unreg; | ||
800 | } | ||
801 | |||
802 | mac_addr = of_get_mac_address(np); | ||
803 | if (mac_addr) | ||
804 | memcpy(fs_enet_data.macaddr, mac_addr, 6); | ||
805 | |||
806 | ph = of_get_property(np, "phy-handle", NULL); | ||
807 | phy = of_find_node_by_phandle(*ph); | ||
808 | |||
809 | if (phy == NULL) { | ||
810 | ret = -ENODEV; | ||
811 | goto unreg; | ||
812 | } | ||
813 | |||
814 | phy_addr = of_get_property(phy, "reg", NULL); | ||
815 | fs_enet_data.phy_addr = *phy_addr; | ||
816 | |||
817 | phy_irq = of_get_property(phy, "interrupts", NULL); | ||
818 | |||
819 | id = of_get_property(np, "device-id", NULL); | ||
820 | fs_enet_data.fs_no = *id; | ||
821 | strcpy(fs_enet_data.fs_type, model); | ||
822 | |||
823 | mdio = of_get_parent(phy); | ||
824 | ret = of_address_to_resource(mdio, 0, &res); | ||
825 | if (ret) { | ||
826 | of_node_put(phy); | ||
827 | of_node_put(mdio); | ||
828 | goto unreg; | ||
829 | } | ||
830 | |||
831 | fs_enet_data.clk_rx = *((u32 *)of_get_property(np, | ||
832 | "rx-clock", NULL)); | ||
833 | fs_enet_data.clk_tx = *((u32 *)of_get_property(np, | ||
834 | "tx-clock", NULL)); | ||
835 | |||
836 | if (strstr(model, "FCC")) { | ||
837 | int fcc_index = *id - 1; | ||
838 | const unsigned char *mdio_bb_prop; | ||
839 | |||
840 | fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0); | ||
841 | fs_enet_data.rx_ring = 32; | ||
842 | fs_enet_data.tx_ring = 32; | ||
843 | fs_enet_data.rx_copybreak = 240; | ||
844 | fs_enet_data.use_napi = 0; | ||
845 | fs_enet_data.napi_weight = 17; | ||
846 | fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index); | ||
847 | fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index); | ||
848 | fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index); | ||
849 | |||
850 | snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x", | ||
851 | (u32)res.start, fs_enet_data.phy_addr); | ||
852 | fs_enet_data.bus_id = (char*)&bus_id[(*id)]; | ||
853 | fs_enet_data.init_ioports = init_fcc_ioports; | ||
854 | |||
855 | mdio_bb_prop = of_get_property(phy, "bitbang", NULL); | ||
856 | if (mdio_bb_prop) { | ||
857 | struct platform_device *fs_enet_mdio_bb_dev; | ||
858 | struct fs_mii_bb_platform_info fs_enet_mdio_bb_data; | ||
859 | |||
860 | fs_enet_mdio_bb_dev = | ||
861 | platform_device_register_simple("fsl-bb-mdio", | ||
862 | i, NULL, 0); | ||
863 | memset(&fs_enet_mdio_bb_data, 0, | ||
864 | sizeof(struct fs_mii_bb_platform_info)); | ||
865 | fs_enet_mdio_bb_data.mdio_dat.bit = | ||
866 | mdio_bb_prop[0]; | ||
867 | fs_enet_mdio_bb_data.mdio_dir.bit = | ||
868 | mdio_bb_prop[1]; | ||
869 | fs_enet_mdio_bb_data.mdc_dat.bit = | ||
870 | mdio_bb_prop[2]; | ||
871 | fs_enet_mdio_bb_data.mdio_port = | ||
872 | mdio_bb_prop[3]; | ||
873 | fs_enet_mdio_bb_data.mdc_port = | ||
874 | mdio_bb_prop[4]; | ||
875 | fs_enet_mdio_bb_data.delay = | ||
876 | mdio_bb_prop[5]; | ||
877 | |||
878 | fs_enet_mdio_bb_data.irq[0] = phy_irq[0]; | ||
879 | fs_enet_mdio_bb_data.irq[1] = -1; | ||
880 | fs_enet_mdio_bb_data.irq[2] = -1; | ||
881 | fs_enet_mdio_bb_data.irq[3] = phy_irq[0]; | ||
882 | fs_enet_mdio_bb_data.irq[31] = -1; | ||
883 | |||
884 | fs_enet_mdio_bb_data.mdio_dat.offset = | ||
885 | (u32)&cpm2_immr->im_ioport.iop_pdatc; | ||
886 | fs_enet_mdio_bb_data.mdio_dir.offset = | ||
887 | (u32)&cpm2_immr->im_ioport.iop_pdirc; | ||
888 | fs_enet_mdio_bb_data.mdc_dat.offset = | ||
889 | (u32)&cpm2_immr->im_ioport.iop_pdatc; | ||
890 | |||
891 | ret = platform_device_add_data( | ||
892 | fs_enet_mdio_bb_dev, | ||
893 | &fs_enet_mdio_bb_data, | ||
894 | sizeof(struct fs_mii_bb_platform_info)); | ||
895 | if (ret) | ||
896 | goto unreg; | ||
897 | } | ||
898 | |||
899 | of_node_put(phy); | ||
900 | of_node_put(mdio); | ||
901 | |||
902 | ret = platform_device_add_data(fs_enet_dev, &fs_enet_data, | ||
903 | sizeof(struct | ||
904 | fs_platform_info)); | ||
905 | if (ret) | ||
906 | goto unreg; | ||
907 | } | ||
908 | } | ||
909 | return 0; | ||
910 | |||
911 | unreg: | ||
912 | platform_device_unregister(fs_enet_dev); | ||
913 | err: | ||
914 | return ret; | ||
915 | } | ||
916 | |||
917 | arch_initcall(fs_enet_of_init); | ||
918 | |||
919 | static const char scc_regs[] = "regs"; | ||
920 | static const char scc_pram[] = "pram"; | ||
921 | |||
922 | static int __init cpm_uart_of_init(void) | ||
923 | { | ||
924 | struct device_node *np; | ||
925 | unsigned int i; | ||
926 | struct platform_device *cpm_uart_dev; | ||
927 | int ret; | ||
928 | |||
929 | for (np = NULL, i = 0; | ||
930 | (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL; | ||
931 | i++) { | ||
932 | struct resource r[3]; | ||
933 | struct fs_uart_platform_info cpm_uart_data; | ||
934 | const int *id; | ||
935 | const char *model; | ||
936 | |||
937 | memset(r, 0, sizeof(r)); | ||
938 | memset(&cpm_uart_data, 0, sizeof(cpm_uart_data)); | ||
939 | |||
940 | ret = of_address_to_resource(np, 0, &r[0]); | ||
941 | if (ret) | ||
942 | goto err; | ||
943 | |||
944 | r[0].name = scc_regs; | ||
945 | |||
946 | ret = of_address_to_resource(np, 1, &r[1]); | ||
947 | if (ret) | ||
948 | goto err; | ||
949 | r[1].name = scc_pram; | ||
950 | |||
951 | of_irq_to_resource(np, 0, &r[2]); | ||
952 | |||
953 | cpm_uart_dev = | ||
954 | platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3); | ||
955 | |||
956 | if (IS_ERR(cpm_uart_dev)) { | ||
957 | ret = PTR_ERR(cpm_uart_dev); | ||
958 | goto err; | ||
959 | } | ||
960 | |||
961 | id = of_get_property(np, "device-id", NULL); | ||
962 | cpm_uart_data.fs_no = *id; | ||
963 | |||
964 | model = of_get_property(np, "model", NULL); | ||
965 | strcpy(cpm_uart_data.fs_type, model); | ||
966 | |||
967 | cpm_uart_data.uart_clk = ppc_proc_freq; | ||
968 | |||
969 | cpm_uart_data.tx_num_fifo = 4; | ||
970 | cpm_uart_data.tx_buf_size = 32; | ||
971 | cpm_uart_data.rx_num_fifo = 4; | ||
972 | cpm_uart_data.rx_buf_size = 32; | ||
973 | cpm_uart_data.clk_rx = *((u32 *)of_get_property(np, | ||
974 | "rx-clock", NULL)); | ||
975 | cpm_uart_data.clk_tx = *((u32 *)of_get_property(np, | ||
976 | "tx-clock", NULL)); | ||
977 | |||
978 | ret = | ||
979 | platform_device_add_data(cpm_uart_dev, &cpm_uart_data, | ||
980 | sizeof(struct | ||
981 | fs_uart_platform_info)); | ||
982 | if (ret) | ||
983 | goto unreg; | ||
984 | } | ||
985 | |||
986 | return 0; | ||
987 | |||
988 | unreg: | ||
989 | platform_device_unregister(cpm_uart_dev); | ||
990 | err: | ||
991 | return ret; | ||
992 | } | ||
993 | |||
994 | arch_initcall(cpm_uart_of_init); | ||
995 | #endif /* CONFIG_CPM2 */ | ||
996 | |||
997 | #ifdef CONFIG_8xx | ||
998 | |||
999 | extern void init_scc_ioports(struct fs_platform_info*); | ||
1000 | extern int platform_device_skip(const char *model, int id); | ||
1001 | |||
1002 | static int __init fs_enet_mdio_of_init(void) | ||
1003 | { | ||
1004 | struct device_node *np; | ||
1005 | unsigned int i; | ||
1006 | struct platform_device *mdio_dev; | ||
1007 | struct resource res; | ||
1008 | int ret; | ||
1009 | |||
1010 | for (np = NULL, i = 0; | ||
1011 | (np = of_find_compatible_node(np, "mdio", "fs_enet")) != NULL; | ||
1012 | i++) { | ||
1013 | struct fs_mii_fec_platform_info mdio_data; | ||
1014 | |||
1015 | memset(&res, 0, sizeof(res)); | ||
1016 | memset(&mdio_data, 0, sizeof(mdio_data)); | ||
1017 | |||
1018 | ret = of_address_to_resource(np, 0, &res); | ||
1019 | if (ret) | ||
1020 | goto err; | ||
1021 | |||
1022 | mdio_dev = | ||
1023 | platform_device_register_simple("fsl-cpm-fec-mdio", | ||
1024 | res.start, &res, 1); | ||
1025 | if (IS_ERR(mdio_dev)) { | ||
1026 | ret = PTR_ERR(mdio_dev); | ||
1027 | goto err; | ||
1028 | } | ||
1029 | |||
1030 | mdio_data.mii_speed = ((((ppc_proc_freq + 4999999) / 2500000) / 2) & 0x3F) << 1; | ||
1031 | |||
1032 | ret = | ||
1033 | platform_device_add_data(mdio_dev, &mdio_data, | ||
1034 | sizeof(struct fs_mii_fec_platform_info)); | ||
1035 | if (ret) | ||
1036 | goto unreg; | ||
1037 | } | ||
1038 | return 0; | ||
1039 | |||
1040 | unreg: | ||
1041 | platform_device_unregister(mdio_dev); | ||
1042 | err: | ||
1043 | return ret; | ||
1044 | } | ||
1045 | |||
1046 | arch_initcall(fs_enet_mdio_of_init); | ||
1047 | |||
1048 | static const char *enet_regs = "regs"; | ||
1049 | static const char *enet_pram = "pram"; | ||
1050 | static const char *enet_irq = "interrupt"; | ||
1051 | static char bus_id[9][BUS_ID_SIZE]; | ||
1052 | |||
1053 | static int __init fs_enet_of_init(void) | ||
1054 | { | ||
1055 | struct device_node *np; | ||
1056 | unsigned int i; | ||
1057 | struct platform_device *fs_enet_dev = NULL; | ||
1058 | struct resource res; | ||
1059 | int ret; | ||
1060 | |||
1061 | for (np = NULL, i = 0; | ||
1062 | (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL; | ||
1063 | i++) { | ||
1064 | struct resource r[4]; | ||
1065 | struct device_node *phy = NULL, *mdio = NULL; | ||
1066 | struct fs_platform_info fs_enet_data; | ||
1067 | const unsigned int *id; | ||
1068 | const unsigned int *phy_addr; | ||
1069 | const void *mac_addr; | ||
1070 | const phandle *ph; | ||
1071 | const char *model; | ||
1072 | |||
1073 | memset(r, 0, sizeof(r)); | ||
1074 | memset(&fs_enet_data, 0, sizeof(fs_enet_data)); | ||
1075 | |||
1076 | model = of_get_property(np, "model", NULL); | ||
1077 | if (model == NULL) { | ||
1078 | ret = -ENODEV; | ||
1079 | goto unreg; | ||
1080 | } | ||
1081 | |||
1082 | id = of_get_property(np, "device-id", NULL); | ||
1083 | fs_enet_data.fs_no = *id; | ||
1084 | |||
1085 | if (platform_device_skip(model, *id)) | ||
1086 | continue; | ||
1087 | |||
1088 | ret = of_address_to_resource(np, 0, &r[0]); | ||
1089 | if (ret) | ||
1090 | goto err; | ||
1091 | r[0].name = enet_regs; | ||
1092 | |||
1093 | mac_addr = of_get_mac_address(np); | ||
1094 | if (mac_addr) | ||
1095 | memcpy(fs_enet_data.macaddr, mac_addr, 6); | ||
1096 | |||
1097 | ph = of_get_property(np, "phy-handle", NULL); | ||
1098 | if (ph != NULL) | ||
1099 | phy = of_find_node_by_phandle(*ph); | ||
1100 | |||
1101 | if (phy != NULL) { | ||
1102 | phy_addr = of_get_property(phy, "reg", NULL); | ||
1103 | fs_enet_data.phy_addr = *phy_addr; | ||
1104 | fs_enet_data.has_phy = 1; | ||
1105 | |||
1106 | mdio = of_get_parent(phy); | ||
1107 | ret = of_address_to_resource(mdio, 0, &res); | ||
1108 | if (ret) { | ||
1109 | of_node_put(phy); | ||
1110 | of_node_put(mdio); | ||
1111 | goto unreg; | ||
1112 | } | ||
1113 | } | ||
1114 | |||
1115 | model = of_get_property(np, "model", NULL); | ||
1116 | strcpy(fs_enet_data.fs_type, model); | ||
1117 | |||
1118 | if (strstr(model, "FEC")) { | ||
1119 | r[1].start = r[1].end = irq_of_parse_and_map(np, 0); | ||
1120 | r[1].flags = IORESOURCE_IRQ; | ||
1121 | r[1].name = enet_irq; | ||
1122 | |||
1123 | fs_enet_dev = | ||
1124 | platform_device_register_simple("fsl-cpm-fec", i, &r[0], 2); | ||
1125 | |||
1126 | if (IS_ERR(fs_enet_dev)) { | ||
1127 | ret = PTR_ERR(fs_enet_dev); | ||
1128 | goto err; | ||
1129 | } | ||
1130 | |||
1131 | fs_enet_data.rx_ring = 128; | ||
1132 | fs_enet_data.tx_ring = 16; | ||
1133 | fs_enet_data.rx_copybreak = 240; | ||
1134 | fs_enet_data.use_napi = 1; | ||
1135 | fs_enet_data.napi_weight = 17; | ||
1136 | |||
1137 | snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x", | ||
1138 | (u32)res.start, fs_enet_data.phy_addr); | ||
1139 | fs_enet_data.bus_id = (char*)&bus_id[i]; | ||
1140 | fs_enet_data.init_ioports = init_fec_ioports; | ||
1141 | } | ||
1142 | if (strstr(model, "SCC")) { | ||
1143 | ret = of_address_to_resource(np, 1, &r[1]); | ||
1144 | if (ret) | ||
1145 | goto err; | ||
1146 | r[1].name = enet_pram; | ||
1147 | |||
1148 | r[2].start = r[2].end = irq_of_parse_and_map(np, 0); | ||
1149 | r[2].flags = IORESOURCE_IRQ; | ||
1150 | r[2].name = enet_irq; | ||
1151 | |||
1152 | fs_enet_dev = | ||
1153 | platform_device_register_simple("fsl-cpm-scc", i, &r[0], 3); | ||
1154 | |||
1155 | if (IS_ERR(fs_enet_dev)) { | ||
1156 | ret = PTR_ERR(fs_enet_dev); | ||
1157 | goto err; | ||
1158 | } | ||
1159 | |||
1160 | fs_enet_data.rx_ring = 64; | ||
1161 | fs_enet_data.tx_ring = 8; | ||
1162 | fs_enet_data.rx_copybreak = 240; | ||
1163 | fs_enet_data.use_napi = 1; | ||
1164 | fs_enet_data.napi_weight = 17; | ||
1165 | |||
1166 | snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1"); | ||
1167 | fs_enet_data.bus_id = (char*)&bus_id[i]; | ||
1168 | fs_enet_data.init_ioports = init_scc_ioports; | ||
1169 | } | ||
1170 | |||
1171 | of_node_put(phy); | ||
1172 | of_node_put(mdio); | ||
1173 | |||
1174 | ret = platform_device_add_data(fs_enet_dev, &fs_enet_data, | ||
1175 | sizeof(struct | ||
1176 | fs_platform_info)); | ||
1177 | if (ret) | ||
1178 | goto unreg; | ||
1179 | } | ||
1180 | return 0; | ||
1181 | |||
1182 | unreg: | ||
1183 | platform_device_unregister(fs_enet_dev); | ||
1184 | err: | ||
1185 | return ret; | ||
1186 | } | ||
1187 | |||
1188 | arch_initcall(fs_enet_of_init); | ||
1189 | |||
1190 | static int __init fsl_pcmcia_of_init(void) | ||
1191 | { | ||
1192 | struct device_node *np; | ||
1193 | /* | ||
1194 | * Register all the devices which type is "pcmcia" | ||
1195 | */ | ||
1196 | for_each_compatible_node(np, "pcmcia", "fsl,pq-pcmcia") | ||
1197 | of_platform_device_create(np, "m8xx-pcmcia", NULL); | ||
1198 | return 0; | ||
1199 | } | ||
1200 | |||
1201 | arch_initcall(fsl_pcmcia_of_init); | ||
1202 | |||
1203 | static const char *smc_regs = "regs"; | ||
1204 | static const char *smc_pram = "pram"; | ||
1205 | |||
1206 | static int __init cpm_smc_uart_of_init(void) | ||
1207 | { | ||
1208 | struct device_node *np; | ||
1209 | unsigned int i; | ||
1210 | struct platform_device *cpm_uart_dev; | ||
1211 | int ret; | ||
1212 | |||
1213 | for (np = NULL, i = 0; | ||
1214 | (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL; | ||
1215 | i++) { | ||
1216 | struct resource r[3]; | ||
1217 | struct fs_uart_platform_info cpm_uart_data; | ||
1218 | const int *id; | ||
1219 | const char *model; | ||
1220 | |||
1221 | memset(r, 0, sizeof(r)); | ||
1222 | memset(&cpm_uart_data, 0, sizeof(cpm_uart_data)); | ||
1223 | |||
1224 | ret = of_address_to_resource(np, 0, &r[0]); | ||
1225 | if (ret) | ||
1226 | goto err; | ||
1227 | |||
1228 | r[0].name = smc_regs; | ||
1229 | |||
1230 | ret = of_address_to_resource(np, 1, &r[1]); | ||
1231 | if (ret) | ||
1232 | goto err; | ||
1233 | r[1].name = smc_pram; | ||
1234 | |||
1235 | r[2].start = r[2].end = irq_of_parse_and_map(np, 0); | ||
1236 | r[2].flags = IORESOURCE_IRQ; | ||
1237 | |||
1238 | cpm_uart_dev = | ||
1239 | platform_device_register_simple("fsl-cpm-smc:uart", i, &r[0], 3); | ||
1240 | |||
1241 | if (IS_ERR(cpm_uart_dev)) { | ||
1242 | ret = PTR_ERR(cpm_uart_dev); | ||
1243 | goto err; | ||
1244 | } | ||
1245 | |||
1246 | model = of_get_property(np, "model", NULL); | ||
1247 | strcpy(cpm_uart_data.fs_type, model); | ||
1248 | |||
1249 | id = of_get_property(np, "device-id", NULL); | ||
1250 | cpm_uart_data.fs_no = *id; | ||
1251 | cpm_uart_data.uart_clk = ppc_proc_freq; | ||
1252 | |||
1253 | cpm_uart_data.tx_num_fifo = 4; | ||
1254 | cpm_uart_data.tx_buf_size = 32; | ||
1255 | cpm_uart_data.rx_num_fifo = 4; | ||
1256 | cpm_uart_data.rx_buf_size = 32; | ||
1257 | |||
1258 | ret = | ||
1259 | platform_device_add_data(cpm_uart_dev, &cpm_uart_data, | ||
1260 | sizeof(struct | ||
1261 | fs_uart_platform_info)); | ||
1262 | if (ret) | ||
1263 | goto unreg; | ||
1264 | } | ||
1265 | |||
1266 | return 0; | ||
1267 | |||
1268 | unreg: | ||
1269 | platform_device_unregister(cpm_uart_dev); | ||
1270 | err: | ||
1271 | return ret; | ||
1272 | } | ||
1273 | |||
1274 | arch_initcall(cpm_smc_uart_of_init); | ||
1275 | |||
1276 | #endif /* CONFIG_8xx */ | ||
1277 | #endif /* CONFIG_PPC_CPM_NEW_BINDING */ | ||
1278 | |||
1279 | static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk, | 738 | static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk, |
1280 | struct spi_board_info *board_infos, | 739 | struct spi_board_info *board_infos, |
1281 | unsigned int num_board_infos, | 740 | unsigned int num_board_infos, |