diff options
| author | Sebastian Andrzej Siewior <bigeasy@linutronix.de> | 2012-03-15 13:40:27 -0400 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2012-03-16 11:46:30 -0400 |
| commit | 0c00f65653389a408dfbbee7578e671664eea26a (patch) | |
| tree | 6a25b37d75fd702c2a6c9a5b9a9a0af16b0504c6 /arch/powerpc | |
| parent | 2a2383dab097823d68accce65da043402bdeb57b (diff) | |
powerpc/85xx: p2020rdb - move the NAND address.
It is not at 0xffa00000. According to current u-boot source the NAND
controller is always at 0xff800000 and it is either at CS0 or CS1
depending on NAND or NAND+NOR mode. In 36bit mode it is shifted to
0xfff800000 but it has always an eight there and never an A.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/boot/dts/p2020rdb.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts index eb8a6aa2bda5..8f25ef2e6e42 100644 --- a/arch/powerpc/boot/dts/p2020rdb.dts +++ b/arch/powerpc/boot/dts/p2020rdb.dts | |||
| @@ -34,7 +34,7 @@ | |||
| 34 | 34 | ||
| 35 | /* NOR and NAND Flashes */ | 35 | /* NOR and NAND Flashes */ |
| 36 | ranges = <0x0 0x0 0x0 0xef000000 0x01000000 | 36 | ranges = <0x0 0x0 0x0 0xef000000 0x01000000 |
| 37 | 0x1 0x0 0x0 0xffa00000 0x00040000 | 37 | 0x1 0x0 0x0 0xff800000 0x00040000 |
| 38 | 0x2 0x0 0x0 0xffb00000 0x00020000>; | 38 | 0x2 0x0 0x0 0xffb00000 0x00020000>; |
| 39 | 39 | ||
| 40 | nor@0,0 { | 40 | nor@0,0 { |