powerpc: Improve scheduling of system call entry instructions

After looking at our system call path, Mary Brown suggested that we
should put all mfspr SRR* instructions before any mtspr SRR*.

To test this I used a very simple null syscall (actually getppid)
testcase at http://ozlabs.org/~anton/junkcode/null_syscall.c

I tested with the following changes against the pseries_defconfig:

CONFIG_VIRT_CPU_ACCOUNTING=n
CONFIG_AUDIT=n

to remove the overhead of virtual CPU accounting and syscall
auditing.

POWER6:
baseline:       mean = 757.2 cycles       sd = 2.108
modified:       mean = 759.1 cycles       sd = 2.020

POWER7:
baseline:       mean = 411.4 cycles       sd = 0.138
modified:       mean = 404.1 cycles       sd = 0.109

So we have 1.77% improvement on POWER7 which looks significant. The
POWER6 suggest a 0.25% slowdown, but the results are within 1
standard deviation and may be in the noise.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 4 insertions, 4 deletions

diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 0ec3b42717d7..a85f4874cba7 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -211,11 +211,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
         mr      r9,r13
         GET_PACA(r13)
         mfspr   r11,SPRN_SRR0
-        ld      r12,PACAKBASE(r13)
-        ld      r10,PACAKMSR(r13)
-        LOAD_HANDLER(r12, system_call_entry)
-        mtspr   SPRN_SRR0,r12
         mfspr   r12,SPRN_SRR1
+        ld      r10,PACAKBASE(r13)
+        LOAD_HANDLER(r10, system_call_entry)
+        mtspr   SPRN_SRR0,r10
+        ld      r10,PACAKMSR(r13)
         mtspr   SPRN_SRR1,r10
         rfid
         b       .       /* prevent speculative execution */