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authorScott Wood <scottwood@freescale.com>2014-09-19 16:20:36 -0400
committerScott Wood <scottwood@freescale.com>2014-09-19 16:20:42 -0400
commitcb0446c1b625326682ec4f9d1dd10779433646bc (patch)
tree9579440c40470de0686518ad274487fb5b41005c /arch/powerpc/sysdev
parent6db35ad2373eed5deb3b105ae7c1e9de3e34ae94 (diff)
Revert "powerpc/fsl_msi: spread msi ints across different MSIRs"
This reverts commit c822e73731fce3b49a4887140878d084d8a44c08. This commit conflicted with a bitmap allocator change that partially accomplishes the same thing, but which does so more correctly. Revert this one until it can be respun on top of the correct change. Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r--arch/powerpc/sysdev/fsl_msi.c31
-rw-r--r--arch/powerpc/sysdev/fsl_msi.h5
-rw-r--r--arch/powerpc/sysdev/msi_bitmap.c25
3 files changed, 11 insertions, 50 deletions
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 37254eff7324..e2ee226464f8 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -213,8 +213,6 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
213 * available interrupt. 213 * available interrupt.
214 */ 214 */
215 list_for_each_entry(msi_data, &msi_head, list) { 215 list_for_each_entry(msi_data, &msi_head, list) {
216 int off;
217
218 /* 216 /*
219 * If the PCI node has an fsl,msi property, then we 217 * If the PCI node has an fsl,msi property, then we
220 * restrict our search to the corresponding MSI node. 218 * restrict our search to the corresponding MSI node.
@@ -226,28 +224,7 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
226 if (phandle && (phandle != msi_data->phandle)) 224 if (phandle && (phandle != msi_data->phandle))
227 continue; 225 continue;
228 226
229 /* 227 hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
230 * Allocate the msi message so that it fits on distinct
231 * MSIR registers. Obviously, since MSIR registers are
232 * limited they will overlap at one point.
233 *
234 * Due to the format of the newly introduced MSIIR1 in
235 * mpic 4.3, consecutive msi message values map to
236 * distinct MSIRs, thus distinct msi irq cascades, so
237 * nothing special needs to be done in this case.
238 * On older mpic versions the chose distinct SRS
239 * values by aligning the msi message value to the
240 * SRS field shift.
241 */
242 if (msi_data->feature & FSL_PIC_FTR_MPIC_4_3) {
243 off = 0;
244 } else {
245 off = atomic_inc_return(&msi_data->msi_alloc_cnt) %
246 msi_data->msir_num;
247 off <<= msi_data->srs_shift;
248 }
249 hwirq = msi_bitmap_alloc_hwirqs_from_offset(
250 &msi_data->bitmap, off, 1);
251 if (hwirq >= 0) 228 if (hwirq >= 0)
252 break; 229 break;
253 } 230 }
@@ -487,17 +464,12 @@ static int fsl_of_msi_probe(struct platform_device *dev)
487 goto error_out; 464 goto error_out;
488 } 465 }
489 466
490 atomic_set(&msi->msi_alloc_cnt, -1);
491
492 p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len); 467 p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
493 468
494 if (of_device_is_compatible(dev->dev.of_node, "fsl,mpic-msi-v4.3") || 469 if (of_device_is_compatible(dev->dev.of_node, "fsl,mpic-msi-v4.3") ||
495 of_device_is_compatible(dev->dev.of_node, "fsl,vmpic-msi-v4.3")) { 470 of_device_is_compatible(dev->dev.of_node, "fsl,vmpic-msi-v4.3")) {
496 msi->srs_shift = MSIIR1_SRS_SHIFT; 471 msi->srs_shift = MSIIR1_SRS_SHIFT;
497 msi->ibs_shift = MSIIR1_IBS_SHIFT; 472 msi->ibs_shift = MSIIR1_IBS_SHIFT;
498 msi->msir_num = NR_MSI_REG_MSIIR1;
499 msi->feature |= FSL_PIC_FTR_MPIC_4_3;
500
501 if (p) 473 if (p)
502 dev_warn(&dev->dev, "%s: dose not support msi-available-ranges property\n", 474 dev_warn(&dev->dev, "%s: dose not support msi-available-ranges property\n",
503 __func__); 475 __func__);
@@ -515,7 +487,6 @@ static int fsl_of_msi_probe(struct platform_device *dev)
515 487
516 msi->srs_shift = MSIIR_SRS_SHIFT; 488 msi->srs_shift = MSIIR_SRS_SHIFT;
517 msi->ibs_shift = MSIIR_IBS_SHIFT; 489 msi->ibs_shift = MSIIR_IBS_SHIFT;
518 msi->msir_num = NR_MSI_REG_MSIIR;
519 490
520 if (p && len % (2 * sizeof(u32)) != 0) { 491 if (p && len % (2 * sizeof(u32)) != 0) {
521 dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n", 492 dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n",
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
index 50ec4b04c732..420cfcbdac01 100644
--- a/arch/powerpc/sysdev/fsl_msi.h
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -15,7 +15,6 @@
15 15
16#include <linux/of.h> 16#include <linux/of.h>
17#include <asm/msi_bitmap.h> 17#include <asm/msi_bitmap.h>
18#include <asm/atomic.h>
19 18
20#define NR_MSI_REG_MSIIR 8 /* MSIIR can index 8 MSI registers */ 19#define NR_MSI_REG_MSIIR 8 /* MSIIR can index 8 MSI registers */
21#define NR_MSI_REG_MSIIR1 16 /* MSIIR1 can index 16 MSI registers */ 20#define NR_MSI_REG_MSIIR1 16 /* MSIIR1 can index 16 MSI registers */
@@ -28,8 +27,6 @@
28#define FSL_PIC_IP_IPIC 0x00000002 27#define FSL_PIC_IP_IPIC 0x00000002
29#define FSL_PIC_IP_VMPIC 0x00000003 28#define FSL_PIC_IP_VMPIC 0x00000003
30 29
31#define FSL_PIC_FTR_MPIC_4_3 0x00000010
32
33struct fsl_msi_cascade_data; 30struct fsl_msi_cascade_data;
34 31
35struct fsl_msi { 32struct fsl_msi {
@@ -40,8 +37,6 @@ struct fsl_msi {
40 u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */ 37 u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */
41 u32 ibs_shift; /* Shift of interrupt bit select */ 38 u32 ibs_shift; /* Shift of interrupt bit select */
42 u32 srs_shift; /* Shift of the shared interrupt register select */ 39 u32 srs_shift; /* Shift of the shared interrupt register select */
43 u32 msir_num; /* Number of available MSIR regs */
44 atomic_t msi_alloc_cnt; /* Counter for MSI hwirq allocations */
45 void __iomem *msi_regs; 40 void __iomem *msi_regs;
46 u32 feature; 41 u32 feature;
47 struct fsl_msi_cascade_data *cascade_array[NR_MSI_REG_MAX]; 42 struct fsl_msi_cascade_data *cascade_array[NR_MSI_REG_MAX];
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
index 8b7d8fc2b120..2ff630267e9e 100644
--- a/arch/powerpc/sysdev/msi_bitmap.c
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -14,28 +14,23 @@
14#include <asm/msi_bitmap.h> 14#include <asm/msi_bitmap.h>
15#include <asm/setup.h> 15#include <asm/setup.h>
16 16
17int msi_bitmap_alloc_hwirqs_from_offset(struct msi_bitmap *bmp, int offset, 17int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num)
18 int num)
19{ 18{
20 unsigned long flags; 19 unsigned long flags;
21 int index; 20 int offset, order = get_count_order(num);
22 int order = get_count_order(num);
23 21
24 spin_lock_irqsave(&bmp->lock, flags); 22 spin_lock_irqsave(&bmp->lock, flags);
25 index = bitmap_find_next_zero_area(bmp->bitmap, bmp->irq_count, 23 /*
26 offset, num, (1 << order) - 1); 24 * This is fast, but stricter than we need. We might want to add
27 bitmap_set(bmp->bitmap, index, num); 25 * a fallback routine which does a linear search with no alignment.
26 */
27 offset = bitmap_find_free_region(bmp->bitmap, bmp->irq_count, order);
28 spin_unlock_irqrestore(&bmp->lock, flags); 28 spin_unlock_irqrestore(&bmp->lock, flags);
29 29
30 pr_debug("msi_bitmap: found %d free bits starting from offset %d at index %d\n", 30 pr_debug("msi_bitmap: allocated 0x%x (2^%d) at offset 0x%x\n",
31 num, offset, index); 31 num, order, offset);
32
33 return index;
34}
35 32
36int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num) 33 return offset;
37{
38 return msi_bitmap_alloc_hwirqs_from_offset(bmp, 0, num);
39} 34}
40 35
41void msi_bitmap_free_hwirqs(struct msi_bitmap *bmp, unsigned int offset, 36void msi_bitmap_free_hwirqs(struct msi_bitmap *bmp, unsigned int offset,