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authorMilton Miller <miltonm@bga.com>2011-05-10 15:29:39 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-05-19 01:31:03 -0400
commit23d72bfd8f9f24aa9efafed3586a99f5669c23d7 (patch)
treef8fbd87c64de43c1d85a830f1f3342818414764a /arch/powerpc/sysdev
parent17f9c8a73bac2c7dfe28a520516ea6b8bbbe977e (diff)
powerpc: Consolidate ipi message mux and demux
Consolidate the mux and demux of ipi messages into smp.c and call a new smp_ops callback to actually trigger the ipi. The powerpc architecture code is optimised for having 4 distinct ipi triggers, which are mapped to 4 distinct messages (ipi many, ipi single, scheduler ipi, and enter debugger). However, several interrupt controllers only provide a single software triggered interrupt that can be delivered to each cpu. To resolve this limitation, each smp_ops implementation created a per-cpu variable that is manipulated with atomic bitops. Since these lines will be contended they are optimialy marked as shared_aligned and take a full cache line for each cpu. Distro kernels may have 2 or 3 of these in their config, each taking per-cpu space even though at most one will be in use. This consolidation removes smp_message_recv and replaces the single call actions cases with direct calls from the common message recognition loop. The complicated debugger ipi case with its muxed crash handling code is moved to debug_ipi_action which is now called from the demux code (instead of the multi-message action calling smp_message_recv). I put a call to reschedule_action to increase the likelyhood of correctly merging the anticipated scheduler_ipi() hook coming from the scheduler tree; that single required call can be inlined later. The actual message decode is a copy of the old pseries xics code with its memory barriers and cache line spacing, augmented with a per-cpu unsigned long based on the book-e doorbell code. The optional data is set via a callback from the implementation and is passed to the new cause-ipi hook along with the logical cpu number. While currently only the doorbell implemntation uses this data it should be almost zero cost to retrieve and pass it -- it adds a single register load for the argument from the same cache line to which we just completed a store and the register is dead on return from the call. I extended the data element from unsigned int to unsigned long in case some other code wanted to associate a pointer. The doorbell check_self is replaced by a call to smp_muxed_ipi_resend, conditioned on the CPU_DBELL feature. The ifdef guard could be relaxed to CONFIG_SMP but I left it with BOOKE for now. Also, the doorbell interrupt vector for book-e was not calling irq_enter and irq_exit, which throws off cpu accounting and causes code to not realize it is running in interrupt context. Add the missing calls. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r--arch/powerpc/sysdev/xics/icp-hv.c10
-rw-r--r--arch/powerpc/sysdev/xics/icp-native.c10
-rw-r--r--arch/powerpc/sysdev/xics/xics-common.c30
3 files changed, 8 insertions, 42 deletions
diff --git a/arch/powerpc/sysdev/xics/icp-hv.c b/arch/powerpc/sysdev/xics/icp-hv.c
index 234764c189a4..9518d367a64f 100644
--- a/arch/powerpc/sysdev/xics/icp-hv.c
+++ b/arch/powerpc/sysdev/xics/icp-hv.c
@@ -118,12 +118,8 @@ static void icp_hv_set_cpu_priority(unsigned char cppr)
118 118
119#ifdef CONFIG_SMP 119#ifdef CONFIG_SMP
120 120
121static void icp_hv_message_pass(int cpu, int msg) 121static void icp_hv_cause_ipi(int cpu, unsigned long data)
122{ 122{
123 unsigned long *tgt = &per_cpu(xics_ipi_message, cpu);
124
125 set_bit(msg, tgt);
126 mb();
127 icp_hv_set_qirr(cpu, IPI_PRIORITY); 123 icp_hv_set_qirr(cpu, IPI_PRIORITY);
128} 124}
129 125
@@ -133,7 +129,7 @@ static irqreturn_t icp_hv_ipi_action(int irq, void *dev_id)
133 129
134 icp_hv_set_qirr(cpu, 0xff); 130 icp_hv_set_qirr(cpu, 0xff);
135 131
136 return xics_ipi_dispatch(cpu); 132 return smp_ipi_demux();
137} 133}
138 134
139#endif /* CONFIG_SMP */ 135#endif /* CONFIG_SMP */
@@ -146,7 +142,7 @@ static const struct icp_ops icp_hv_ops = {
146 .flush_ipi = icp_hv_flush_ipi, 142 .flush_ipi = icp_hv_flush_ipi,
147#ifdef CONFIG_SMP 143#ifdef CONFIG_SMP
148 .ipi_action = icp_hv_ipi_action, 144 .ipi_action = icp_hv_ipi_action,
149 .message_pass = icp_hv_message_pass, 145 .cause_ipi = icp_hv_cause_ipi,
150#endif 146#endif
151}; 147};
152 148
diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c
index 246500eefbfd..1f15ad436140 100644
--- a/arch/powerpc/sysdev/xics/icp-native.c
+++ b/arch/powerpc/sysdev/xics/icp-native.c
@@ -134,12 +134,8 @@ static unsigned int icp_native_get_irq(void)
134 134
135#ifdef CONFIG_SMP 135#ifdef CONFIG_SMP
136 136
137static void icp_native_message_pass(int cpu, int msg) 137static void icp_native_cause_ipi(int cpu, unsigned long data)
138{ 138{
139 unsigned long *tgt = &per_cpu(xics_ipi_message, cpu);
140
141 set_bit(msg, tgt);
142 mb();
143 icp_native_set_qirr(cpu, IPI_PRIORITY); 139 icp_native_set_qirr(cpu, IPI_PRIORITY);
144} 140}
145 141
@@ -149,7 +145,7 @@ static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
149 145
150 icp_native_set_qirr(cpu, 0xff); 146 icp_native_set_qirr(cpu, 0xff);
151 147
152 return xics_ipi_dispatch(cpu); 148 return smp_ipi_demux();
153} 149}
154 150
155#endif /* CONFIG_SMP */ 151#endif /* CONFIG_SMP */
@@ -267,7 +263,7 @@ static const struct icp_ops icp_native_ops = {
267 .flush_ipi = icp_native_flush_ipi, 263 .flush_ipi = icp_native_flush_ipi,
268#ifdef CONFIG_SMP 264#ifdef CONFIG_SMP
269 .ipi_action = icp_native_ipi_action, 265 .ipi_action = icp_native_ipi_action,
270 .message_pass = icp_native_message_pass, 266 .cause_ipi = icp_native_cause_ipi,
271#endif 267#endif
272}; 268};
273 269
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index a0576b705ddd..a31a7103218f 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -126,32 +126,6 @@ void xics_mask_unknown_vec(unsigned int vec)
126 126
127#ifdef CONFIG_SMP 127#ifdef CONFIG_SMP
128 128
129DEFINE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message);
130
131irqreturn_t xics_ipi_dispatch(int cpu)
132{
133 unsigned long *tgt = &per_cpu(xics_ipi_message, cpu);
134
135 mb(); /* order mmio clearing qirr */
136 while (*tgt) {
137 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION, tgt)) {
138 smp_message_recv(PPC_MSG_CALL_FUNCTION);
139 }
140 if (test_and_clear_bit(PPC_MSG_RESCHEDULE, tgt)) {
141 smp_message_recv(PPC_MSG_RESCHEDULE);
142 }
143 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE, tgt)) {
144 smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
145 }
146#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
147 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, tgt)) {
148 smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
149 }
150#endif
151 }
152 return IRQ_HANDLED;
153}
154
155static void xics_request_ipi(void) 129static void xics_request_ipi(void)
156{ 130{
157 unsigned int ipi; 131 unsigned int ipi;
@@ -170,8 +144,8 @@ static void xics_request_ipi(void)
170 144
171int __init xics_smp_probe(void) 145int __init xics_smp_probe(void)
172{ 146{
173 /* Setup message_pass callback based on which ICP is used */ 147 /* Setup cause_ipi callback based on which ICP is used */
174 smp_ops->message_pass = icp_ops->message_pass; 148 smp_ops->cause_ipi = icp_ops->cause_ipi;
175 149
176 /* Register all the IPIs */ 150 /* Register all the IPIs */
177 xics_request_ipi(); 151 xics_request_ipi();