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authorGrant Likely <grant.likely@secretlab.ca>2010-01-28 16:38:25 -0500
committerGrant Likely <grant.likely@secretlab.ca>2010-01-28 16:38:25 -0500
commit0ada0a73120c28cc432bcdbac061781465c2f48f (patch)
treed17cadd4ea47e25d9e48e7d409a39c84268fbd27 /arch/powerpc/sysdev
parent6016a363f6b56b46b24655bcfc0499b715851cf3 (diff)
parent92dcffb916d309aa01778bf8963a6932e4014d07 (diff)
Merge commit 'v2.6.33-rc5' into secretlab/test-devicetree
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r--arch/powerpc/sysdev/Makefile1
-rw-r--r--arch/powerpc/sysdev/cpm1.c4
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.c42
-rw-r--r--arch/powerpc/sysdev/cpm_common.c5
-rw-r--r--arch/powerpc/sysdev/dart_iommu.c2
-rw-r--r--arch/powerpc/sysdev/fsl_msi.c8
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c26
-rw-r--r--arch/powerpc/sysdev/fsl_pmc.c88
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c2
-rw-r--r--arch/powerpc/sysdev/i8259.c8
-rw-r--r--arch/powerpc/sysdev/ipic.c8
-rw-r--r--arch/powerpc/sysdev/mpc8xx_pic.c6
-rw-r--r--arch/powerpc/sysdev/mpc8xxx_gpio.c21
-rw-r--r--arch/powerpc/sysdev/mpic.c43
-rw-r--r--arch/powerpc/sysdev/mpic_msi.c11
-rw-r--r--arch/powerpc/sysdev/mpic_pasemi_msi.c2
-rw-r--r--arch/powerpc/sysdev/mpic_u3msi.c48
-rw-r--r--arch/powerpc/sysdev/mv64x60_pic.c2
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c61
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_ic.c8
-rw-r--r--arch/powerpc/sysdev/tsi108_pci.c6
-rw-r--r--arch/powerpc/sysdev/uic.c18
-rw-r--r--arch/powerpc/sysdev/xilinx_intc.c8
23 files changed, 315 insertions, 113 deletions
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 9d4b17462f13..5642924fb9fb 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o
16obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o 16obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
17obj-$(CONFIG_FSL_SOC) += fsl_soc.o 17obj-$(CONFIG_FSL_SOC) += fsl_soc.o
18obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y) 18obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
19obj-$(CONFIG_FSL_PMC) += fsl_pmc.o
19obj-$(CONFIG_FSL_LBC) += fsl_lbc.o 20obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
20obj-$(CONFIG_FSL_GTM) += fsl_gtm.o 21obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
21obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o 22obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 82424cd7e128..a4b41dbde128 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -77,7 +77,7 @@ static void cpm_end_irq(unsigned int irq)
77} 77}
78 78
79static struct irq_chip cpm_pic = { 79static struct irq_chip cpm_pic = {
80 .typename = " CPM PIC ", 80 .name = " CPM PIC ",
81 .mask = cpm_mask_irq, 81 .mask = cpm_mask_irq,
82 .unmask = cpm_unmask_irq, 82 .unmask = cpm_unmask_irq,
83 .eoi = cpm_end_irq, 83 .eoi = cpm_end_irq,
@@ -102,7 +102,7 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
102{ 102{
103 pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw); 103 pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw);
104 104
105 get_irq_desc(virq)->status |= IRQ_LEVEL; 105 irq_to_desc(virq)->status |= IRQ_LEVEL;
106 set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq); 106 set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq);
107 return 0; 107 return 0;
108} 108}
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index 78f1f7cca0a0..1709ac5aac7c 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -115,11 +115,13 @@ static void cpm2_ack(unsigned int virq)
115 115
116static void cpm2_end_irq(unsigned int virq) 116static void cpm2_end_irq(unsigned int virq)
117{ 117{
118 struct irq_desc *desc;
118 int bit, word; 119 int bit, word;
119 unsigned int irq_nr = virq_to_hw(virq); 120 unsigned int irq_nr = virq_to_hw(virq);
120 121
121 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) 122 desc = irq_to_desc(irq_nr);
122 && irq_desc[irq_nr].action) { 123 if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))
124 && desc->action) {
123 125
124 bit = irq_to_siubit[irq_nr]; 126 bit = irq_to_siubit[irq_nr];
125 word = irq_to_siureg[irq_nr]; 127 word = irq_to_siureg[irq_nr];
@@ -138,16 +140,26 @@ static void cpm2_end_irq(unsigned int virq)
138static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type) 140static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
139{ 141{
140 unsigned int src = virq_to_hw(virq); 142 unsigned int src = virq_to_hw(virq);
141 struct irq_desc *desc = get_irq_desc(virq); 143 struct irq_desc *desc = irq_to_desc(virq);
142 unsigned int vold, vnew, edibit; 144 unsigned int vold, vnew, edibit;
143 145
144 if (flow_type == IRQ_TYPE_NONE) 146 /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or
145 flow_type = IRQ_TYPE_LEVEL_LOW; 147 * IRQ_TYPE_EDGE_BOTH (default). All others are IRQ_TYPE_EDGE_FALLING
146 148 * or IRQ_TYPE_LEVEL_LOW (default)
147 if (flow_type & IRQ_TYPE_EDGE_RISING) { 149 */
148 printk(KERN_ERR "CPM2 PIC: sense type 0x%x not supported\n", 150 if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0) {
149 flow_type); 151 if (flow_type == IRQ_TYPE_NONE)
150 return -EINVAL; 152 flow_type = IRQ_TYPE_EDGE_BOTH;
153
154 if (flow_type != IRQ_TYPE_EDGE_BOTH &&
155 flow_type != IRQ_TYPE_EDGE_FALLING)
156 goto err_sense;
157 } else {
158 if (flow_type == IRQ_TYPE_NONE)
159 flow_type = IRQ_TYPE_LEVEL_LOW;
160
161 if (flow_type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH))
162 goto err_sense;
151 } 163 }
152 164
153 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); 165 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
@@ -179,10 +191,14 @@ static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
179 if (vold != vnew) 191 if (vold != vnew)
180 out_be32(&cpm2_intctl->ic_siexr, vnew); 192 out_be32(&cpm2_intctl->ic_siexr, vnew);
181 return 0; 193 return 0;
194
195err_sense:
196 pr_err("CPM2 PIC: sense type 0x%x not supported\n", flow_type);
197 return -EINVAL;
182} 198}
183 199
184static struct irq_chip cpm2_pic = { 200static struct irq_chip cpm2_pic = {
185 .typename = " CPM2 SIU ", 201 .name = " CPM2 SIU ",
186 .mask = cpm2_mask_irq, 202 .mask = cpm2_mask_irq,
187 .unmask = cpm2_unmask_irq, 203 .unmask = cpm2_unmask_irq,
188 .ack = cpm2_ack, 204 .ack = cpm2_ack,
@@ -210,13 +226,13 @@ static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq,
210{ 226{
211 pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw); 227 pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw);
212 228
213 get_irq_desc(virq)->status |= IRQ_LEVEL; 229 irq_to_desc(virq)->status |= IRQ_LEVEL;
214 set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq); 230 set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq);
215 return 0; 231 return 0;
216} 232}
217 233
218static int cpm2_pic_host_xlate(struct irq_host *h, struct device_node *ct, 234static int cpm2_pic_host_xlate(struct irq_host *h, struct device_node *ct,
219 u32 *intspec, unsigned int intsize, 235 const u32 *intspec, unsigned int intsize,
220 irq_hw_number_t *out_hwirq, unsigned int *out_flags) 236 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
221{ 237{
222 *out_hwirq = intspec[0]; 238 *out_hwirq = intspec[0];
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index e4b6d66d93de..9de72c96e6d1 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -72,7 +72,7 @@ static phys_addr_t muram_pbase;
72/* Max address size we deal with */ 72/* Max address size we deal with */
73#define OF_MAX_ADDR_CELLS 4 73#define OF_MAX_ADDR_CELLS 4
74 74
75int __init cpm_muram_init(void) 75int cpm_muram_init(void)
76{ 76{
77 struct device_node *np; 77 struct device_node *np;
78 struct resource r; 78 struct resource r;
@@ -81,6 +81,9 @@ int __init cpm_muram_init(void)
81 int i = 0; 81 int i = 0;
82 int ret = 0; 82 int ret = 0;
83 83
84 if (muram_pbase)
85 return 0;
86
84 spin_lock_init(&cpm_muram_lock); 87 spin_lock_init(&cpm_muram_lock);
85 /* initialize the info header */ 88 /* initialize the info header */
86 rh_init(&cpm_muram_info, 1, 89 rh_init(&cpm_muram_info, 1,
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index ae3c4db86fe8..bafc3f85360d 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -160,7 +160,7 @@ static int dart_build(struct iommu_table *tbl, long index,
160 160
161 dp = ((unsigned int*)tbl->it_base) + index; 161 dp = ((unsigned int*)tbl->it_base) + index;
162 162
163 /* On U3, all memory is contigous, so we can move this 163 /* On U3, all memory is contiguous, so we can move this
164 * out of the loop. 164 * out of the loop.
165 */ 165 */
166 l = npages; 166 l = npages;
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index da38a1ff97bb..c6e11b077108 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -47,7 +47,7 @@ static struct irq_chip fsl_msi_chip = {
47 .mask = mask_msi_irq, 47 .mask = mask_msi_irq,
48 .unmask = unmask_msi_irq, 48 .unmask = unmask_msi_irq,
49 .ack = fsl_msi_end_irq, 49 .ack = fsl_msi_end_irq,
50 .typename = " FSL-MSI ", 50 .name = " FSL-MSI ",
51}; 51};
52 52
53static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, 53static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
@@ -55,7 +55,7 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
55{ 55{
56 struct irq_chip *chip = &fsl_msi_chip; 56 struct irq_chip *chip = &fsl_msi_chip;
57 57
58 get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; 58 irq_to_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
59 59
60 set_irq_chip_and_handler(virq, chip, handle_edge_irq); 60 set_irq_chip_and_handler(virq, chip, handle_edge_irq);
61 61
@@ -173,7 +173,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
173 u32 intr_index; 173 u32 intr_index;
174 u32 have_shift = 0; 174 u32 have_shift = 0;
175 175
176 spin_lock(&desc->lock); 176 raw_spin_lock(&desc->lock);
177 if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { 177 if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
178 if (desc->chip->mask_ack) 178 if (desc->chip->mask_ack)
179 desc->chip->mask_ack(irq); 179 desc->chip->mask_ack(irq);
@@ -225,7 +225,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
225 break; 225 break;
226 } 226 }
227unlock: 227unlock:
228 spin_unlock(&desc->lock); 228 raw_spin_unlock(&desc->lock);
229} 229}
230 230
231static int __devinit fsl_of_msi_probe(struct of_device *dev, 231static int __devinit fsl_of_msi_probe(struct of_device *dev,
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index ae88b1448018..e1a028c1f18d 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -56,7 +56,7 @@ static int __init fsl_pcie_check_link(struct pci_controller *hose)
56 return 0; 56 return 0;
57} 57}
58 58
59#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) 59#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
60static int __init setup_one_atmu(struct ccsr_pci __iomem *pci, 60static int __init setup_one_atmu(struct ccsr_pci __iomem *pci,
61 unsigned int index, const struct resource *res, 61 unsigned int index, const struct resource *res,
62 resource_size_t offset) 62 resource_size_t offset)
@@ -392,9 +392,23 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header);
392DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header); 392DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header);
393DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header); 393DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
394DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); 394DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
395DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1011E, quirk_fsl_pcie_header);
396DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1011, quirk_fsl_pcie_header);
397DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1013E, quirk_fsl_pcie_header);
398DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1013, quirk_fsl_pcie_header);
399DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1020E, quirk_fsl_pcie_header);
400DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1020, quirk_fsl_pcie_header);
401DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1022E, quirk_fsl_pcie_header);
402DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1022, quirk_fsl_pcie_header);
403DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2010E, quirk_fsl_pcie_header);
404DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2010, quirk_fsl_pcie_header);
395DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020E, quirk_fsl_pcie_header); 405DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020E, quirk_fsl_pcie_header);
396DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020, quirk_fsl_pcie_header); 406DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020, quirk_fsl_pcie_header);
397#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ 407DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4040E, quirk_fsl_pcie_header);
408DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4040, quirk_fsl_pcie_header);
409DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4080E, quirk_fsl_pcie_header);
410DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4080, quirk_fsl_pcie_header);
411#endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */
398 412
399#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) 413#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
400DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header); 414DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header);
@@ -450,8 +464,7 @@ static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus,
450{ 464{
451 struct pci_controller *hose = pci_bus_to_host(bus); 465 struct pci_controller *hose = pci_bus_to_host(bus);
452 struct mpc83xx_pcie_priv *pcie = hose->dn->data; 466 struct mpc83xx_pcie_priv *pcie = hose->dn->data;
453 u8 bus_no = bus->number - hose->first_busno; 467 u32 dev_base = bus->number << 24 | devfn << 16;
454 u32 dev_base = bus_no << 24 | devfn << 16;
455 int ret; 468 int ret;
456 469
457 ret = mpc83xx_pcie_exclude_device(bus, devfn); 470 ret = mpc83xx_pcie_exclude_device(bus, devfn);
@@ -501,12 +514,17 @@ static int mpc83xx_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
501static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn, 514static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
502 int offset, int len, u32 val) 515 int offset, int len, u32 val)
503{ 516{
517 struct pci_controller *hose = pci_bus_to_host(bus);
504 void __iomem *cfg_addr; 518 void __iomem *cfg_addr;
505 519
506 cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset); 520 cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset);
507 if (!cfg_addr) 521 if (!cfg_addr)
508 return PCIBIOS_DEVICE_NOT_FOUND; 522 return PCIBIOS_DEVICE_NOT_FOUND;
509 523
524 /* PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS */
525 if (offset == PCI_PRIMARY_BUS && bus->number == hose->first_busno)
526 val &= 0xffffff00;
527
510 switch (len) { 528 switch (len) {
511 case 1: 529 case 1:
512 out_8(cfg_addr, val); 530 out_8(cfg_addr, val);
diff --git a/arch/powerpc/sysdev/fsl_pmc.c b/arch/powerpc/sysdev/fsl_pmc.c
new file mode 100644
index 000000000000..a7635a993dca
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_pmc.c
@@ -0,0 +1,88 @@
1/*
2 * Suspend/resume support
3 *
4 * Copyright 2009 MontaVista Software, Inc.
5 *
6 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/init.h>
15#include <linux/types.h>
16#include <linux/errno.h>
17#include <linux/suspend.h>
18#include <linux/delay.h>
19#include <linux/device.h>
20#include <linux/of_platform.h>
21
22struct pmc_regs {
23 __be32 devdisr;
24 __be32 devdisr2;
25 __be32 :32;
26 __be32 :32;
27 __be32 pmcsr;
28#define PMCSR_SLP (1 << 17)
29};
30
31static struct device *pmc_dev;
32static struct pmc_regs __iomem *pmc_regs;
33
34static int pmc_suspend_enter(suspend_state_t state)
35{
36 int ret;
37
38 setbits32(&pmc_regs->pmcsr, PMCSR_SLP);
39 /* At this point, the CPU is asleep. */
40
41 /* Upon resume, wait for SLP bit to be clear. */
42 ret = spin_event_timeout((in_be32(&pmc_regs->pmcsr) & PMCSR_SLP) == 0,
43 10000, 10) ? 0 : -ETIMEDOUT;
44 if (ret)
45 dev_err(pmc_dev, "tired waiting for SLP bit to clear\n");
46 return ret;
47}
48
49static int pmc_suspend_valid(suspend_state_t state)
50{
51 if (state != PM_SUSPEND_STANDBY)
52 return 0;
53 return 1;
54}
55
56static struct platform_suspend_ops pmc_suspend_ops = {
57 .valid = pmc_suspend_valid,
58 .enter = pmc_suspend_enter,
59};
60
61static int pmc_probe(struct of_device *ofdev, const struct of_device_id *id)
62{
63 pmc_regs = of_iomap(ofdev->node, 0);
64 if (!pmc_regs)
65 return -ENOMEM;
66
67 pmc_dev = &ofdev->dev;
68 suspend_set_ops(&pmc_suspend_ops);
69 return 0;
70}
71
72static const struct of_device_id pmc_ids[] = {
73 { .compatible = "fsl,mpc8548-pmc", },
74 { .compatible = "fsl,mpc8641d-pmc", },
75 { },
76};
77
78static struct of_platform_driver pmc_driver = {
79 .driver.name = "fsl-pmc",
80 .match_table = pmc_ids,
81 .probe = pmc_probe,
82};
83
84static int __init pmc_init(void)
85{
86 return of_register_platform_driver(&pmc_driver);
87}
88device_initcall(pmc_init);
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index adca4affcf1f..b91f7acdda6f 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -372,7 +372,7 @@ err:
372 372
373arch_initcall(fsl_usb_of_init); 373arch_initcall(fsl_usb_of_init);
374 374
375#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) 375#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
376static __be32 __iomem *rstcr; 376static __be32 __iomem *rstcr;
377 377
378static int __init setup_rstcr(void) 378static int __init setup_rstcr(void)
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
index a96584ab33dd..0a55db8a5a29 100644
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -135,7 +135,7 @@ static void i8259_unmask_irq(unsigned int irq_nr)
135} 135}
136 136
137static struct irq_chip i8259_pic = { 137static struct irq_chip i8259_pic = {
138 .typename = " i8259 ", 138 .name = " i8259 ",
139 .mask = i8259_mask_irq, 139 .mask = i8259_mask_irq,
140 .disable = i8259_mask_irq, 140 .disable = i8259_mask_irq,
141 .unmask = i8259_unmask_irq, 141 .unmask = i8259_unmask_irq,
@@ -175,12 +175,12 @@ static int i8259_host_map(struct irq_host *h, unsigned int virq,
175 175
176 /* We block the internal cascade */ 176 /* We block the internal cascade */
177 if (hw == 2) 177 if (hw == 2)
178 get_irq_desc(virq)->status |= IRQ_NOREQUEST; 178 irq_to_desc(virq)->status |= IRQ_NOREQUEST;
179 179
180 /* We use the level handler only for now, we might want to 180 /* We use the level handler only for now, we might want to
181 * be more cautious here but that works for now 181 * be more cautious here but that works for now
182 */ 182 */
183 get_irq_desc(virq)->status |= IRQ_LEVEL; 183 irq_to_desc(virq)->status |= IRQ_LEVEL;
184 set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq); 184 set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq);
185 return 0; 185 return 0;
186} 186}
@@ -198,7 +198,7 @@ static void i8259_host_unmap(struct irq_host *h, unsigned int virq)
198} 198}
199 199
200static int i8259_host_xlate(struct irq_host *h, struct device_node *ct, 200static int i8259_host_xlate(struct irq_host *h, struct device_node *ct,
201 u32 *intspec, unsigned int intsize, 201 const u32 *intspec, unsigned int intsize,
202 irq_hw_number_t *out_hwirq, unsigned int *out_flags) 202 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
203{ 203{
204 static unsigned char map_isa_senses[4] = { 204 static unsigned char map_isa_senses[4] = {
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index cb7689c4bfbd..28cdddd2f89e 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -605,7 +605,7 @@ static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type)
605{ 605{
606 struct ipic *ipic = ipic_from_irq(virq); 606 struct ipic *ipic = ipic_from_irq(virq);
607 unsigned int src = ipic_irq_to_hw(virq); 607 unsigned int src = ipic_irq_to_hw(virq);
608 struct irq_desc *desc = get_irq_desc(virq); 608 struct irq_desc *desc = irq_to_desc(virq);
609 unsigned int vold, vnew, edibit; 609 unsigned int vold, vnew, edibit;
610 610
611 if (flow_type == IRQ_TYPE_NONE) 611 if (flow_type == IRQ_TYPE_NONE)
@@ -660,7 +660,7 @@ static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type)
660 660
661/* level interrupts and edge interrupts have different ack operations */ 661/* level interrupts and edge interrupts have different ack operations */
662static struct irq_chip ipic_level_irq_chip = { 662static struct irq_chip ipic_level_irq_chip = {
663 .typename = " IPIC ", 663 .name = " IPIC ",
664 .unmask = ipic_unmask_irq, 664 .unmask = ipic_unmask_irq,
665 .mask = ipic_mask_irq, 665 .mask = ipic_mask_irq,
666 .mask_ack = ipic_mask_irq, 666 .mask_ack = ipic_mask_irq,
@@ -668,7 +668,7 @@ static struct irq_chip ipic_level_irq_chip = {
668}; 668};
669 669
670static struct irq_chip ipic_edge_irq_chip = { 670static struct irq_chip ipic_edge_irq_chip = {
671 .typename = " IPIC ", 671 .name = " IPIC ",
672 .unmask = ipic_unmask_irq, 672 .unmask = ipic_unmask_irq,
673 .mask = ipic_mask_irq, 673 .mask = ipic_mask_irq,
674 .mask_ack = ipic_mask_irq_and_ack, 674 .mask_ack = ipic_mask_irq_and_ack,
@@ -697,7 +697,7 @@ static int ipic_host_map(struct irq_host *h, unsigned int virq,
697} 697}
698 698
699static int ipic_host_xlate(struct irq_host *h, struct device_node *ct, 699static int ipic_host_xlate(struct irq_host *h, struct device_node *ct,
700 u32 *intspec, unsigned int intsize, 700 const u32 *intspec, unsigned int intsize,
701 irq_hw_number_t *out_hwirq, unsigned int *out_flags) 701 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
702 702
703{ 703{
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index 5d2d5522ef41..69bd6f4dff83 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -72,7 +72,7 @@ static void mpc8xx_end_irq(unsigned int virq)
72 72
73static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type) 73static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type)
74{ 74{
75 struct irq_desc *desc = get_irq_desc(virq); 75 struct irq_desc *desc = irq_to_desc(virq);
76 76
77 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); 77 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
78 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; 78 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
@@ -94,7 +94,7 @@ static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type)
94} 94}
95 95
96static struct irq_chip mpc8xx_pic = { 96static struct irq_chip mpc8xx_pic = {
97 .typename = " MPC8XX SIU ", 97 .name = " MPC8XX SIU ",
98 .unmask = mpc8xx_unmask_irq, 98 .unmask = mpc8xx_unmask_irq,
99 .mask = mpc8xx_mask_irq, 99 .mask = mpc8xx_mask_irq,
100 .ack = mpc8xx_ack, 100 .ack = mpc8xx_ack,
@@ -130,7 +130,7 @@ static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq,
130 130
131 131
132static int mpc8xx_pic_host_xlate(struct irq_host *h, struct device_node *ct, 132static int mpc8xx_pic_host_xlate(struct irq_host *h, struct device_node *ct,
133 u32 *intspec, unsigned int intsize, 133 const u32 *intspec, unsigned int intsize,
134 irq_hw_number_t *out_hwirq, unsigned int *out_flags) 134 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
135{ 135{
136 static unsigned char map_pic_senses[4] = { 136 static unsigned char map_pic_senses[4] = {
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c
index 103eace36194..ee1c0e1cf4a7 100644
--- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -54,6 +54,22 @@ static void mpc8xxx_gpio_save_regs(struct of_mm_gpio_chip *mm)
54 mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT); 54 mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT);
55} 55}
56 56
57/* Workaround GPIO 1 errata on MPC8572/MPC8536. The status of GPIOs
58 * defined as output cannot be determined by reading GPDAT register,
59 * so we use shadow data register instead. The status of input pins
60 * is determined by reading GPDAT register.
61 */
62static int mpc8572_gpio_get(struct gpio_chip *gc, unsigned int gpio)
63{
64 u32 val;
65 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
66 struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
67
68 val = in_be32(mm->regs + GPIO_DAT) & ~in_be32(mm->regs + GPIO_DIR);
69
70 return (val | mpc8xxx_gc->data) & mpc8xxx_gpio2mask(gpio);
71}
72
57static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio) 73static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio)
58{ 74{
59 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); 75 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
@@ -136,7 +152,10 @@ static void __init mpc8xxx_add_controller(struct device_node *np)
136 gc->ngpio = MPC8XXX_GPIO_PINS; 152 gc->ngpio = MPC8XXX_GPIO_PINS;
137 gc->direction_input = mpc8xxx_gpio_dir_in; 153 gc->direction_input = mpc8xxx_gpio_dir_in;
138 gc->direction_output = mpc8xxx_gpio_dir_out; 154 gc->direction_output = mpc8xxx_gpio_dir_out;
139 gc->get = mpc8xxx_gpio_get; 155 if (of_device_is_compatible(np, "fsl,mpc8572-gpio"))
156 gc->get = mpc8572_gpio_get;
157 else
158 gc->get = mpc8xxx_gpio_get;
140 gc->set = mpc8xxx_gpio_set; 159 gc->set = mpc8xxx_gpio_set;
141 160
142 ret = of_mm_gpiochip_add(np, mm_gc); 161 ret = of_mm_gpiochip_add(np, mm_gc);
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 30c44e6b0413..470dc6c11d57 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -567,13 +567,11 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic)
567#endif /* CONFIG_MPIC_U3_HT_IRQS */ 567#endif /* CONFIG_MPIC_U3_HT_IRQS */
568 568
569#ifdef CONFIG_SMP 569#ifdef CONFIG_SMP
570static int irq_choose_cpu(unsigned int virt_irq) 570static int irq_choose_cpu(const cpumask_t *mask)
571{ 571{
572 cpumask_t mask;
573 int cpuid; 572 int cpuid;
574 573
575 cpumask_copy(&mask, irq_desc[virt_irq].affinity); 574 if (cpumask_equal(mask, cpu_all_mask)) {
576 if (cpus_equal(mask, CPU_MASK_ALL)) {
577 static int irq_rover; 575 static int irq_rover;
578 static DEFINE_SPINLOCK(irq_rover_lock); 576 static DEFINE_SPINLOCK(irq_rover_lock);
579 unsigned long flags; 577 unsigned long flags;
@@ -594,20 +592,15 @@ static int irq_choose_cpu(unsigned int virt_irq)
594 592
595 spin_unlock_irqrestore(&irq_rover_lock, flags); 593 spin_unlock_irqrestore(&irq_rover_lock, flags);
596 } else { 594 } else {
597 cpumask_t tmp; 595 cpuid = cpumask_first_and(mask, cpu_online_mask);
598 596 if (cpuid >= nr_cpu_ids)
599 cpus_and(tmp, cpu_online_map, mask);
600
601 if (cpus_empty(tmp))
602 goto do_round_robin; 597 goto do_round_robin;
603
604 cpuid = first_cpu(tmp);
605 } 598 }
606 599
607 return get_hard_smp_processor_id(cpuid); 600 return get_hard_smp_processor_id(cpuid);
608} 601}
609#else 602#else
610static int irq_choose_cpu(unsigned int virt_irq) 603static int irq_choose_cpu(const cpumask_t *mask)
611{ 604{
612 return hard_smp_processor_id(); 605 return hard_smp_processor_id();
613} 606}
@@ -621,7 +614,7 @@ static struct mpic *mpic_find(unsigned int irq)
621 if (irq < NUM_ISA_INTERRUPTS) 614 if (irq < NUM_ISA_INTERRUPTS)
622 return NULL; 615 return NULL;
623 616
624 return irq_desc[irq].chip_data; 617 return irq_to_desc(irq)->chip_data;
625} 618}
626 619
627/* Determine if the linux irq is an IPI */ 620/* Determine if the linux irq is an IPI */
@@ -648,14 +641,14 @@ static inline u32 mpic_physmask(u32 cpumask)
648/* Get the mpic structure from the IPI number */ 641/* Get the mpic structure from the IPI number */
649static inline struct mpic * mpic_from_ipi(unsigned int ipi) 642static inline struct mpic * mpic_from_ipi(unsigned int ipi)
650{ 643{
651 return irq_desc[ipi].chip_data; 644 return irq_to_desc(ipi)->chip_data;
652} 645}
653#endif 646#endif
654 647
655/* Get the mpic structure from the irq number */ 648/* Get the mpic structure from the irq number */
656static inline struct mpic * mpic_from_irq(unsigned int irq) 649static inline struct mpic * mpic_from_irq(unsigned int irq)
657{ 650{
658 return irq_desc[irq].chip_data; 651 return irq_to_desc(irq)->chip_data;
659} 652}
660 653
661/* Send an EOI */ 654/* Send an EOI */
@@ -735,7 +728,7 @@ static void mpic_unmask_ht_irq(unsigned int irq)
735 728
736 mpic_unmask_irq(irq); 729 mpic_unmask_irq(irq);
737 730
738 if (irq_desc[irq].status & IRQ_LEVEL) 731 if (irq_to_desc(irq)->status & IRQ_LEVEL)
739 mpic_ht_end_irq(mpic, src); 732 mpic_ht_end_irq(mpic, src);
740} 733}
741 734
@@ -745,7 +738,7 @@ static unsigned int mpic_startup_ht_irq(unsigned int irq)
745 unsigned int src = mpic_irq_to_hw(irq); 738 unsigned int src = mpic_irq_to_hw(irq);
746 739
747 mpic_unmask_irq(irq); 740 mpic_unmask_irq(irq);
748 mpic_startup_ht_interrupt(mpic, src, irq_desc[irq].status); 741 mpic_startup_ht_interrupt(mpic, src, irq_to_desc(irq)->status);
749 742
750 return 0; 743 return 0;
751} 744}
@@ -755,7 +748,7 @@ static void mpic_shutdown_ht_irq(unsigned int irq)
755 struct mpic *mpic = mpic_from_irq(irq); 748 struct mpic *mpic = mpic_from_irq(irq);
756 unsigned int src = mpic_irq_to_hw(irq); 749 unsigned int src = mpic_irq_to_hw(irq);
757 750
758 mpic_shutdown_ht_interrupt(mpic, src, irq_desc[irq].status); 751 mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(irq)->status);
759 mpic_mask_irq(irq); 752 mpic_mask_irq(irq);
760} 753}
761 754
@@ -772,7 +765,7 @@ static void mpic_end_ht_irq(unsigned int irq)
772 * latched another edge interrupt coming in anyway 765 * latched another edge interrupt coming in anyway
773 */ 766 */
774 767
775 if (irq_desc[irq].status & IRQ_LEVEL) 768 if (irq_to_desc(irq)->status & IRQ_LEVEL)
776 mpic_ht_end_irq(mpic, src); 769 mpic_ht_end_irq(mpic, src);
777 mpic_eoi(mpic); 770 mpic_eoi(mpic);
778} 771}
@@ -816,7 +809,7 @@ int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
816 unsigned int src = mpic_irq_to_hw(irq); 809 unsigned int src = mpic_irq_to_hw(irq);
817 810
818 if (mpic->flags & MPIC_SINGLE_DEST_CPU) { 811 if (mpic->flags & MPIC_SINGLE_DEST_CPU) {
819 int cpuid = irq_choose_cpu(irq); 812 int cpuid = irq_choose_cpu(cpumask);
820 813
821 mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid); 814 mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid);
822 } else { 815 } else {
@@ -856,7 +849,7 @@ int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
856{ 849{
857 struct mpic *mpic = mpic_from_irq(virq); 850 struct mpic *mpic = mpic_from_irq(virq);
858 unsigned int src = mpic_irq_to_hw(virq); 851 unsigned int src = mpic_irq_to_hw(virq);
859 struct irq_desc *desc = get_irq_desc(virq); 852 struct irq_desc *desc = irq_to_desc(virq);
860 unsigned int vecpri, vold, vnew; 853 unsigned int vecpri, vold, vnew;
861 854
862 DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", 855 DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n",
@@ -994,7 +987,7 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
994} 987}
995 988
996static int mpic_host_xlate(struct irq_host *h, struct device_node *ct, 989static int mpic_host_xlate(struct irq_host *h, struct device_node *ct,
997 u32 *intspec, unsigned int intsize, 990 const u32 *intspec, unsigned int intsize,
998 irq_hw_number_t *out_hwirq, unsigned int *out_flags) 991 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
999 992
1000{ 993{
@@ -1062,19 +1055,19 @@ struct mpic * __init mpic_alloc(struct device_node *node,
1062 mpic->name = name; 1055 mpic->name = name;
1063 1056
1064 mpic->hc_irq = mpic_irq_chip; 1057 mpic->hc_irq = mpic_irq_chip;
1065 mpic->hc_irq.typename = name; 1058 mpic->hc_irq.name = name;
1066 if (flags & MPIC_PRIMARY) 1059 if (flags & MPIC_PRIMARY)
1067 mpic->hc_irq.set_affinity = mpic_set_affinity; 1060 mpic->hc_irq.set_affinity = mpic_set_affinity;
1068#ifdef CONFIG_MPIC_U3_HT_IRQS 1061#ifdef CONFIG_MPIC_U3_HT_IRQS
1069 mpic->hc_ht_irq = mpic_irq_ht_chip; 1062 mpic->hc_ht_irq = mpic_irq_ht_chip;
1070 mpic->hc_ht_irq.typename = name; 1063 mpic->hc_ht_irq.name = name;
1071 if (flags & MPIC_PRIMARY) 1064 if (flags & MPIC_PRIMARY)
1072 mpic->hc_ht_irq.set_affinity = mpic_set_affinity; 1065 mpic->hc_ht_irq.set_affinity = mpic_set_affinity;
1073#endif /* CONFIG_MPIC_U3_HT_IRQS */ 1066#endif /* CONFIG_MPIC_U3_HT_IRQS */
1074 1067
1075#ifdef CONFIG_SMP 1068#ifdef CONFIG_SMP
1076 mpic->hc_ipi = mpic_ipi_chip; 1069 mpic->hc_ipi = mpic_ipi_chip;
1077 mpic->hc_ipi.typename = name; 1070 mpic->hc_ipi.name = name;
1078#endif /* CONFIG_SMP */ 1071#endif /* CONFIG_SMP */
1079 1072
1080 mpic->flags = flags; 1073 mpic->flags = flags;
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c
index 1d44eee80fa1..0f67cd79d481 100644
--- a/arch/powerpc/sysdev/mpic_msi.c
+++ b/arch/powerpc/sysdev/mpic_msi.c
@@ -39,7 +39,12 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
39 39
40 pr_debug("mpic: found U3, guessing msi allocator setup\n"); 40 pr_debug("mpic: found U3, guessing msi allocator setup\n");
41 41
42 /* Reserve source numbers we know are reserved in the HW */ 42 /* Reserve source numbers we know are reserved in the HW.
43 *
44 * This is a bit of a mix of U3 and U4 reserves but that's going
45 * to work fine, we have plenty enugh numbers left so let's just
46 * mark anything we don't like reserved.
47 */
43 for (i = 0; i < 8; i++) 48 for (i = 0; i < 8; i++)
44 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); 49 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
45 50
@@ -49,6 +54,10 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
49 for (i = 100; i < 105; i++) 54 for (i = 100; i < 105; i++)
50 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); 55 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
51 56
57 for (i = 124; i < mpic->irq_count; i++)
58 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
59
60
52 np = NULL; 61 np = NULL;
53 while ((np = of_find_all_nodes(np))) { 62 while ((np = of_find_all_nodes(np))) {
54 pr_debug("mpic: mapping hwirqs for %s\n", np->full_name); 63 pr_debug("mpic: mapping hwirqs for %s\n", np->full_name);
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c
index 656cb772b691..0f6ab06f8474 100644
--- a/arch/powerpc/sysdev/mpic_pasemi_msi.c
+++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c
@@ -60,7 +60,7 @@ static struct irq_chip mpic_pasemi_msi_chip = {
60 .eoi = mpic_end_irq, 60 .eoi = mpic_end_irq,
61 .set_type = mpic_set_irq_type, 61 .set_type = mpic_set_irq_type,
62 .set_affinity = mpic_set_affinity, 62 .set_affinity = mpic_set_affinity,
63 .typename = "PASEMI-MSI ", 63 .name = "PASEMI-MSI ",
64}; 64};
65 65
66static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type) 66static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type)
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index 0a8f5a9e87c9..bcbfe79c704b 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -42,7 +42,7 @@ static struct irq_chip mpic_u3msi_chip = {
42 .eoi = mpic_end_irq, 42 .eoi = mpic_end_irq,
43 .set_type = mpic_set_irq_type, 43 .set_type = mpic_set_irq_type,
44 .set_affinity = mpic_set_affinity, 44 .set_affinity = mpic_set_affinity,
45 .typename = "MPIC-U3MSI", 45 .name = "MPIC-U3MSI",
46}; 46};
47 47
48static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos) 48static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos)
@@ -64,12 +64,12 @@ static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos)
64 return addr; 64 return addr;
65} 65}
66 66
67static u64 find_ht_magic_addr(struct pci_dev *pdev) 67static u64 find_ht_magic_addr(struct pci_dev *pdev, unsigned int hwirq)
68{ 68{
69 struct pci_bus *bus; 69 struct pci_bus *bus;
70 unsigned int pos; 70 unsigned int pos;
71 71
72 for (bus = pdev->bus; bus; bus = bus->parent) { 72 for (bus = pdev->bus; bus && bus->self; bus = bus->parent) {
73 pos = pci_find_ht_capability(bus->self, HT_CAPTYPE_MSI_MAPPING); 73 pos = pci_find_ht_capability(bus->self, HT_CAPTYPE_MSI_MAPPING);
74 if (pos) 74 if (pos)
75 return read_ht_magic_addr(bus->self, pos); 75 return read_ht_magic_addr(bus->self, pos);
@@ -78,13 +78,41 @@ static u64 find_ht_magic_addr(struct pci_dev *pdev)
78 return 0; 78 return 0;
79} 79}
80 80
81static u64 find_u4_magic_addr(struct pci_dev *pdev, unsigned int hwirq)
82{
83 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
84
85 /* U4 PCIe MSIs need to write to the special register in
86 * the bridge that generates interrupts. There should be
87 * theorically a register at 0xf8005000 where you just write
88 * the MSI number and that triggers the right interrupt, but
89 * unfortunately, this is busted in HW, the bridge endian swaps
90 * the value and hits the wrong nibble in the register.
91 *
92 * So instead we use another register set which is used normally
93 * for converting HT interrupts to MPIC interrupts, which decodes
94 * the interrupt number as part of the low address bits
95 *
96 * This will not work if we ever use more than one legacy MSI in
97 * a block but we never do. For one MSI or multiple MSI-X where
98 * each interrupt address can be specified separately, it works
99 * just fine.
100 */
101 if (of_device_is_compatible(hose->dn, "u4-pcie") ||
102 of_device_is_compatible(hose->dn, "U4-pcie"))
103 return 0xf8004000 | (hwirq << 4);
104
105 return 0;
106}
107
81static int u3msi_msi_check_device(struct pci_dev *pdev, int nvec, int type) 108static int u3msi_msi_check_device(struct pci_dev *pdev, int nvec, int type)
82{ 109{
83 if (type == PCI_CAP_ID_MSIX) 110 if (type == PCI_CAP_ID_MSIX)
84 pr_debug("u3msi: MSI-X untested, trying anyway.\n"); 111 pr_debug("u3msi: MSI-X untested, trying anyway.\n");
85 112
86 /* If we can't find a magic address then MSI ain't gonna work */ 113 /* If we can't find a magic address then MSI ain't gonna work */
87 if (find_ht_magic_addr(pdev) == 0) { 114 if (find_ht_magic_addr(pdev, 0) == 0 &&
115 find_u4_magic_addr(pdev, 0) == 0) {
88 pr_debug("u3msi: no magic address found for %s\n", 116 pr_debug("u3msi: no magic address found for %s\n",
89 pci_name(pdev)); 117 pci_name(pdev));
90 return -ENXIO; 118 return -ENXIO;
@@ -118,10 +146,6 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
118 u64 addr; 146 u64 addr;
119 int hwirq; 147 int hwirq;
120 148
121 addr = find_ht_magic_addr(pdev);
122 msg.address_lo = addr & 0xFFFFFFFF;
123 msg.address_hi = addr >> 32;
124
125 list_for_each_entry(entry, &pdev->msi_list, list) { 149 list_for_each_entry(entry, &pdev->msi_list, list) {
126 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1); 150 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1);
127 if (hwirq < 0) { 151 if (hwirq < 0) {
@@ -129,6 +153,12 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
129 return hwirq; 153 return hwirq;
130 } 154 }
131 155
156 addr = find_ht_magic_addr(pdev, hwirq);
157 if (addr == 0)
158 addr = find_u4_magic_addr(pdev, hwirq);
159 msg.address_lo = addr & 0xFFFFFFFF;
160 msg.address_hi = addr >> 32;
161
132 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); 162 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
133 if (virq == NO_IRQ) { 163 if (virq == NO_IRQ) {
134 pr_debug("u3msi: failed mapping hwirq 0x%x\n", hwirq); 164 pr_debug("u3msi: failed mapping hwirq 0x%x\n", hwirq);
@@ -143,6 +173,8 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
143 pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", 173 pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n",
144 virq, hwirq, (unsigned long)addr); 174 virq, hwirq, (unsigned long)addr);
145 175
176 printk("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n",
177 virq, hwirq, (unsigned long)addr);
146 msg.data = hwirq; 178 msg.data = hwirq;
147 write_msi_msg(virq, &msg); 179 write_msi_msg(virq, &msg);
148 180
diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c
index 2aa4ed066db1..485b92477d7c 100644
--- a/arch/powerpc/sysdev/mv64x60_pic.c
+++ b/arch/powerpc/sysdev/mv64x60_pic.c
@@ -213,7 +213,7 @@ static int mv64x60_host_map(struct irq_host *h, unsigned int virq,
213{ 213{
214 int level1; 214 int level1;
215 215
216 get_irq_desc(virq)->status |= IRQ_LEVEL; 216 irq_to_desc(virq)->status |= IRQ_LEVEL;
217 217
218 level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET; 218 level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET;
219 BUG_ON(level1 > MV64x60_LEVEL1_GPP); 219 BUG_ON(level1 > MV64x60_LEVEL1_GPP);
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 464271bea6c9..149393c02c3f 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -27,6 +27,8 @@
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/ioport.h> 28#include <linux/ioport.h>
29#include <linux/crc32.h> 29#include <linux/crc32.h>
30#include <linux/mod_devicetable.h>
31#include <linux/of_platform.h>
30#include <asm/irq.h> 32#include <asm/irq.h>
31#include <asm/page.h> 33#include <asm/page.h>
32#include <asm/pgtable.h> 34#include <asm/pgtable.h>
@@ -65,19 +67,6 @@ static unsigned int qe_num_of_snum;
65 67
66static phys_addr_t qebase = -1; 68static phys_addr_t qebase = -1;
67 69
68int qe_alive_during_sleep(void)
69{
70 static int ret = -1;
71
72 if (ret != -1)
73 return ret;
74
75 ret = !of_find_compatible_node(NULL, NULL, "fsl,mpc8569-pmc");
76
77 return ret;
78}
79EXPORT_SYMBOL(qe_alive_during_sleep);
80
81phys_addr_t get_qe_base(void) 70phys_addr_t get_qe_base(void)
82{ 71{
83 struct device_node *qe; 72 struct device_node *qe;
@@ -104,7 +93,7 @@ phys_addr_t get_qe_base(void)
104 93
105EXPORT_SYMBOL(get_qe_base); 94EXPORT_SYMBOL(get_qe_base);
106 95
107void __init qe_reset(void) 96void qe_reset(void)
108{ 97{
109 if (qe_immr == NULL) 98 if (qe_immr == NULL)
110 qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE); 99 qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE);
@@ -330,16 +319,18 @@ EXPORT_SYMBOL(qe_put_snum);
330static int qe_sdma_init(void) 319static int qe_sdma_init(void)
331{ 320{
332 struct sdma __iomem *sdma = &qe_immr->sdma; 321 struct sdma __iomem *sdma = &qe_immr->sdma;
333 unsigned long sdma_buf_offset; 322 static unsigned long sdma_buf_offset = (unsigned long)-ENOMEM;
334 323
335 if (!sdma) 324 if (!sdma)
336 return -ENODEV; 325 return -ENODEV;
337 326
338 /* allocate 2 internal temporary buffers (512 bytes size each) for 327 /* allocate 2 internal temporary buffers (512 bytes size each) for
339 * the SDMA */ 328 * the SDMA */
340 sdma_buf_offset = qe_muram_alloc(512 * 2, 4096); 329 if (IS_ERR_VALUE(sdma_buf_offset)) {
341 if (IS_ERR_VALUE(sdma_buf_offset)) 330 sdma_buf_offset = qe_muram_alloc(512 * 2, 4096);
342 return -ENOMEM; 331 if (IS_ERR_VALUE(sdma_buf_offset))
332 return -ENOMEM;
333 }
343 334
344 out_be32(&sdma->sdebcr, (u32) sdma_buf_offset & QE_SDEBCR_BA_MASK); 335 out_be32(&sdma->sdebcr, (u32) sdma_buf_offset & QE_SDEBCR_BA_MASK);
345 out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK | 336 out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK |
@@ -349,7 +340,7 @@ static int qe_sdma_init(void)
349} 340}
350 341
351/* The maximum number of RISCs we support */ 342/* The maximum number of RISCs we support */
352#define MAX_QE_RISC 2 343#define MAX_QE_RISC 4
353 344
354/* Firmware information stored here for qe_get_firmware_info() */ 345/* Firmware information stored here for qe_get_firmware_info() */
355static struct qe_firmware_info qe_firmware_info; 346static struct qe_firmware_info qe_firmware_info;
@@ -658,3 +649,35 @@ unsigned int qe_get_num_of_snums(void)
658 return num_of_snums; 649 return num_of_snums;
659} 650}
660EXPORT_SYMBOL(qe_get_num_of_snums); 651EXPORT_SYMBOL(qe_get_num_of_snums);
652
653#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC_85xx)
654static int qe_resume(struct of_device *ofdev)
655{
656 if (!qe_alive_during_sleep())
657 qe_reset();
658 return 0;
659}
660
661static int qe_probe(struct of_device *ofdev, const struct of_device_id *id)
662{
663 return 0;
664}
665
666static const struct of_device_id qe_ids[] = {
667 { .compatible = "fsl,qe", },
668 { },
669};
670
671static struct of_platform_driver qe_driver = {
672 .driver.name = "fsl-qe",
673 .match_table = qe_ids,
674 .probe = qe_probe,
675 .resume = qe_resume,
676};
677
678static int __init qe_drv_init(void)
679{
680 return of_register_platform_driver(&qe_driver);
681}
682device_initcall(qe_drv_init);
683#endif /* defined(CONFIG_SUSPEND) && defined(CONFIG_PPC_85xx) */
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 3faa42e03a85..2acc928d1920 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -189,7 +189,7 @@ static inline void qe_ic_write(volatile __be32 __iomem * base, unsigned int reg
189 189
190static inline struct qe_ic *qe_ic_from_irq(unsigned int virq) 190static inline struct qe_ic *qe_ic_from_irq(unsigned int virq)
191{ 191{
192 return irq_desc[virq].chip_data; 192 return irq_to_desc(virq)->chip_data;
193} 193}
194 194
195#define virq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) 195#define virq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq)
@@ -237,7 +237,7 @@ static void qe_ic_mask_irq(unsigned int virq)
237} 237}
238 238
239static struct irq_chip qe_ic_irq_chip = { 239static struct irq_chip qe_ic_irq_chip = {
240 .typename = " QEIC ", 240 .name = " QEIC ",
241 .unmask = qe_ic_unmask_irq, 241 .unmask = qe_ic_unmask_irq,
242 .mask = qe_ic_mask_irq, 242 .mask = qe_ic_mask_irq,
243 .mask_ack = qe_ic_mask_irq, 243 .mask_ack = qe_ic_mask_irq,
@@ -263,7 +263,7 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq,
263 chip = &qe_ic->hc_irq; 263 chip = &qe_ic->hc_irq;
264 264
265 set_irq_chip_data(virq, qe_ic); 265 set_irq_chip_data(virq, qe_ic);
266 get_irq_desc(virq)->status |= IRQ_LEVEL; 266 irq_to_desc(virq)->status |= IRQ_LEVEL;
267 267
268 set_irq_chip_and_handler(virq, chip, handle_level_irq); 268 set_irq_chip_and_handler(virq, chip, handle_level_irq);
269 269
@@ -271,7 +271,7 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq,
271} 271}
272 272
273static int qe_ic_host_xlate(struct irq_host *h, struct device_node *ct, 273static int qe_ic_host_xlate(struct irq_host *h, struct device_node *ct,
274 u32 * intspec, unsigned int intsize, 274 const u32 * intspec, unsigned int intsize,
275 irq_hw_number_t * out_hwirq, 275 irq_hw_number_t * out_hwirq,
276 unsigned int *out_flags) 276 unsigned int *out_flags)
277{ 277{
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index cf244a419e96..595034cfb85a 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -376,7 +376,7 @@ static void tsi108_pci_irq_end(u_int irq)
376 */ 376 */
377 377
378static struct irq_chip tsi108_pci_irq = { 378static struct irq_chip tsi108_pci_irq = {
379 .typename = "tsi108_PCI_int", 379 .name = "tsi108_PCI_int",
380 .mask = tsi108_pci_irq_disable, 380 .mask = tsi108_pci_irq_disable,
381 .ack = tsi108_pci_irq_ack, 381 .ack = tsi108_pci_irq_ack,
382 .end = tsi108_pci_irq_end, 382 .end = tsi108_pci_irq_end,
@@ -384,7 +384,7 @@ static struct irq_chip tsi108_pci_irq = {
384}; 384};
385 385
386static int pci_irq_host_xlate(struct irq_host *h, struct device_node *ct, 386static int pci_irq_host_xlate(struct irq_host *h, struct device_node *ct,
387 u32 *intspec, unsigned int intsize, 387 const u32 *intspec, unsigned int intsize,
388 irq_hw_number_t *out_hwirq, unsigned int *out_flags) 388 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
389{ 389{
390 *out_hwirq = intspec[0]; 390 *out_hwirq = intspec[0];
@@ -398,7 +398,7 @@ static int pci_irq_host_map(struct irq_host *h, unsigned int virq,
398 DBG("%s(%d, 0x%lx)\n", __func__, virq, hw); 398 DBG("%s(%d, 0x%lx)\n", __func__, virq, hw);
399 if ((virq >= 1) && (virq <= 4)){ 399 if ((virq >= 1) && (virq <= 4)){
400 irq = virq + IRQ_PCI_INTAD_BASE - 1; 400 irq = virq + IRQ_PCI_INTAD_BASE - 1;
401 get_irq_desc(irq)->status |= IRQ_LEVEL; 401 irq_to_desc(irq)->status |= IRQ_LEVEL;
402 set_irq_chip(irq, &tsi108_pci_irq); 402 set_irq_chip(irq, &tsi108_pci_irq);
403 } 403 }
404 return 0; 404 return 0;
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 466ce9ace127..6f220a913e42 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -57,7 +57,7 @@ struct uic {
57 57
58static void uic_unmask_irq(unsigned int virq) 58static void uic_unmask_irq(unsigned int virq)
59{ 59{
60 struct irq_desc *desc = get_irq_desc(virq); 60 struct irq_desc *desc = irq_to_desc(virq);
61 struct uic *uic = get_irq_chip_data(virq); 61 struct uic *uic = get_irq_chip_data(virq);
62 unsigned int src = uic_irq_to_hw(virq); 62 unsigned int src = uic_irq_to_hw(virq);
63 unsigned long flags; 63 unsigned long flags;
@@ -101,7 +101,7 @@ static void uic_ack_irq(unsigned int virq)
101 101
102static void uic_mask_ack_irq(unsigned int virq) 102static void uic_mask_ack_irq(unsigned int virq)
103{ 103{
104 struct irq_desc *desc = get_irq_desc(virq); 104 struct irq_desc *desc = irq_to_desc(virq);
105 struct uic *uic = get_irq_chip_data(virq); 105 struct uic *uic = get_irq_chip_data(virq);
106 unsigned int src = uic_irq_to_hw(virq); 106 unsigned int src = uic_irq_to_hw(virq);
107 unsigned long flags; 107 unsigned long flags;
@@ -129,7 +129,7 @@ static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
129{ 129{
130 struct uic *uic = get_irq_chip_data(virq); 130 struct uic *uic = get_irq_chip_data(virq);
131 unsigned int src = uic_irq_to_hw(virq); 131 unsigned int src = uic_irq_to_hw(virq);
132 struct irq_desc *desc = get_irq_desc(virq); 132 struct irq_desc *desc = irq_to_desc(virq);
133 unsigned long flags; 133 unsigned long flags;
134 int trigger, polarity; 134 int trigger, polarity;
135 u32 tr, pr, mask; 135 u32 tr, pr, mask;
@@ -177,7 +177,7 @@ static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
177} 177}
178 178
179static struct irq_chip uic_irq_chip = { 179static struct irq_chip uic_irq_chip = {
180 .typename = " UIC ", 180 .name = " UIC ",
181 .unmask = uic_unmask_irq, 181 .unmask = uic_unmask_irq,
182 .mask = uic_mask_irq, 182 .mask = uic_mask_irq,
183 .mask_ack = uic_mask_ack_irq, 183 .mask_ack = uic_mask_ack_irq,
@@ -202,7 +202,7 @@ static int uic_host_map(struct irq_host *h, unsigned int virq,
202} 202}
203 203
204static int uic_host_xlate(struct irq_host *h, struct device_node *ct, 204static int uic_host_xlate(struct irq_host *h, struct device_node *ct,
205 u32 *intspec, unsigned int intsize, 205 const u32 *intspec, unsigned int intsize,
206 irq_hw_number_t *out_hwirq, unsigned int *out_type) 206 irq_hw_number_t *out_hwirq, unsigned int *out_type)
207 207
208{ 208{
@@ -225,12 +225,12 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
225 int src; 225 int src;
226 int subvirq; 226 int subvirq;
227 227
228 spin_lock(&desc->lock); 228 raw_spin_lock(&desc->lock);
229 if (desc->status & IRQ_LEVEL) 229 if (desc->status & IRQ_LEVEL)
230 desc->chip->mask(virq); 230 desc->chip->mask(virq);
231 else 231 else
232 desc->chip->mask_ack(virq); 232 desc->chip->mask_ack(virq);
233 spin_unlock(&desc->lock); 233 raw_spin_unlock(&desc->lock);
234 234
235 msr = mfdcr(uic->dcrbase + UIC_MSR); 235 msr = mfdcr(uic->dcrbase + UIC_MSR);
236 if (!msr) /* spurious interrupt */ 236 if (!msr) /* spurious interrupt */
@@ -242,12 +242,12 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
242 generic_handle_irq(subvirq); 242 generic_handle_irq(subvirq);
243 243
244uic_irq_ret: 244uic_irq_ret:
245 spin_lock(&desc->lock); 245 raw_spin_lock(&desc->lock);
246 if (desc->status & IRQ_LEVEL) 246 if (desc->status & IRQ_LEVEL)
247 desc->chip->ack(virq); 247 desc->chip->ack(virq);
248 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) 248 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
249 desc->chip->unmask(virq); 249 desc->chip->unmask(virq);
250 spin_unlock(&desc->lock); 250 raw_spin_unlock(&desc->lock);
251} 251}
252 252
253static struct uic * __init uic_init_one(struct device_node *node) 253static struct uic * __init uic_init_one(struct device_node *node)
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c
index 40edad520770..1e0ccfaf403e 100644
--- a/arch/powerpc/sysdev/xilinx_intc.c
+++ b/arch/powerpc/sysdev/xilinx_intc.c
@@ -79,7 +79,7 @@ static void xilinx_intc_mask(unsigned int virq)
79 79
80static int xilinx_intc_set_type(unsigned int virq, unsigned int flow_type) 80static int xilinx_intc_set_type(unsigned int virq, unsigned int flow_type)
81{ 81{
82 struct irq_desc *desc = get_irq_desc(virq); 82 struct irq_desc *desc = irq_to_desc(virq);
83 83
84 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); 84 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
85 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; 85 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
@@ -106,7 +106,7 @@ static void xilinx_intc_level_unmask(unsigned int virq)
106} 106}
107 107
108static struct irq_chip xilinx_intc_level_irqchip = { 108static struct irq_chip xilinx_intc_level_irqchip = {
109 .typename = "Xilinx Level INTC", 109 .name = "Xilinx Level INTC",
110 .mask = xilinx_intc_mask, 110 .mask = xilinx_intc_mask,
111 .mask_ack = xilinx_intc_mask, 111 .mask_ack = xilinx_intc_mask,
112 .unmask = xilinx_intc_level_unmask, 112 .unmask = xilinx_intc_level_unmask,
@@ -133,7 +133,7 @@ static void xilinx_intc_edge_ack(unsigned int virq)
133} 133}
134 134
135static struct irq_chip xilinx_intc_edge_irqchip = { 135static struct irq_chip xilinx_intc_edge_irqchip = {
136 .typename = "Xilinx Edge INTC", 136 .name = "Xilinx Edge INTC",
137 .mask = xilinx_intc_mask, 137 .mask = xilinx_intc_mask,
138 .unmask = xilinx_intc_edge_unmask, 138 .unmask = xilinx_intc_edge_unmask,
139 .ack = xilinx_intc_edge_ack, 139 .ack = xilinx_intc_edge_ack,
@@ -148,7 +148,7 @@ static struct irq_chip xilinx_intc_edge_irqchip = {
148 * xilinx_intc_xlate - translate virq# from device tree interrupts property 148 * xilinx_intc_xlate - translate virq# from device tree interrupts property
149 */ 149 */
150static int xilinx_intc_xlate(struct irq_host *h, struct device_node *ct, 150static int xilinx_intc_xlate(struct irq_host *h, struct device_node *ct,
151 u32 *intspec, unsigned int intsize, 151 const u32 *intspec, unsigned int intsize,
152 irq_hw_number_t *out_hwirq, 152 irq_hw_number_t *out_hwirq,
153 unsigned int *out_flags) 153 unsigned int *out_flags)
154{ 154{