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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2006-11-11 01:24:53 -0500
committerPaul Mackerras <paulus@samba.org>2006-12-04 00:08:25 -0500
commit4c75a6f441cdd1c69a6c173bc7944e12c2ba6f84 (patch)
tree260e01e5cbd46d335a3d44b60c34dee51e053774 /arch/powerpc/sysdev
parent69108cf00679716bcab58acb3135390654c5bb99 (diff)
[POWERPC] Generic DCR infrastructure
This patch adds new dcr_map/dcr_read/dcr_write accessors for DCRs that can be used by drivers to transparently address either native DCRs or memory mapped DCRs. The implementation for memory mapped DCRs is done after the binding being currently worked on for SLOF and the Axon chipset. This patch enables it for the cell native platform Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r--arch/powerpc/sysdev/Makefile3
-rw-r--r--arch/powerpc/sysdev/dcr-low.S39
-rw-r--r--arch/powerpc/sysdev/dcr.c137
3 files changed, 177 insertions, 2 deletions
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 5b87f7b42a1f..8ba11ab5e614 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -5,8 +5,7 @@ endif
5obj-$(CONFIG_MPIC) += mpic.o 5obj-$(CONFIG_MPIC) += mpic.o
6obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o 6obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
7obj-$(CONFIG_PPC_MPC106) += grackle.o 7obj-$(CONFIG_PPC_MPC106) += grackle.o
8obj-$(CONFIG_BOOKE) += dcr.o 8obj-$(CONFIG_PPC_DCR) += dcr.o dcr-low.o
9obj-$(CONFIG_40x) += dcr.o
10obj-$(CONFIG_U3_DART) += dart_iommu.o 9obj-$(CONFIG_U3_DART) += dart_iommu.o
11obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o 10obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
12obj-$(CONFIG_FSL_SOC) += fsl_soc.o 11obj-$(CONFIG_FSL_SOC) += fsl_soc.o
diff --git a/arch/powerpc/sysdev/dcr-low.S b/arch/powerpc/sysdev/dcr-low.S
new file mode 100644
index 000000000000..2078f39e2f17
--- /dev/null
+++ b/arch/powerpc/sysdev/dcr-low.S
@@ -0,0 +1,39 @@
1/*
2 * "Indirect" DCR access
3 *
4 * Copyright (c) 2004 Eugene Surovegin <ebs@ebshome.net>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <asm/ppc_asm.h>
13#include <asm/processor.h>
14
15#define DCR_ACCESS_PROLOG(table) \
16 rlwinm r3,r3,4,18,27; \
17 lis r5,table@h; \
18 ori r5,r5,table@l; \
19 add r3,r3,r5; \
20 mtctr r3; \
21 bctr
22
23_GLOBAL(__mfdcr)
24 DCR_ACCESS_PROLOG(__mfdcr_table)
25
26_GLOBAL(__mtdcr)
27 DCR_ACCESS_PROLOG(__mtdcr_table)
28
29__mfdcr_table:
30 mfdcr r3,0; blr
31__mtdcr_table:
32 mtdcr 0,r4; blr
33
34dcr = 1
35 .rept 1023
36 mfdcr r3,dcr; blr
37 mtdcr dcr,r4; blr
38 dcr = dcr + 1
39 .endr
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c
new file mode 100644
index 000000000000..dffeeaeca1d9
--- /dev/null
+++ b/arch/powerpc/sysdev/dcr.c
@@ -0,0 +1,137 @@
1/*
2 * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
3 * <benh@kernel.crashing.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
13 * the GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#undef DEBUG
21
22#include <linux/kernel.h>
23#include <asm/prom.h>
24#include <asm/dcr.h>
25
26unsigned int dcr_resource_start(struct device_node *np, unsigned int index)
27{
28 unsigned int ds;
29 const u32 *dr = get_property(np, "dcr-reg", &ds);
30
31 if (dr == NULL || ds & 1 || index >= (ds / 8))
32 return 0;
33
34 return dr[index * 2];
35}
36
37unsigned int dcr_resource_len(struct device_node *np, unsigned int index)
38{
39 unsigned int ds;
40 const u32 *dr = get_property(np, "dcr-reg", &ds);
41
42 if (dr == NULL || ds & 1 || index >= (ds / 8))
43 return 0;
44
45 return dr[index * 2 + 1];
46}
47
48#ifndef CONFIG_PPC_DCR_NATIVE
49
50static struct device_node * find_dcr_parent(struct device_node * node)
51{
52 struct device_node *par, *tmp;
53 const u32 *p;
54
55 for (par = of_node_get(node); par;) {
56 if (get_property(par, "dcr-controller", NULL))
57 break;
58 p = get_property(par, "dcr-parent", NULL);
59 tmp = par;
60 if (p == NULL)
61 par = of_get_parent(par);
62 else
63 par = of_find_node_by_phandle(*p);
64 of_node_put(tmp);
65 }
66 return par;
67}
68
69u64 of_translate_dcr_address(struct device_node *dev,
70 unsigned int dcr_n,
71 unsigned int *out_stride)
72{
73 struct device_node *dp;
74 const u32 *p;
75 unsigned int stride;
76 u64 ret;
77
78 dp = find_dcr_parent(dev);
79 if (dp == NULL)
80 return OF_BAD_ADDR;
81
82 /* Stride is not properly defined yet, default to 0x10 for Axon */
83 p = get_property(dp, "dcr-mmio-stride", NULL);
84 stride = (p == NULL) ? 0x10 : *p;
85
86 /* XXX FIXME: Which property name is to use of the 2 following ? */
87 p = get_property(dp, "dcr-mmio-range", NULL);
88 if (p == NULL)
89 p = get_property(dp, "dcr-mmio-space", NULL);
90 if (p == NULL)
91 return OF_BAD_ADDR;
92
93 /* Maybe could do some better range checking here */
94 ret = of_translate_address(dp, p);
95 if (ret != OF_BAD_ADDR)
96 ret += (u64)(stride) * (u64)dcr_n;
97 if (out_stride)
98 *out_stride = stride;
99 return ret;
100}
101
102dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
103 unsigned int dcr_c)
104{
105 dcr_host_t ret = { .token = NULL, .stride = 0 };
106 u64 addr;
107
108 pr_debug("dcr_map(%s, 0x%x, 0x%x)\n",
109 dev->full_name, dcr_n, dcr_c);
110
111 addr = of_translate_dcr_address(dev, dcr_n, &ret.stride);
112 pr_debug("translates to addr: 0x%lx, stride: 0x%x\n",
113 addr, ret.stride);
114 if (addr == OF_BAD_ADDR)
115 return ret;
116 pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride);
117 ret.token = ioremap(addr, dcr_c * ret.stride);
118 if (ret.token == NULL)
119 return ret;
120 pr_debug("mapped at 0x%p -> base is 0x%p\n",
121 ret.token, ret.token - dcr_n * ret.stride);
122 ret.token -= dcr_n * ret.stride;
123 return ret;
124}
125
126void dcr_unmap(dcr_host_t host, unsigned int dcr_n, unsigned int dcr_c)
127{
128 dcr_host_t h = host;
129
130 if (h.token == NULL)
131 return;
132 h.token -= dcr_n * h.stride;
133 iounmap(h.token);
134 h.token = NULL;
135}
136
137#endif /* !defined(CONFIG_PPC_DCR_NATIVE) */