diff options
author | Mark A. Greer <mgreer@mvista.com> | 2006-06-20 17:15:36 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-06-21 01:01:32 -0400 |
commit | 868ea0c9256b658b14603e1ad7361b81b92ccacd (patch) | |
tree | 6d080ba156f8098277329f26f1d4e3a73cae2093 /arch/powerpc/sysdev | |
parent | 0aa8d15b01881ccaab5f2fb31eef33ced97ccb5f (diff) |
[POWERPC] mpic: add support for serial mode interrupts
On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote:
> > MPC10x-style interrupt controllers have a serial mode that allows
> > several interrupts to be clocked in through one INT signal.
> >
> > This patch adds the software support for that mode.
>
> You hard code the clock ratio... why not add a separate call to be
> called after mpic_init,
> something like mpic_set_serial_int(int mpic, int enable, int
> clock_ratio) ?
How's this?
--
MPC10x-style interrupt controllers have a serial mode that allows
several interrupts to be clocked in through one INT signal.
This patch adds the software support for that mode.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
--
arch/powerpc/sysdev/mpic.c | 20 ++++++++++++++++++++
include/asm-powerpc/mpic.h | 10 ++++++++++
2 files changed, 30 insertions(+)
--
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r-- | arch/powerpc/sysdev/mpic.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 7dcdfcb3c984..bffe50d02c99 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -829,7 +829,27 @@ void __init mpic_init(struct mpic *mpic) | |||
829 | mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0); | 829 | mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0); |
830 | } | 830 | } |
831 | 831 | ||
832 | void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio) | ||
833 | { | ||
834 | u32 v; | ||
835 | |||
836 | v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1); | ||
837 | v &= ~MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK; | ||
838 | v |= MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(clock_ratio); | ||
839 | mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v); | ||
840 | } | ||
832 | 841 | ||
842 | void __init mpic_set_serial_int(struct mpic *mpic, int enable) | ||
843 | { | ||
844 | u32 v; | ||
845 | |||
846 | v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1); | ||
847 | if (enable) | ||
848 | v |= MPIC_GREG_GLOBAL_CONF_1_SIE; | ||
849 | else | ||
850 | v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE; | ||
851 | mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v); | ||
852 | } | ||
833 | 853 | ||
834 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | 854 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) |
835 | { | 855 | { |