powerpc/pci: Support per-aperture memory offset

The PCI core supports an offset per aperture nowadays but our arch
code still has a single offset per host bridge representing the
difference betwen CPU memory addresses and PCI MMIO addresses.

This is a problem as new machines and hypervisor versions are
coming out where the 64-bit windows will have a different offset
(basically mapped 1:1) from the 32-bit windows.

This fixes it by using separate offsets. In the long run, we probably
want to get rid of that intermediary struct pci_controller and have
those directly stored into the pci_host_bridge as they are parsed
but this will be a more invasive change.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

2 files changed, 15 insertions, 11 deletions

diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index cffe7edac858..028ac1f71b51 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -178,7 +178,7 @@ static void setup_pci_atmu(struct pci_controller *hose)
         struct ccsr_pci __iomem *pci = hose->private_data;
         int i, j, n, mem_log, win_idx = 3, start_idx = 1, end_idx = 4;
         u64 mem, sz, paddr_hi = 0;
-        u64 paddr_lo = ULLONG_MAX;
+        u64 offset = 0, paddr_lo = ULLONG_MAX;
         u32 pcicsrbar = 0, pcicsrbar_sz;
         u32 piwar = PIWAR_EN | PIWAR_PF | PIWAR_TGI_LOCAL |
                         PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
@@ -208,8 +208,9 @@ static void setup_pci_atmu(struct pci_controller *hose)
                 paddr_lo = min(paddr_lo, (u64)hose->mem_resources[i].start);
                 paddr_hi = max(paddr_hi, (u64)hose->mem_resources[i].end);
 
-                n = setup_one_atmu(pci, j, &hose->mem_resources[i],
-                                   hose->pci_mem_offset);
+                /* We assume all memory resources have the same offset */
+                offset = hose->mem_offset[i];
+                n = setup_one_atmu(pci, j, &hose->mem_resources[i], offset);
 
                 if (n < 0 || j >= 5) {
                         pr_err("Ran out of outbound PCI ATMUs for resource %d!\n", i);
@@ -239,8 +240,8 @@ static void setup_pci_atmu(struct pci_controller *hose)
         }
 
         /* convert to pci address space */
-        paddr_hi -= hose->pci_mem_offset;
-        paddr_lo -= hose->pci_mem_offset;
+        paddr_hi -= offset;
+        paddr_lo -= offset;
 
         if (paddr_hi == paddr_lo) {
                 pr_err("%s: No outbound window space\n", name);
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 56e8b3c3c890..64603a10b863 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -257,6 +257,7 @@ static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
         /* Setup outbound memory windows */
         for (i = j = 0; i < 3; i++) {
                 struct resource *res = &hose->mem_resources[i];
+                resource_size_t offset = hose->mem_offset[i];
 
                 /* we only care about memory windows */
                 if (!(res->flags & IORESOURCE_MEM))
@@ -270,7 +271,7 @@ static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
                 /* Configure the resource */
                 if (ppc4xx_setup_one_pci_PMM(hose, reg,
                                              res->start,
-                                             res->start - hose->pci_mem_offset,
+                                             res->start - offset,
                                              resource_size(res),
                                              res->flags,
                                              j) == 0) {
@@ -279,7 +280,7 @@ static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
                         /* If the resource PCI address is 0 then we have our
                          * ISA memory hole
                          */
-                        if (res->start == hose->pci_mem_offset)
+                        if (res->start == offset)
                                 found_isa_hole = 1;
                 }
         }
@@ -457,6 +458,7 @@ static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
         /* Setup outbound memory windows */
         for (i = j = 0; i < 3; i++) {
                 struct resource *res = &hose->mem_resources[i];
+                resource_size_t offset = hose->mem_offset[i];
 
                 /* we only care about memory windows */
                 if (!(res->flags & IORESOURCE_MEM))
@@ -470,7 +472,7 @@ static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
                 /* Configure the resource */
                 if (ppc4xx_setup_one_pcix_POM(hose, reg,
                                               res->start,
-                                              res->start - hose->pci_mem_offset,
+                                              res->start - offset,
                                               resource_size(res),
                                               res->flags,
                                               j) == 0) {
@@ -479,7 +481,7 @@ static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
                         /* If the resource PCI address is 0 then we have our
                          * ISA memory hole
                          */
-                        if (res->start == hose->pci_mem_offset)
+                        if (res->start == offset)
                                 found_isa_hole = 1;
                 }
         }
@@ -1792,6 +1794,7 @@ static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port,
         /* Setup outbound memory windows */
         for (i = j = 0; i < 3; i++) {
                 struct resource *res = &hose->mem_resources[i];
+                resource_size_t offset = hose->mem_offset[i];
 
                 /* we only care about memory windows */
                 if (!(res->flags & IORESOURCE_MEM))
@@ -1805,7 +1808,7 @@ static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port,
                 /* Configure the resource */
                 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
                                                res->start,
-                                               res->start - hose->pci_mem_offset,
+                                               res->start - offset,
                                                resource_size(res),
                                                res->flags,
                                                j) == 0) {
@@ -1814,7 +1817,7 @@ static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port,
                         /* If the resource PCI address is 0 then we have our
                          * ISA memory hole
                          */
-                        if (res->start == hose->pci_mem_offset)
+                        if (res->start == offset)
                                 found_isa_hole = 1;
                 }
         }