Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into sh-latest

1 files changed, 17 insertions, 24 deletions

diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 835f7958b237..5d9138516628 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -57,7 +57,6 @@ struct uic {
 
 static void uic_unmask_irq(struct irq_data *d)
 {
-        struct irq_desc *desc = irq_to_desc(d->irq);
         struct uic *uic = irq_data_get_irq_chip_data(d);
         unsigned int src = uic_irq_to_hw(d->irq);
         unsigned long flags;
@@ -66,7 +65,7 @@ static void uic_unmask_irq(struct irq_data *d)
         sr = 1 << (31-src);
         spin_lock_irqsave(&uic->lock, flags);
         /* ack level-triggered interrupts here */
-        if (desc->status & IRQ_LEVEL)
+        if (irqd_is_level_type(d))
                 mtdcr(uic->dcrbase + UIC_SR, sr);
         er = mfdcr(uic->dcrbase + UIC_ER);
         er |= sr;
@@ -101,7 +100,6 @@ static void uic_ack_irq(struct irq_data *d)
 
 static void uic_mask_ack_irq(struct irq_data *d)
 {
-        struct irq_desc *desc = irq_to_desc(d->irq);
         struct uic *uic = irq_data_get_irq_chip_data(d);
         unsigned int src = uic_irq_to_hw(d->irq);
         unsigned long flags;
@@ -120,7 +118,7 @@ static void uic_mask_ack_irq(struct irq_data *d)
          * level interrupts are ack'ed after the actual
          * isr call in the uic_unmask_irq()
          */
-        if (!(desc->status & IRQ_LEVEL))
+        if (!irqd_is_level_type(d))
                 mtdcr(uic->dcrbase + UIC_SR, sr);
         spin_unlock_irqrestore(&uic->lock, flags);
 }
@@ -129,7 +127,6 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
 {
         struct uic *uic = irq_data_get_irq_chip_data(d);
         unsigned int src = uic_irq_to_hw(d->irq);
-        struct irq_desc *desc = irq_to_desc(d->irq);
         unsigned long flags;
         int trigger, polarity;
         u32 tr, pr, mask;
@@ -166,11 +163,6 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
         mtdcr(uic->dcrbase + UIC_PR, pr);
         mtdcr(uic->dcrbase + UIC_TR, tr);
 
-        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
-        desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
-        if (!trigger)
-                desc->status |= IRQ_LEVEL;
-
         spin_unlock_irqrestore(&uic->lock, flags);
 
         return 0;
@@ -190,13 +182,13 @@ static int uic_host_map(struct irq_host *h, unsigned int virq,
 {
         struct uic *uic = h->host_data;
 
-        set_irq_chip_data(virq, uic);
+        irq_set_chip_data(virq, uic);
         /* Despite the name, handle_level_irq() works for both level
          * and edge irqs on UIC.  FIXME: check this is correct */
-        set_irq_chip_and_handler(virq, &uic_irq_chip, handle_level_irq);
+        irq_set_chip_and_handler(virq, &uic_irq_chip, handle_level_irq);
 
         /* Set default irq type */
-        set_irq_type(virq, IRQ_TYPE_NONE);
+        irq_set_irq_type(virq, IRQ_TYPE_NONE);
 
         return 0;
 }
@@ -220,17 +212,18 @@ static struct irq_host_ops uic_host_ops = {
 
 void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
 {
-        struct irq_chip *chip = get_irq_desc_chip(desc);
-        struct uic *uic = get_irq_data(virq);
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        struct irq_data *idata = irq_desc_get_irq_data(desc);
+        struct uic *uic = irq_get_handler_data(virq);
         u32 msr;
         int src;
         int subvirq;
 
         raw_spin_lock(&desc->lock);
-        if (desc->status & IRQ_LEVEL)
-                chip->irq_mask(&desc->irq_data);
+        if (irqd_is_level_type(idata))
+                chip->irq_mask(idata);
         else
-                chip->irq_mask_ack(&desc->irq_data);
+                chip->irq_mask_ack(idata);
         raw_spin_unlock(&desc->lock);
 
         msr = mfdcr(uic->dcrbase + UIC_MSR);
@@ -244,10 +237,10 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
 
 uic_irq_ret:
         raw_spin_lock(&desc->lock);
-        if (desc->status & IRQ_LEVEL)
-                chip->irq_ack(&desc->irq_data);
-        if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask)
-                chip->irq_unmask(&desc->irq_data);
+        if (irqd_is_level_type(idata))
+                chip->irq_ack(idata);
+        if (!irqd_irq_disabled(idata) && chip->irq_unmask)
+                chip->irq_unmask(idata);
         raw_spin_unlock(&desc->lock);
 }
 
@@ -336,8 +329,8 @@ void __init uic_init_tree(void)
 
                         cascade_virq = irq_of_parse_and_map(np, 0);
 
-                        set_irq_data(cascade_virq, uic);
-                        set_irq_chained_handler(cascade_virq, uic_irq_cascade);
+                        irq_set_handler_data(cascade_virq, uic);
+                        irq_set_chained_handler(cascade_virq, uic_irq_cascade);
 
                         /* FIXME: setup critical cascade?? */
                 }