aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/sysdev/ppc4xx_pci.c
diff options
context:
space:
mode:
authorTirumala R Marri <tmarri@amcc.com>2008-08-21 14:53:34 -0400
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2008-08-28 08:58:53 -0400
commite30c98758453d743fab00e45da0eac6fc581958a (patch)
treede72d65f950168a653eb12a95edb87e2dec4a6ed /arch/powerpc/sysdev/ppc4xx_pci.c
parent7713fef06517d216f96ee7c8ad750e72bc08d38f (diff)
powerpc/44x: AMCC PPC460GT/EX PCI-E de-emphasis adjustment fix
During recent tests with PCI-E , it has been found the DRV + De-Emphasis values are not optimum. These new values are tested thouroughly. Signed-off-by: Tirumala R Marri <tmarri@amcc.com> Signed-off-by: Feng Kan fkan@amcc.com Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/sysdev/ppc4xx_pci.c')
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index fb368dfde5d4..d5c345dbb89d 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -810,7 +810,7 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
810 switch (port->index) { 810 switch (port->index) {
811 case 0: 811 case 0:
812 mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230); 812 mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230);
813 mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000136); 813 mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130);
814 mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006); 814 mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006);
815 815
816 mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000); 816 mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000);
@@ -821,10 +821,10 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
821 mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230); 821 mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230);
822 mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230); 822 mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230);
823 mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230); 823 mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230);
824 mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000136); 824 mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000130);
825 mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000136); 825 mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000130);
826 mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000136); 826 mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000130);
827 mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000136); 827 mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000130);
828 mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006); 828 mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006);
829 mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006); 829 mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006);
830 mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006); 830 mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006);