Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (62 commits)
  powerpc/85xx: Fix signedness bug in cache-sram
  powerpc/fsl: 85xx: document cache sram bindings
  powerpc/fsl: define binding for fsl mpic interrupt controllers
  powerpc/fsl_msi: Handle msi-available-ranges better
  drivers/serial/ucc_uart.c: Add of_node_put to avoid memory leak
  powerpc/85xx: Fix SPE float to integer conversion failure
  powerpc/85xx: Update sata controller compatible for p1022ds board
  ATA: Add FSL sata v2 controller support
  powerpc/mpc8xxx_gpio: simplify searching for 'fsl, qoriq-gpio' compatiable
  powerpc/8xx: remove obsolete mgsuvd board
  powerpc/82xx: rename and update mgcoge board support
  powerpc/83xx: rename and update kmeter1
  powerpc/85xx: Workaroudn e500 CPU erratum A005
  powerpc/fsl_pci: Add support for FSL PCIe controllers v2.x
  powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e
  powerpc/pseries: Disable MSI using new interface if possible
  powerpc: Enable GENERIC_HARDIRQS_NO_DEPRECATED.
  powerpc: core irq_data conversion.
  powerpc: sysdev/xilinx_intc irq_data conversion.
  powerpc: sysdev/uic irq_data conversion.
  ...

Fix up conflicts in arch/powerpc/sysdev/fsl_msi.c (due to getting rid of
of_platform_driver in arch/powerpc)

1 files changed, 23 insertions, 23 deletions

diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c
index 485b92477d7c..bc61ebb8987c 100644
--- a/arch/powerpc/sysdev/mv64x60_pic.c
+++ b/arch/powerpc/sysdev/mv64x60_pic.c
@@ -76,9 +76,9 @@ static struct irq_host *mv64x60_irq_host;
  * mv64x60_chip_low functions
  */
 
-static void mv64x60_mask_low(unsigned int virq)
+static void mv64x60_mask_low(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
         unsigned long flags;
 
         spin_lock_irqsave(&mv64x60_lock, flags);
@@ -89,9 +89,9 @@ static void mv64x60_mask_low(unsigned int virq)
         (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO);
 }
 
-static void mv64x60_unmask_low(unsigned int virq)
+static void mv64x60_unmask_low(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
         unsigned long flags;
 
         spin_lock_irqsave(&mv64x60_lock, flags);
@@ -104,18 +104,18 @@ static void mv64x60_unmask_low(unsigned int virq)
 
 static struct irq_chip mv64x60_chip_low = {
         .name           = "mv64x60_low",
-        .mask           = mv64x60_mask_low,
-        .mask_ack       = mv64x60_mask_low,
-        .unmask         = mv64x60_unmask_low,
+        .irq_mask       = mv64x60_mask_low,
+        .irq_mask_ack   = mv64x60_mask_low,
+        .irq_unmask     = mv64x60_unmask_low,
 };
 
 /*
  * mv64x60_chip_high functions
  */
 
-static void mv64x60_mask_high(unsigned int virq)
+static void mv64x60_mask_high(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
         unsigned long flags;
 
         spin_lock_irqsave(&mv64x60_lock, flags);
@@ -126,9 +126,9 @@ static void mv64x60_mask_high(unsigned int virq)
         (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI);
 }
 
-static void mv64x60_unmask_high(unsigned int virq)
+static void mv64x60_unmask_high(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
         unsigned long flags;
 
         spin_lock_irqsave(&mv64x60_lock, flags);
@@ -141,18 +141,18 @@ static void mv64x60_unmask_high(unsigned int virq)
 
 static struct irq_chip mv64x60_chip_high = {
         .name           = "mv64x60_high",
-        .mask           = mv64x60_mask_high,
-        .mask_ack       = mv64x60_mask_high,
-        .unmask         = mv64x60_unmask_high,
+        .irq_mask       = mv64x60_mask_high,
+        .irq_mask_ack   = mv64x60_mask_high,
+        .irq_unmask     = mv64x60_unmask_high,
 };
 
 /*
  * mv64x60_chip_gpp functions
  */
 
-static void mv64x60_mask_gpp(unsigned int virq)
+static void mv64x60_mask_gpp(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
         unsigned long flags;
 
         spin_lock_irqsave(&mv64x60_lock, flags);
@@ -163,9 +163,9 @@ static void mv64x60_mask_gpp(unsigned int virq)
         (void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK);
 }
 
-static void mv64x60_mask_ack_gpp(unsigned int virq)
+static void mv64x60_mask_ack_gpp(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
         unsigned long flags;
 
         spin_lock_irqsave(&mv64x60_lock, flags);
@@ -178,9 +178,9 @@ static void mv64x60_mask_ack_gpp(unsigned int virq)
         (void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE);
 }
 
-static void mv64x60_unmask_gpp(unsigned int virq)
+static void mv64x60_unmask_gpp(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
         unsigned long flags;
 
         spin_lock_irqsave(&mv64x60_lock, flags);
@@ -193,9 +193,9 @@ static void mv64x60_unmask_gpp(unsigned int virq)
 
 static struct irq_chip mv64x60_chip_gpp = {
         .name           = "mv64x60_gpp",
-        .mask           = mv64x60_mask_gpp,
-        .mask_ack       = mv64x60_mask_ack_gpp,
-        .unmask         = mv64x60_unmask_gpp,
+        .irq_mask       = mv64x60_mask_gpp,
+        .irq_mask_ack   = mv64x60_mask_ack_gpp,
+        .irq_unmask     = mv64x60_unmask_gpp,
 };
 
 /*