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authorLennert Buytenhek <buytenh@wantstofly.org>2011-03-08 17:26:43 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-03-09 19:03:56 -0500
commit835c0553eb151588b6a1b52b28ecbbd59f7ff052 (patch)
treed6211d2cc4c2268720576cb0caccdba083c955d5 /arch/powerpc/sysdev/mpic.c
parent4e8b0cf46b2570331a4c4157d53906883c442a22 (diff)
powerpc: mpic irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev/mpic.c')
-rw-r--r--arch/powerpc/sysdev/mpic.c137
1 files changed, 72 insertions, 65 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index b0c8469e5ddd..eb7021815e2d 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -611,7 +611,7 @@ static struct mpic *mpic_find(unsigned int irq)
611 if (irq < NUM_ISA_INTERRUPTS) 611 if (irq < NUM_ISA_INTERRUPTS)
612 return NULL; 612 return NULL;
613 613
614 return irq_to_desc(irq)->chip_data; 614 return get_irq_chip_data(irq);
615} 615}
616 616
617/* Determine if the linux irq is an IPI */ 617/* Determine if the linux irq is an IPI */
@@ -636,16 +636,22 @@ static inline u32 mpic_physmask(u32 cpumask)
636 636
637#ifdef CONFIG_SMP 637#ifdef CONFIG_SMP
638/* Get the mpic structure from the IPI number */ 638/* Get the mpic structure from the IPI number */
639static inline struct mpic * mpic_from_ipi(unsigned int ipi) 639static inline struct mpic * mpic_from_ipi(struct irq_data *d)
640{ 640{
641 return irq_to_desc(ipi)->chip_data; 641 return irq_data_get_irq_chip_data(d);
642} 642}
643#endif 643#endif
644 644
645/* Get the mpic structure from the irq number */ 645/* Get the mpic structure from the irq number */
646static inline struct mpic * mpic_from_irq(unsigned int irq) 646static inline struct mpic * mpic_from_irq(unsigned int irq)
647{ 647{
648 return irq_to_desc(irq)->chip_data; 648 return get_irq_chip_data(irq);
649}
650
651/* Get the mpic structure from the irq data */
652static inline struct mpic * mpic_from_irq_data(struct irq_data *d)
653{
654 return irq_data_get_irq_chip_data(d);
649} 655}
650 656
651/* Send an EOI */ 657/* Send an EOI */
@@ -660,13 +666,13 @@ static inline void mpic_eoi(struct mpic *mpic)
660 */ 666 */
661 667
662 668
663void mpic_unmask_irq(unsigned int irq) 669void mpic_unmask_irq(struct irq_data *d)
664{ 670{
665 unsigned int loops = 100000; 671 unsigned int loops = 100000;
666 struct mpic *mpic = mpic_from_irq(irq); 672 struct mpic *mpic = mpic_from_irq_data(d);
667 unsigned int src = mpic_irq_to_hw(irq); 673 unsigned int src = mpic_irq_to_hw(d->irq);
668 674
669 DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); 675 DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src);
670 676
671 mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), 677 mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI),
672 mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & 678 mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) &
@@ -681,13 +687,13 @@ void mpic_unmask_irq(unsigned int irq)
681 } while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK); 687 } while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK);
682} 688}
683 689
684void mpic_mask_irq(unsigned int irq) 690void mpic_mask_irq(struct irq_data *d)
685{ 691{
686 unsigned int loops = 100000; 692 unsigned int loops = 100000;
687 struct mpic *mpic = mpic_from_irq(irq); 693 struct mpic *mpic = mpic_from_irq_data(d);
688 unsigned int src = mpic_irq_to_hw(irq); 694 unsigned int src = mpic_irq_to_hw(d->irq);
689 695
690 DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); 696 DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src);
691 697
692 mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), 698 mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI),
693 mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) | 699 mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) |
@@ -703,12 +709,12 @@ void mpic_mask_irq(unsigned int irq)
703 } while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK)); 709 } while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK));
704} 710}
705 711
706void mpic_end_irq(unsigned int irq) 712void mpic_end_irq(struct irq_data *d)
707{ 713{
708 struct mpic *mpic = mpic_from_irq(irq); 714 struct mpic *mpic = mpic_from_irq_data(d);
709 715
710#ifdef DEBUG_IRQ 716#ifdef DEBUG_IRQ
711 DBG("%s: end_irq: %d\n", mpic->name, irq); 717 DBG("%s: end_irq: %d\n", mpic->name, d->irq);
712#endif 718#endif
713 /* We always EOI on end_irq() even for edge interrupts since that 719 /* We always EOI on end_irq() even for edge interrupts since that
714 * should only lower the priority, the MPIC should have properly 720 * should only lower the priority, the MPIC should have properly
@@ -720,51 +726,51 @@ void mpic_end_irq(unsigned int irq)
720 726
721#ifdef CONFIG_MPIC_U3_HT_IRQS 727#ifdef CONFIG_MPIC_U3_HT_IRQS
722 728
723static void mpic_unmask_ht_irq(unsigned int irq) 729static void mpic_unmask_ht_irq(struct irq_data *d)
724{ 730{
725 struct mpic *mpic = mpic_from_irq(irq); 731 struct mpic *mpic = mpic_from_irq_data(d);
726 unsigned int src = mpic_irq_to_hw(irq); 732 unsigned int src = mpic_irq_to_hw(d->irq);
727 733
728 mpic_unmask_irq(irq); 734 mpic_unmask_irq(d);
729 735
730 if (irq_to_desc(irq)->status & IRQ_LEVEL) 736 if (irq_to_desc(d->irq)->status & IRQ_LEVEL)
731 mpic_ht_end_irq(mpic, src); 737 mpic_ht_end_irq(mpic, src);
732} 738}
733 739
734static unsigned int mpic_startup_ht_irq(unsigned int irq) 740static unsigned int mpic_startup_ht_irq(struct irq_data *d)
735{ 741{
736 struct mpic *mpic = mpic_from_irq(irq); 742 struct mpic *mpic = mpic_from_irq_data(d);
737 unsigned int src = mpic_irq_to_hw(irq); 743 unsigned int src = mpic_irq_to_hw(d->irq);
738 744
739 mpic_unmask_irq(irq); 745 mpic_unmask_irq(d);
740 mpic_startup_ht_interrupt(mpic, src, irq_to_desc(irq)->status); 746 mpic_startup_ht_interrupt(mpic, src, irq_to_desc(d->irq)->status);
741 747
742 return 0; 748 return 0;
743} 749}
744 750
745static void mpic_shutdown_ht_irq(unsigned int irq) 751static void mpic_shutdown_ht_irq(struct irq_data *d)
746{ 752{
747 struct mpic *mpic = mpic_from_irq(irq); 753 struct mpic *mpic = mpic_from_irq_data(d);
748 unsigned int src = mpic_irq_to_hw(irq); 754 unsigned int src = mpic_irq_to_hw(d->irq);
749 755
750 mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(irq)->status); 756 mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(d->irq)->status);
751 mpic_mask_irq(irq); 757 mpic_mask_irq(d);
752} 758}
753 759
754static void mpic_end_ht_irq(unsigned int irq) 760static void mpic_end_ht_irq(struct irq_data *d)
755{ 761{
756 struct mpic *mpic = mpic_from_irq(irq); 762 struct mpic *mpic = mpic_from_irq_data(d);
757 unsigned int src = mpic_irq_to_hw(irq); 763 unsigned int src = mpic_irq_to_hw(d->irq);
758 764
759#ifdef DEBUG_IRQ 765#ifdef DEBUG_IRQ
760 DBG("%s: end_irq: %d\n", mpic->name, irq); 766 DBG("%s: end_irq: %d\n", mpic->name, d->irq);
761#endif 767#endif
762 /* We always EOI on end_irq() even for edge interrupts since that 768 /* We always EOI on end_irq() even for edge interrupts since that
763 * should only lower the priority, the MPIC should have properly 769 * should only lower the priority, the MPIC should have properly
764 * latched another edge interrupt coming in anyway 770 * latched another edge interrupt coming in anyway
765 */ 771 */
766 772
767 if (irq_to_desc(irq)->status & IRQ_LEVEL) 773 if (irq_to_desc(d->irq)->status & IRQ_LEVEL)
768 mpic_ht_end_irq(mpic, src); 774 mpic_ht_end_irq(mpic, src);
769 mpic_eoi(mpic); 775 mpic_eoi(mpic);
770} 776}
@@ -772,23 +778,23 @@ static void mpic_end_ht_irq(unsigned int irq)
772 778
773#ifdef CONFIG_SMP 779#ifdef CONFIG_SMP
774 780
775static void mpic_unmask_ipi(unsigned int irq) 781static void mpic_unmask_ipi(struct irq_data *d)
776{ 782{
777 struct mpic *mpic = mpic_from_ipi(irq); 783 struct mpic *mpic = mpic_from_ipi(d);
778 unsigned int src = mpic_irq_to_hw(irq) - mpic->ipi_vecs[0]; 784 unsigned int src = mpic_irq_to_hw(d->irq) - mpic->ipi_vecs[0];
779 785
780 DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, irq, src); 786 DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src);
781 mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK); 787 mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK);
782} 788}
783 789
784static void mpic_mask_ipi(unsigned int irq) 790static void mpic_mask_ipi(struct irq_data *d)
785{ 791{
786 /* NEVER disable an IPI... that's just plain wrong! */ 792 /* NEVER disable an IPI... that's just plain wrong! */
787} 793}
788 794
789static void mpic_end_ipi(unsigned int irq) 795static void mpic_end_ipi(struct irq_data *d)
790{ 796{
791 struct mpic *mpic = mpic_from_ipi(irq); 797 struct mpic *mpic = mpic_from_ipi(d);
792 798
793 /* 799 /*
794 * IPIs are marked IRQ_PER_CPU. This has the side effect of 800 * IPIs are marked IRQ_PER_CPU. This has the side effect of
@@ -802,10 +808,11 @@ static void mpic_end_ipi(unsigned int irq)
802 808
803#endif /* CONFIG_SMP */ 809#endif /* CONFIG_SMP */
804 810
805int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask) 811int mpic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
812 bool force)
806{ 813{
807 struct mpic *mpic = mpic_from_irq(irq); 814 struct mpic *mpic = mpic_from_irq_data(d);
808 unsigned int src = mpic_irq_to_hw(irq); 815 unsigned int src = mpic_irq_to_hw(d->irq);
809 816
810 if (mpic->flags & MPIC_SINGLE_DEST_CPU) { 817 if (mpic->flags & MPIC_SINGLE_DEST_CPU) {
811 int cpuid = irq_choose_cpu(cpumask); 818 int cpuid = irq_choose_cpu(cpumask);
@@ -848,15 +855,15 @@ static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)
848 } 855 }
849} 856}
850 857
851int mpic_set_irq_type(unsigned int virq, unsigned int flow_type) 858int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
852{ 859{
853 struct mpic *mpic = mpic_from_irq(virq); 860 struct mpic *mpic = mpic_from_irq_data(d);
854 unsigned int src = mpic_irq_to_hw(virq); 861 unsigned int src = mpic_irq_to_hw(d->irq);
855 struct irq_desc *desc = irq_to_desc(virq); 862 struct irq_desc *desc = irq_to_desc(d->irq);
856 unsigned int vecpri, vold, vnew; 863 unsigned int vecpri, vold, vnew;
857 864
858 DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", 865 DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n",
859 mpic, virq, src, flow_type); 866 mpic, d->irq, src, flow_type);
860 867
861 if (src >= mpic->irq_count) 868 if (src >= mpic->irq_count)
862 return -EINVAL; 869 return -EINVAL;
@@ -907,28 +914,28 @@ void mpic_set_vector(unsigned int virq, unsigned int vector)
907} 914}
908 915
909static struct irq_chip mpic_irq_chip = { 916static struct irq_chip mpic_irq_chip = {
910 .mask = mpic_mask_irq, 917 .irq_mask = mpic_mask_irq,
911 .unmask = mpic_unmask_irq, 918 .irq_unmask = mpic_unmask_irq,
912 .eoi = mpic_end_irq, 919 .irq_eoi = mpic_end_irq,
913 .set_type = mpic_set_irq_type, 920 .irq_set_type = mpic_set_irq_type,
914}; 921};
915 922
916#ifdef CONFIG_SMP 923#ifdef CONFIG_SMP
917static struct irq_chip mpic_ipi_chip = { 924static struct irq_chip mpic_ipi_chip = {
918 .mask = mpic_mask_ipi, 925 .irq_mask = mpic_mask_ipi,
919 .unmask = mpic_unmask_ipi, 926 .irq_unmask = mpic_unmask_ipi,
920 .eoi = mpic_end_ipi, 927 .irq_eoi = mpic_end_ipi,
921}; 928};
922#endif /* CONFIG_SMP */ 929#endif /* CONFIG_SMP */
923 930
924#ifdef CONFIG_MPIC_U3_HT_IRQS 931#ifdef CONFIG_MPIC_U3_HT_IRQS
925static struct irq_chip mpic_irq_ht_chip = { 932static struct irq_chip mpic_irq_ht_chip = {
926 .startup = mpic_startup_ht_irq, 933 .irq_startup = mpic_startup_ht_irq,
927 .shutdown = mpic_shutdown_ht_irq, 934 .irq_shutdown = mpic_shutdown_ht_irq,
928 .mask = mpic_mask_irq, 935 .irq_mask = mpic_mask_irq,
929 .unmask = mpic_unmask_ht_irq, 936 .irq_unmask = mpic_unmask_ht_irq,
930 .eoi = mpic_end_ht_irq, 937 .irq_eoi = mpic_end_ht_irq,
931 .set_type = mpic_set_irq_type, 938 .irq_set_type = mpic_set_irq_type,
932}; 939};
933#endif /* CONFIG_MPIC_U3_HT_IRQS */ 940#endif /* CONFIG_MPIC_U3_HT_IRQS */
934 941
@@ -1060,12 +1067,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
1060 mpic->hc_irq = mpic_irq_chip; 1067 mpic->hc_irq = mpic_irq_chip;
1061 mpic->hc_irq.name = name; 1068 mpic->hc_irq.name = name;
1062 if (flags & MPIC_PRIMARY) 1069 if (flags & MPIC_PRIMARY)
1063 mpic->hc_irq.set_affinity = mpic_set_affinity; 1070 mpic->hc_irq.irq_set_affinity = mpic_set_affinity;
1064#ifdef CONFIG_MPIC_U3_HT_IRQS 1071#ifdef CONFIG_MPIC_U3_HT_IRQS
1065 mpic->hc_ht_irq = mpic_irq_ht_chip; 1072 mpic->hc_ht_irq = mpic_irq_ht_chip;
1066 mpic->hc_ht_irq.name = name; 1073 mpic->hc_ht_irq.name = name;
1067 if (flags & MPIC_PRIMARY) 1074 if (flags & MPIC_PRIMARY)
1068 mpic->hc_ht_irq.set_affinity = mpic_set_affinity; 1075 mpic->hc_ht_irq.irq_set_affinity = mpic_set_affinity;
1069#endif /* CONFIG_MPIC_U3_HT_IRQS */ 1076#endif /* CONFIG_MPIC_U3_HT_IRQS */
1070 1077
1071#ifdef CONFIG_SMP 1078#ifdef CONFIG_SMP