powerpc/mpic: Fix MPIC_BROKEN_REGREAD on non broken MPICs

The workaround enabled by CONFIG_MPIC_BROKEN_REGREAD does not work
on non-broken MPICs. The symptom is no interrupts being received.

The fix is twofold. Firstly the code was broken for multiple isus,
we need to index into the shadow array with the src_no, not the idx.
Secondly, we always do the read, but only use the VECPRI_MASK and
VECPRI_ACTIVITY bits from the hardware, the rest of "val" comes
from the shadow.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 8 insertions, 5 deletions

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 3981ae4cb58e..30c44e6b0413 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -230,14 +230,16 @@ static inline u32 _mpic_irq_read(struct mpic *mpic, unsigned int src_no, unsigne
 {
         unsigned int    isu = src_no >> mpic->isu_shift;
         unsigned int    idx = src_no & mpic->isu_mask;
+        unsigned int    val;
 
+        val = _mpic_read(mpic->reg_type, &mpic->isus[isu],
+                         reg + (idx * MPIC_INFO(IRQ_STRIDE)));
 #ifdef CONFIG_MPIC_BROKEN_REGREAD
         if (reg == 0)
-                return mpic->isu_reg0_shadow[idx];
-        else
+                val = (val & (MPIC_VECPRI_MASK | MPIC_VECPRI_ACTIVITY)) |
+                        mpic->isu_reg0_shadow[src_no];
 #endif
-                return _mpic_read(mpic->reg_type, &mpic->isus[isu],
-                                  reg + (idx * MPIC_INFO(IRQ_STRIDE)));
+        return val;
 }
 
 static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no,
@@ -251,7 +253,8 @@ static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no,
 
 #ifdef CONFIG_MPIC_BROKEN_REGREAD
         if (reg == 0)
-                mpic->isu_reg0_shadow[idx] = value;
+                mpic->isu_reg0_shadow[src_no] =
+                        value & ~(MPIC_VECPRI_MASK | MPIC_VECPRI_ACTIVITY);
 #endif
 }