diff options
author | Paul Mackerras <paulus@samba.org> | 2005-10-26 07:55:33 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2005-10-26 07:55:33 -0400 |
commit | bd561c79dce9036c9efb17420b6cf8763c8c9de3 (patch) | |
tree | d716828d74afe4dd6bcc012d761c0a3006c35e88 /arch/powerpc/sysdev/mpic.c | |
parent | fa39dc437a41733adaba241fd9036760283a516a (diff) |
powerpc: Fix incorrect timer register addresses in mpic.c
We were computing the wrong address for the MPIC timer registers,
so when we went to initialize them we would have been hitting some
unrelated ioremap... oops.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/sysdev/mpic.c')
-rw-r--r-- | arch/powerpc/sysdev/mpic.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 3948e759d41a..105f05341a41 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -358,7 +358,7 @@ static void mpic_enable_irq(unsigned int irq) | |||
358 | struct mpic *mpic = mpic_from_irq(irq); | 358 | struct mpic *mpic = mpic_from_irq(irq); |
359 | unsigned int src = irq - mpic->irq_offset; | 359 | unsigned int src = irq - mpic->irq_offset; |
360 | 360 | ||
361 | DBG("%s: enable_irq: %d (src %d)\n", mpic->name, irq, src); | 361 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); |
362 | 362 | ||
363 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, | 363 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, |
364 | mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & ~MPIC_VECPRI_MASK); | 364 | mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & ~MPIC_VECPRI_MASK); |
@@ -511,7 +511,7 @@ struct mpic * __init mpic_alloc(unsigned long phys_addr, | |||
511 | 511 | ||
512 | /* Map the global registers */ | 512 | /* Map the global registers */ |
513 | mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000); | 513 | mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000); |
514 | mpic->tmregs = mpic->gregs + (MPIC_TIMER_BASE >> 2); | 514 | mpic->tmregs = mpic->gregs + ((MPIC_TIMER_BASE - MPIC_GREG_BASE) >> 2); |
515 | BUG_ON(mpic->gregs == NULL); | 515 | BUG_ON(mpic->gregs == NULL); |
516 | 516 | ||
517 | /* Reset */ | 517 | /* Reset */ |
@@ -648,7 +648,6 @@ void __init mpic_init(struct mpic *mpic) | |||
648 | continue; | 648 | continue; |
649 | irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU; | 649 | irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU; |
650 | irq_desc[mpic->ipi_offset+i].handler = &mpic->hc_ipi; | 650 | irq_desc[mpic->ipi_offset+i].handler = &mpic->hc_ipi; |
651 | |||
652 | #endif /* CONFIG_SMP */ | 651 | #endif /* CONFIG_SMP */ |
653 | } | 652 | } |
654 | 653 | ||