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authorLi Yang <leoli@freescale.com>2007-10-19 07:38:43 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-12-11 14:57:18 -0500
commitf03ca957faa4d51f3a9c52c1ad5ea61a0978c637 (patch)
tree826d9603580b11a7910e0446c351cbf64e841d81 /arch/powerpc/sysdev/ipic.h
parenta58d52443fca9cc28ed580e3ccfcae3c3d49df33 (diff)
[POWERPC] ipic: add new interrupts introduced by new chip
These interrupts are introduced by the latest Freescale SoC such as MPC837x. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev/ipic.h')
-rw-r--r--arch/powerpc/sysdev/ipic.h7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/powerpc/sysdev/ipic.h b/arch/powerpc/sysdev/ipic.h
index bb309a501b2d..1158b8f5cb20 100644
--- a/arch/powerpc/sysdev/ipic.h
+++ b/arch/powerpc/sysdev/ipic.h
@@ -23,13 +23,12 @@
23#define IPIC_IRQ_EXT7 23 23#define IPIC_IRQ_EXT7 23
24 24
25/* Default Priority Registers */ 25/* Default Priority Registers */
26#define IPIC_SIPRR_A_DEFAULT 0x05309770 26#define IPIC_PRIORITY_DEFAULT 0x05309770
27#define IPIC_SIPRR_D_DEFAULT 0x05309770
28#define IPIC_SMPRR_A_DEFAULT 0x05309770
29#define IPIC_SMPRR_B_DEFAULT 0x05309770
30 27
31/* System Global Interrupt Configuration Register */ 28/* System Global Interrupt Configuration Register */
32#define SICFR_IPSA 0x00010000 29#define SICFR_IPSA 0x00010000
30#define SICFR_IPSB 0x00020000
31#define SICFR_IPSC 0x00040000
33#define SICFR_IPSD 0x00080000 32#define SICFR_IPSD 0x00080000
34#define SICFR_MPSA 0x00200000 33#define SICFR_MPSA 0x00200000
35#define SICFR_MPSB 0x00400000 34#define SICFR_MPSB 0x00400000