diff options
author | Ingo Molnar <mingo@elte.hu> | 2011-03-30 03:07:39 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2011-03-30 03:07:43 -0400 |
commit | 9f644c4ba86b76159d36747fda7da496f72a1872 (patch) | |
tree | 31e025a5f283aff691fb636bf07fd0b445cf07a3 /arch/powerpc/sysdev/fsl_msi.c | |
parent | 1b7155f7de119870f0d3fad89f125de2ff6c16be (diff) | |
parent | 0ce790e7d736cedc563e1fb4e998babf5a4dbc3d (diff) |
Merge commit 'v2.6.39-rc1' into perf/urgent
Merge reason: use the post-merge-window tree.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/powerpc/sysdev/fsl_msi.c')
-rw-r--r-- | arch/powerpc/sysdev/fsl_msi.c | 43 |
1 files changed, 22 insertions, 21 deletions
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index 58e09b2833f2..d5679dc1e20f 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c | |||
@@ -64,10 +64,10 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, | |||
64 | struct fsl_msi *msi_data = h->host_data; | 64 | struct fsl_msi *msi_data = h->host_data; |
65 | struct irq_chip *chip = &fsl_msi_chip; | 65 | struct irq_chip *chip = &fsl_msi_chip; |
66 | 66 | ||
67 | irq_to_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; | 67 | irq_set_status_flags(virq, IRQ_TYPE_EDGE_FALLING); |
68 | 68 | ||
69 | set_irq_chip_data(virq, msi_data); | 69 | irq_set_chip_data(virq, msi_data); |
70 | set_irq_chip_and_handler(virq, chip, handle_edge_irq); | 70 | irq_set_chip_and_handler(virq, chip, handle_edge_irq); |
71 | 71 | ||
72 | return 0; | 72 | return 0; |
73 | } | 73 | } |
@@ -110,8 +110,8 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev) | |||
110 | list_for_each_entry(entry, &pdev->msi_list, list) { | 110 | list_for_each_entry(entry, &pdev->msi_list, list) { |
111 | if (entry->irq == NO_IRQ) | 111 | if (entry->irq == NO_IRQ) |
112 | continue; | 112 | continue; |
113 | msi_data = get_irq_data(entry->irq); | 113 | msi_data = irq_get_handler_data(entry->irq); |
114 | set_irq_msi(entry->irq, NULL); | 114 | irq_set_msi_desc(entry->irq, NULL); |
115 | msi_bitmap_free_hwirqs(&msi_data->bitmap, | 115 | msi_bitmap_free_hwirqs(&msi_data->bitmap, |
116 | virq_to_hw(entry->irq), 1); | 116 | virq_to_hw(entry->irq), 1); |
117 | irq_dispose_mapping(entry->irq); | 117 | irq_dispose_mapping(entry->irq); |
@@ -168,8 +168,8 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
168 | rc = -ENOSPC; | 168 | rc = -ENOSPC; |
169 | goto out_free; | 169 | goto out_free; |
170 | } | 170 | } |
171 | set_irq_data(virq, msi_data); | 171 | irq_set_handler_data(virq, msi_data); |
172 | set_irq_msi(virq, entry); | 172 | irq_set_msi_desc(virq, entry); |
173 | 173 | ||
174 | fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data); | 174 | fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data); |
175 | write_msi_msg(virq, &msg); | 175 | write_msi_msg(virq, &msg); |
@@ -183,7 +183,8 @@ out_free: | |||
183 | 183 | ||
184 | static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) | 184 | static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) |
185 | { | 185 | { |
186 | struct irq_chip *chip = get_irq_desc_chip(desc); | 186 | struct irq_chip *chip = irq_desc_get_chip(desc); |
187 | struct irq_data *idata = irq_desc_get_irq_data(desc); | ||
187 | unsigned int cascade_irq; | 188 | unsigned int cascade_irq; |
188 | struct fsl_msi *msi_data; | 189 | struct fsl_msi *msi_data; |
189 | int msir_index = -1; | 190 | int msir_index = -1; |
@@ -192,20 +193,20 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) | |||
192 | u32 have_shift = 0; | 193 | u32 have_shift = 0; |
193 | struct fsl_msi_cascade_data *cascade_data; | 194 | struct fsl_msi_cascade_data *cascade_data; |
194 | 195 | ||
195 | cascade_data = (struct fsl_msi_cascade_data *)get_irq_data(irq); | 196 | cascade_data = (struct fsl_msi_cascade_data *)irq_get_handler_data(irq); |
196 | msi_data = cascade_data->msi_data; | 197 | msi_data = cascade_data->msi_data; |
197 | 198 | ||
198 | raw_spin_lock(&desc->lock); | 199 | raw_spin_lock(&desc->lock); |
199 | if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { | 200 | if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { |
200 | if (chip->irq_mask_ack) | 201 | if (chip->irq_mask_ack) |
201 | chip->irq_mask_ack(&desc->irq_data); | 202 | chip->irq_mask_ack(idata); |
202 | else { | 203 | else { |
203 | chip->irq_mask(&desc->irq_data); | 204 | chip->irq_mask(idata); |
204 | chip->irq_ack(&desc->irq_data); | 205 | chip->irq_ack(idata); |
205 | } | 206 | } |
206 | } | 207 | } |
207 | 208 | ||
208 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 209 | if (unlikely(irqd_irq_inprogress(idata))) |
209 | goto unlock; | 210 | goto unlock; |
210 | 211 | ||
211 | msir_index = cascade_data->index; | 212 | msir_index = cascade_data->index; |
@@ -213,7 +214,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) | |||
213 | if (msir_index >= NR_MSI_REG) | 214 | if (msir_index >= NR_MSI_REG) |
214 | cascade_irq = NO_IRQ; | 215 | cascade_irq = NO_IRQ; |
215 | 216 | ||
216 | desc->status |= IRQ_INPROGRESS; | 217 | irqd_set_chained_irq_inprogress(idata); |
217 | switch (msi_data->feature & FSL_PIC_IP_MASK) { | 218 | switch (msi_data->feature & FSL_PIC_IP_MASK) { |
218 | case FSL_PIC_IP_MPIC: | 219 | case FSL_PIC_IP_MPIC: |
219 | msir_value = fsl_msi_read(msi_data->msi_regs, | 220 | msir_value = fsl_msi_read(msi_data->msi_regs, |
@@ -235,15 +236,15 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) | |||
235 | have_shift += intr_index + 1; | 236 | have_shift += intr_index + 1; |
236 | msir_value = msir_value >> (intr_index + 1); | 237 | msir_value = msir_value >> (intr_index + 1); |
237 | } | 238 | } |
238 | desc->status &= ~IRQ_INPROGRESS; | 239 | irqd_clr_chained_irq_inprogress(idata); |
239 | 240 | ||
240 | switch (msi_data->feature & FSL_PIC_IP_MASK) { | 241 | switch (msi_data->feature & FSL_PIC_IP_MASK) { |
241 | case FSL_PIC_IP_MPIC: | 242 | case FSL_PIC_IP_MPIC: |
242 | chip->irq_eoi(&desc->irq_data); | 243 | chip->irq_eoi(idata); |
243 | break; | 244 | break; |
244 | case FSL_PIC_IP_IPIC: | 245 | case FSL_PIC_IP_IPIC: |
245 | if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask) | 246 | if (!irqd_irq_disabled(idata) && chip->irq_unmask) |
246 | chip->irq_unmask(&desc->irq_data); | 247 | chip->irq_unmask(idata); |
247 | break; | 248 | break; |
248 | } | 249 | } |
249 | unlock: | 250 | unlock: |
@@ -261,7 +262,7 @@ static int fsl_of_msi_remove(struct platform_device *ofdev) | |||
261 | for (i = 0; i < NR_MSI_REG; i++) { | 262 | for (i = 0; i < NR_MSI_REG; i++) { |
262 | virq = msi->msi_virqs[i]; | 263 | virq = msi->msi_virqs[i]; |
263 | if (virq != NO_IRQ) { | 264 | if (virq != NO_IRQ) { |
264 | cascade_data = get_irq_data(virq); | 265 | cascade_data = irq_get_handler_data(virq); |
265 | kfree(cascade_data); | 266 | kfree(cascade_data); |
266 | irq_dispose_mapping(virq); | 267 | irq_dispose_mapping(virq); |
267 | } | 268 | } |
@@ -297,8 +298,8 @@ static int __devinit fsl_msi_setup_hwirq(struct fsl_msi *msi, | |||
297 | msi->msi_virqs[irq_index] = virt_msir; | 298 | msi->msi_virqs[irq_index] = virt_msir; |
298 | cascade_data->index = offset + irq_index; | 299 | cascade_data->index = offset + irq_index; |
299 | cascade_data->msi_data = msi; | 300 | cascade_data->msi_data = msi; |
300 | set_irq_data(virt_msir, cascade_data); | 301 | irq_set_handler_data(virt_msir, cascade_data); |
301 | set_irq_chained_handler(virt_msir, fsl_msi_cascade); | 302 | irq_set_chained_handler(virt_msir, fsl_msi_cascade); |
302 | 303 | ||
303 | return 0; | 304 | return 0; |
304 | } | 305 | } |