diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-04-29 20:16:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-04-29 20:16:36 -0400 |
commit | 553cbf0a8f19c669bed82028988aa977558ef551 (patch) | |
tree | c0aecc102d1d3bf26f56dc69775d1657a456e2d4 /arch/powerpc/sysdev/cpm1.c | |
parent | 27fb8d7b1fe7c2fa2d7c1f243b899793e1b080e0 (diff) | |
parent | 76ad4b8ebd5c68c8bf490bdb1fb4dcbc266e5223 (diff) |
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc/ps3: Update ps3_defconfig
powerpc/ps3: Update platform maintainer
powerpc/pseries: Flush lazy kernel mappings after unplug operations
powerpc/numa: Add form 1 NUMA affinity
powerpc/fsl-booke: Fix CONFIG_RELOCATABLE support on FSL Book-E ppc32
powerpc: 2.6.34 update of defconfigs for embedded 6xx/7xxx, 8xx, 8xxx
powerpc/mpc8xxx defconfigs - turn off SYSFS_DEPRECATED
powerpc/83xx: configure SIL SATA driver in 83xx-wide defconfig
powerpc/83xx: enable EPOLL syscall in defconfig
powerpc/83xx: add RTC drivers in 83xx defconfig
powerpc/fsl-cpm: Configure clock correctly for SCC
powerpc/fsl_booke: Correct test for MMU_FTR_BIG_PHYS
powerpc/85xx/86xx: Fix build w/ CONFIG_PCI=n
Diffstat (limited to 'arch/powerpc/sysdev/cpm1.c')
-rw-r--r-- | arch/powerpc/sysdev/cpm1.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 4dae3698bf24..8d103ca6d6ab 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c | |||
@@ -486,9 +486,6 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode) | |||
486 | return -EINVAL; | 486 | return -EINVAL; |
487 | } | 487 | } |
488 | 488 | ||
489 | if (reg == &mpc8xx_immr->im_cpm.cp_sicr && mode == CPM_CLK_RX) | ||
490 | shift += 3; | ||
491 | |||
492 | for (i = 0; i < ARRAY_SIZE(clk_map); i++) { | 489 | for (i = 0; i < ARRAY_SIZE(clk_map); i++) { |
493 | if (clk_map[i][0] == target && clk_map[i][1] == clock) { | 490 | if (clk_map[i][0] == target && clk_map[i][1] == clock) { |
494 | bits = clk_map[i][2]; | 491 | bits = clk_map[i][2]; |
@@ -503,6 +500,17 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode) | |||
503 | 500 | ||
504 | bits <<= shift; | 501 | bits <<= shift; |
505 | mask <<= shift; | 502 | mask <<= shift; |
503 | |||
504 | if (reg == &mpc8xx_immr->im_cpm.cp_sicr) { | ||
505 | if (mode == CPM_CLK_RTX) { | ||
506 | bits |= bits << 3; | ||
507 | mask |= mask << 3; | ||
508 | } else if (mode == CPM_CLK_RX) { | ||
509 | bits <<= 3; | ||
510 | mask <<= 3; | ||
511 | } | ||
512 | } | ||
513 | |||
506 | out_be32(reg, (in_be32(reg) & ~mask) | bits); | 514 | out_be32(reg, (in_be32(reg) & ~mask) | bits); |
507 | 515 | ||
508 | return 0; | 516 | return 0; |