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authorScott Wood <scottwood@freescale.com>2007-09-14 15:22:36 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-10-03 21:36:35 -0400
commitfb533d0c5a9783ecafa9a177bace6384c47282a9 (patch)
tree7be09cf401674b176455530ab4fec98bf9681751 /arch/powerpc/sysdev/commproc.c
parentccf0d68e835003f19d5a9463d5a8c1e092d3a31a (diff)
[POWERPC] 8xx: Infrastructure code cleanup.
1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev/commproc.c')
-rw-r--r--arch/powerpc/sysdev/commproc.c67
1 files changed, 38 insertions, 29 deletions
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index 160a8b49bdea..f8f3741acd87 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -47,8 +47,9 @@
47static void m8xx_cpm_dpinit(void); 47static void m8xx_cpm_dpinit(void);
48static uint host_buffer; /* One page of host buffer */ 48static uint host_buffer; /* One page of host buffer */
49static uint host_end; /* end + 1 */ 49static uint host_end; /* end + 1 */
50cpm8xx_t *cpmp; /* Pointer to comm processor space */ 50cpm8xx_t __iomem *cpmp; /* Pointer to comm processor space */
51cpic8xx_t *cpic_reg; 51immap_t __iomem *mpc8xx_immr;
52static cpic8xx_t __iomem *cpic_reg;
52 53
53static struct irq_host *cpm_pic_host; 54static struct irq_host *cpm_pic_host;
54 55
@@ -133,16 +134,19 @@ unsigned int cpm_pic_init(void)
133 134
134 pr_debug("cpm_pic_init\n"); 135 pr_debug("cpm_pic_init\n");
135 136
136 np = of_find_compatible_node(NULL, "cpm-pic", "CPM"); 137 np = of_find_compatible_node(NULL, NULL, "fsl,cpm1-pic");
138 if (np == NULL)
139 np = of_find_compatible_node(NULL, "cpm-pic", "CPM");
137 if (np == NULL) { 140 if (np == NULL) {
138 printk(KERN_ERR "CPM PIC init: can not find cpm-pic node\n"); 141 printk(KERN_ERR "CPM PIC init: can not find cpm-pic node\n");
139 return sirq; 142 return sirq;
140 } 143 }
144
141 ret = of_address_to_resource(np, 0, &res); 145 ret = of_address_to_resource(np, 0, &res);
142 if (ret) 146 if (ret)
143 goto end; 147 goto end;
144 148
145 cpic_reg = (void *)ioremap(res.start, res.end - res.start + 1); 149 cpic_reg = ioremap(res.start, res.end - res.start + 1);
146 if (cpic_reg == NULL) 150 if (cpic_reg == NULL)
147 goto end; 151 goto end;
148 152
@@ -165,14 +169,16 @@ unsigned int cpm_pic_init(void)
165 sirq = NO_IRQ; 169 sirq = NO_IRQ;
166 goto end; 170 goto end;
167 } 171 }
168 of_node_put(np);
169 172
170 /* Install our own error handler. */ 173 /* Install our own error handler. */
171 np = of_find_node_by_type(NULL, "cpm"); 174 np = of_find_compatible_node(NULL, NULL, "fsl,cpm1");
175 if (np == NULL)
176 np = of_find_node_by_type(NULL, "cpm");
172 if (np == NULL) { 177 if (np == NULL) {
173 printk(KERN_ERR "CPM PIC init: can not find cpm node\n"); 178 printk(KERN_ERR "CPM PIC init: can not find cpm node\n");
174 goto end; 179 goto end;
175 } 180 }
181
176 eirq = irq_of_parse_and_map(np, 0); 182 eirq = irq_of_parse_and_map(np, 0);
177 if (eirq == NO_IRQ) 183 if (eirq == NO_IRQ)
178 goto end; 184 goto end;
@@ -189,21 +195,28 @@ end:
189 195
190void cpm_reset(void) 196void cpm_reset(void)
191{ 197{
192 cpm8xx_t *commproc; 198 sysconf8xx_t __iomem *siu_conf;
193 sysconf8xx_t *siu_conf;
194 199
195 commproc = (cpm8xx_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); 200 mpc8xx_immr = ioremap(get_immrbase(), 0x4000);
201 if (!mpc8xx_immr) {
202 printk(KERN_CRIT "Could not map IMMR\n");
203 return;
204 }
196 205
197#ifdef CONFIG_UCODE_PATCH 206 cpmp = &mpc8xx_immr->im_cpm;
207
208#ifndef CONFIG_PPC_EARLY_DEBUG_CPM
198 /* Perform a reset. 209 /* Perform a reset.
199 */ 210 */
200 out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG); 211 out_be16(&cpmp->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
201 212
202 /* Wait for it. 213 /* Wait for it.
203 */ 214 */
204 while (in_be16(&commproc->cp_cpcr) & CPM_CR_FLG); 215 while (in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG);
216#endif
205 217
206 cpm_load_patch(commproc); 218#ifdef CONFIG_UCODE_PATCH
219 cpm_load_patch(cpmp);
207#endif 220#endif
208 221
209 /* Set SDMA Bus Request priority 5. 222 /* Set SDMA Bus Request priority 5.
@@ -212,16 +225,12 @@ void cpm_reset(void)
212 * manual recommends it. 225 * manual recommends it.
213 * Bit 25, FAM can also be set to use FEC aggressive mode (860T). 226 * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
214 */ 227 */
215 siu_conf = (sysconf8xx_t*)immr_map(im_siu_conf); 228 siu_conf = immr_map(im_siu_conf);
216 out_be32(&siu_conf->sc_sdcr, 1); 229 out_be32(&siu_conf->sc_sdcr, 1);
217 immr_unmap(siu_conf); 230 immr_unmap(siu_conf);
218 231
219 /* Reclaim the DP memory for our use. */ 232 /* Reclaim the DP memory for our use. */
220 m8xx_cpm_dpinit(); 233 m8xx_cpm_dpinit();
221
222 /* Tell everyone where the comm processor resides.
223 */
224 cpmp = commproc;
225} 234}
226 235
227/* We used to do this earlier, but have to postpone as long as possible 236/* We used to do this earlier, but have to postpone as long as possible
@@ -271,20 +280,20 @@ m8xx_cpm_hostalloc(uint size)
271void 280void
272cpm_setbrg(uint brg, uint rate) 281cpm_setbrg(uint brg, uint rate)
273{ 282{
274 volatile uint *bp; 283 u32 __iomem *bp;
275 284
276 /* This is good enough to get SMCs running..... 285 /* This is good enough to get SMCs running.....
277 */ 286 */
278 bp = (uint *)&cpmp->cp_brgc1; 287 bp = &cpmp->cp_brgc1;
279 bp += brg; 288 bp += brg;
280 /* The BRG has a 12-bit counter. For really slow baud rates (or 289 /* The BRG has a 12-bit counter. For really slow baud rates (or
281 * really fast processors), we may have to further divide by 16. 290 * really fast processors), we may have to further divide by 16.
282 */ 291 */
283 if (((BRG_UART_CLK / rate) - 1) < 4096) 292 if (((BRG_UART_CLK / rate) - 1) < 4096)
284 *bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN; 293 out_be32(bp, (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN);
285 else 294 else
286 *bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) | 295 out_be32(bp, (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) |
287 CPM_BRG_EN | CPM_BRG_DIV16; 296 CPM_BRG_EN | CPM_BRG_DIV16);
288} 297}
289 298
290/* 299/*
@@ -299,15 +308,15 @@ static rh_block_t cpm_boot_dpmem_rh_block[16];
299static rh_info_t cpm_dpmem_info; 308static rh_info_t cpm_dpmem_info;
300 309
301#define CPM_DPMEM_ALIGNMENT 8 310#define CPM_DPMEM_ALIGNMENT 8
302static u8 *dpram_vbase; 311static u8 __iomem *dpram_vbase;
303static uint dpram_pbase; 312static phys_addr_t dpram_pbase;
304 313
305void m8xx_cpm_dpinit(void) 314static void m8xx_cpm_dpinit(void)
306{ 315{
307 spin_lock_init(&cpm_dpmem_lock); 316 spin_lock_init(&cpm_dpmem_lock);
308 317
309 dpram_vbase = immr_map_size(im_cpm.cp_dpmem, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE); 318 dpram_vbase = cpmp->cp_dpmem;
310 dpram_pbase = (uint)&((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem; 319 dpram_pbase = get_immrbase() + offsetof(immap_t, im_cpm.cp_dpmem);
311 320
312 /* Initialize the info header */ 321 /* Initialize the info header */
313 rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT, 322 rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT,
@@ -383,7 +392,7 @@ void *cpm_dpram_addr(unsigned long offset)
383} 392}
384EXPORT_SYMBOL(cpm_dpram_addr); 393EXPORT_SYMBOL(cpm_dpram_addr);
385 394
386uint cpm_dpram_phys(u8* addr) 395uint cpm_dpram_phys(u8 *addr)
387{ 396{
388 return (dpram_pbase + (uint)(addr - dpram_vbase)); 397 return (dpram_pbase + (uint)(addr - dpram_vbase));
389} 398}