diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-09-18 02:04:33 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-09-18 02:04:33 -0400 |
commit | caa1d631fc99940f866480c2bb88a6f5a235e7a2 (patch) | |
tree | d09d648dbccaa7bf23deb336e8cf52acbc360b8d /arch/powerpc/platforms | |
parent | 1e38b7140185e384da216aff66a711df09b5afc9 (diff) | |
parent | 905e75c46dba5f3061049277e4eb7110beedba43 (diff) |
Merge remote-tracking branch 'kumar/next' into next
Diffstat (limited to 'arch/powerpc/platforms')
34 files changed, 629 insertions, 474 deletions
diff --git a/arch/powerpc/platforms/44x/currituck.c b/arch/powerpc/platforms/44x/currituck.c index 9f6c33d63a42..6bd89a0e0dea 100644 --- a/arch/powerpc/platforms/44x/currituck.c +++ b/arch/powerpc/platforms/44x/currituck.c | |||
@@ -21,7 +21,6 @@ | |||
21 | */ | 21 | */ |
22 | 22 | ||
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <linux/memblock.h> | ||
25 | #include <linux/of.h> | 24 | #include <linux/of.h> |
26 | #include <linux/of_platform.h> | 25 | #include <linux/of_platform.h> |
27 | #include <linux/rtc.h> | 26 | #include <linux/rtc.h> |
@@ -159,13 +158,8 @@ static void __init ppc47x_setup_arch(void) | |||
159 | 158 | ||
160 | /* No need to check the DMA config as we /know/ our windows are all of | 159 | /* No need to check the DMA config as we /know/ our windows are all of |
161 | * RAM. Lets hope that doesn't change */ | 160 | * RAM. Lets hope that doesn't change */ |
162 | #ifdef CONFIG_SWIOTLB | 161 | swiotlb_detect_4g(); |
163 | if ((memblock_end_of_DRAM() - 1) > 0xffffffff) { | 162 | |
164 | ppc_swiotlb_enable = 1; | ||
165 | set_pci_dma_ops(&swiotlb_dma_ops); | ||
166 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; | ||
167 | } | ||
168 | #endif | ||
169 | ppc47x_smp_init(); | 163 | ppc47x_smp_init(); |
170 | } | 164 | } |
171 | 165 | ||
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 159c01e91463..02d02a09942d 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -104,6 +104,13 @@ config P1022_DS | |||
104 | help | 104 | help |
105 | This option enables support for the Freescale P1022DS reference board. | 105 | This option enables support for the Freescale P1022DS reference board. |
106 | 106 | ||
107 | config P1022_RDK | ||
108 | bool "Freescale / iVeia P1022 RDK" | ||
109 | select DEFAULT_UIMAGE | ||
110 | help | ||
111 | This option enables support for the Freescale / iVeia P1022RDK | ||
112 | reference board. | ||
113 | |||
107 | config P1023_RDS | 114 | config P1023_RDS |
108 | bool "Freescale P1023 RDS" | 115 | bool "Freescale P1023 RDS" |
109 | select DEFAULT_UIMAGE | 116 | select DEFAULT_UIMAGE |
@@ -254,6 +261,20 @@ config P5020_DS | |||
254 | help | 261 | help |
255 | This option enables support for the P5020 DS board | 262 | This option enables support for the P5020 DS board |
256 | 263 | ||
264 | config P5040_DS | ||
265 | bool "Freescale P5040 DS" | ||
266 | select DEFAULT_UIMAGE | ||
267 | select E500 | ||
268 | select PPC_E500MC | ||
269 | select PHYS_64BIT | ||
270 | select SWIOTLB | ||
271 | select ARCH_REQUIRE_GPIOLIB | ||
272 | select GPIO_MPC8XXX | ||
273 | select HAS_RAPIDIO | ||
274 | select PPC_EPAPR_HV_PIC | ||
275 | help | ||
276 | This option enables support for the P5040 DS board | ||
277 | |||
257 | config PPC_QEMU_E500 | 278 | config PPC_QEMU_E500 |
258 | bool "QEMU generic e500 platform" | 279 | bool "QEMU generic e500 platform" |
259 | depends on EXPERIMENTAL | 280 | depends on EXPERIMENTAL |
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 3dfe81175036..76f679cb04a0 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile | |||
@@ -15,11 +15,13 @@ obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o | |||
15 | obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o | 15 | obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o |
16 | obj-$(CONFIG_P1010_RDB) += p1010rdb.o | 16 | obj-$(CONFIG_P1010_RDB) += p1010rdb.o |
17 | obj-$(CONFIG_P1022_DS) += p1022_ds.o | 17 | obj-$(CONFIG_P1022_DS) += p1022_ds.o |
18 | obj-$(CONFIG_P1022_RDK) += p1022_rdk.o | ||
18 | obj-$(CONFIG_P1023_RDS) += p1023_rds.o | 19 | obj-$(CONFIG_P1023_RDS) += p1023_rds.o |
19 | obj-$(CONFIG_P2041_RDB) += p2041_rdb.o corenet_ds.o | 20 | obj-$(CONFIG_P2041_RDB) += p2041_rdb.o corenet_ds.o |
20 | obj-$(CONFIG_P3041_DS) += p3041_ds.o corenet_ds.o | 21 | obj-$(CONFIG_P3041_DS) += p3041_ds.o corenet_ds.o |
21 | obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o | 22 | obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o |
22 | obj-$(CONFIG_P5020_DS) += p5020_ds.o corenet_ds.o | 23 | obj-$(CONFIG_P5020_DS) += p5020_ds.o corenet_ds.o |
24 | obj-$(CONFIG_P5040_DS) += p5040_ds.o corenet_ds.o | ||
23 | obj-$(CONFIG_STX_GP3) += stx_gp3.o | 25 | obj-$(CONFIG_STX_GP3) += stx_gp3.o |
24 | obj-$(CONFIG_TQM85xx) += tqm85xx.o | 26 | obj-$(CONFIG_TQM85xx) += tqm85xx.o |
25 | obj-$(CONFIG_SBC8548) += sbc8548.o | 27 | obj-$(CONFIG_SBC8548) += sbc8548.o |
diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c index 67dac22b4363..d0861a0d8360 100644 --- a/arch/powerpc/platforms/85xx/common.c +++ b/arch/powerpc/platforms/85xx/common.c | |||
@@ -27,6 +27,16 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = { | |||
27 | { .compatible = "fsl,mpc8548-guts", }, | 27 | { .compatible = "fsl,mpc8548-guts", }, |
28 | /* Probably unnecessary? */ | 28 | /* Probably unnecessary? */ |
29 | { .compatible = "gpio-leds", }, | 29 | { .compatible = "gpio-leds", }, |
30 | /* For all PCI controllers */ | ||
31 | { .compatible = "fsl,mpc8540-pci", }, | ||
32 | { .compatible = "fsl,mpc8548-pcie", }, | ||
33 | { .compatible = "fsl,p1022-pcie", }, | ||
34 | { .compatible = "fsl,p1010-pcie", }, | ||
35 | { .compatible = "fsl,p1023-pcie", }, | ||
36 | { .compatible = "fsl,p4080-pcie", }, | ||
37 | { .compatible = "fsl,qoriq-pcie-v2.4", }, | ||
38 | { .compatible = "fsl,qoriq-pcie-v2.3", }, | ||
39 | { .compatible = "fsl,qoriq-pcie-v2.2", }, | ||
30 | {}, | 40 | {}, |
31 | }; | 41 | }; |
32 | 42 | ||
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c index 925b02874233..ed69c9250717 100644 --- a/arch/powerpc/platforms/85xx/corenet_ds.c +++ b/arch/powerpc/platforms/85xx/corenet_ds.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <linux/kdev_t.h> | 16 | #include <linux/kdev_t.h> |
17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/memblock.h> | ||
20 | 19 | ||
21 | #include <asm/time.h> | 20 | #include <asm/time.h> |
22 | #include <asm/machdep.h> | 21 | #include <asm/machdep.h> |
@@ -52,37 +51,16 @@ void __init corenet_ds_pic_init(void) | |||
52 | */ | 51 | */ |
53 | void __init corenet_ds_setup_arch(void) | 52 | void __init corenet_ds_setup_arch(void) |
54 | { | 53 | { |
55 | #ifdef CONFIG_PCI | ||
56 | struct device_node *np; | ||
57 | struct pci_controller *hose; | ||
58 | #endif | ||
59 | dma_addr_t max = 0xffffffff; | ||
60 | |||
61 | mpc85xx_smp_init(); | 54 | mpc85xx_smp_init(); |
62 | 55 | ||
63 | #ifdef CONFIG_PCI | 56 | #if defined(CONFIG_PCI) && defined(CONFIG_PPC64) |
64 | for_each_node_by_type(np, "pci") { | ||
65 | if (of_device_is_compatible(np, "fsl,p4080-pcie") || | ||
66 | of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2")) { | ||
67 | fsl_add_bridge(np, 0); | ||
68 | hose = pci_find_hose_for_OF_device(np); | ||
69 | max = min(max, hose->dma_window_base_cur + | ||
70 | hose->dma_window_size); | ||
71 | } | ||
72 | } | ||
73 | |||
74 | #ifdef CONFIG_PPC64 | ||
75 | pci_devs_phb_init(); | 57 | pci_devs_phb_init(); |
76 | #endif | 58 | #endif |
77 | #endif | ||
78 | 59 | ||
79 | #ifdef CONFIG_SWIOTLB | 60 | fsl_pci_assign_primary(); |
80 | if ((memblock_end_of_DRAM() - 1) > max) { | 61 | |
81 | ppc_swiotlb_enable = 1; | 62 | swiotlb_detect_4g(); |
82 | set_pci_dma_ops(&swiotlb_dma_ops); | 63 | |
83 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; | ||
84 | } | ||
85 | #endif | ||
86 | pr_info("%s board from Freescale Semiconductor\n", ppc_md.name); | 64 | pr_info("%s board from Freescale Semiconductor\n", ppc_md.name); |
87 | } | 65 | } |
88 | 66 | ||
@@ -99,6 +77,12 @@ static const struct of_device_id of_device_ids[] __devinitconst = { | |||
99 | { | 77 | { |
100 | .compatible = "fsl,qoriq-pcie-v2.2", | 78 | .compatible = "fsl,qoriq-pcie-v2.2", |
101 | }, | 79 | }, |
80 | { | ||
81 | .compatible = "fsl,qoriq-pcie-v2.3", | ||
82 | }, | ||
83 | { | ||
84 | .compatible = "fsl,qoriq-pcie-v2.4", | ||
85 | }, | ||
102 | /* The following two are for the Freescale hypervisor */ | 86 | /* The following two are for the Freescale hypervisor */ |
103 | { | 87 | { |
104 | .name = "hypervisor", | 88 | .name = "hypervisor", |
diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c b/arch/powerpc/platforms/85xx/ge_imp3a.c index b6a728b0a8ca..e6285ae6f423 100644 --- a/arch/powerpc/platforms/85xx/ge_imp3a.c +++ b/arch/powerpc/platforms/85xx/ge_imp3a.c | |||
@@ -22,7 +22,6 @@ | |||
22 | #include <linux/seq_file.h> | 22 | #include <linux/seq_file.h> |
23 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
24 | #include <linux/of_platform.h> | 24 | #include <linux/of_platform.h> |
25 | #include <linux/memblock.h> | ||
26 | 25 | ||
27 | #include <asm/time.h> | 26 | #include <asm/time.h> |
28 | #include <asm/machdep.h> | 27 | #include <asm/machdep.h> |
@@ -84,53 +83,39 @@ void __init ge_imp3a_pic_init(void) | |||
84 | of_node_put(cascade_node); | 83 | of_node_put(cascade_node); |
85 | } | 84 | } |
86 | 85 | ||
87 | #ifdef CONFIG_PCI | 86 | static void ge_imp3a_pci_assign_primary(void) |
88 | static int primary_phb_addr; | ||
89 | #endif /* CONFIG_PCI */ | ||
90 | |||
91 | /* | ||
92 | * Setup the architecture | ||
93 | */ | ||
94 | static void __init ge_imp3a_setup_arch(void) | ||
95 | { | 87 | { |
96 | struct device_node *regs; | ||
97 | #ifdef CONFIG_PCI | 88 | #ifdef CONFIG_PCI |
98 | struct device_node *np; | 89 | struct device_node *np; |
99 | struct pci_controller *hose; | 90 | struct resource rsrc; |
100 | #endif | ||
101 | dma_addr_t max = 0xffffffff; | ||
102 | 91 | ||
103 | if (ppc_md.progress) | ||
104 | ppc_md.progress("ge_imp3a_setup_arch()", 0); | ||
105 | |||
106 | #ifdef CONFIG_PCI | ||
107 | for_each_node_by_type(np, "pci") { | 92 | for_each_node_by_type(np, "pci") { |
108 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | 93 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || |
109 | of_device_is_compatible(np, "fsl,mpc8548-pcie") || | 94 | of_device_is_compatible(np, "fsl,mpc8548-pcie") || |
110 | of_device_is_compatible(np, "fsl,p2020-pcie")) { | 95 | of_device_is_compatible(np, "fsl,p2020-pcie")) { |
111 | struct resource rsrc; | ||
112 | of_address_to_resource(np, 0, &rsrc); | 96 | of_address_to_resource(np, 0, &rsrc); |
113 | if ((rsrc.start & 0xfffff) == primary_phb_addr) | 97 | if ((rsrc.start & 0xfffff) == 0x9000) |
114 | fsl_add_bridge(np, 1); | 98 | fsl_pci_primary = np; |
115 | else | ||
116 | fsl_add_bridge(np, 0); | ||
117 | |||
118 | hose = pci_find_hose_for_OF_device(np); | ||
119 | max = min(max, hose->dma_window_base_cur + | ||
120 | hose->dma_window_size); | ||
121 | } | 99 | } |
122 | } | 100 | } |
123 | #endif | 101 | #endif |
102 | } | ||
103 | |||
104 | /* | ||
105 | * Setup the architecture | ||
106 | */ | ||
107 | static void __init ge_imp3a_setup_arch(void) | ||
108 | { | ||
109 | struct device_node *regs; | ||
110 | |||
111 | if (ppc_md.progress) | ||
112 | ppc_md.progress("ge_imp3a_setup_arch()", 0); | ||
124 | 113 | ||
125 | mpc85xx_smp_init(); | 114 | mpc85xx_smp_init(); |
126 | 115 | ||
127 | #ifdef CONFIG_SWIOTLB | 116 | ge_imp3a_pci_assign_primary(); |
128 | if ((memblock_end_of_DRAM() - 1) > max) { | 117 | |
129 | ppc_swiotlb_enable = 1; | 118 | swiotlb_detect_4g(); |
130 | set_pci_dma_ops(&swiotlb_dma_ops); | ||
131 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; | ||
132 | } | ||
133 | #endif | ||
134 | 119 | ||
135 | /* Remap basic board registers */ | 120 | /* Remap basic board registers */ |
136 | regs = of_find_compatible_node(NULL, NULL, "ge,imp3a-fpga-regs"); | 121 | regs = of_find_compatible_node(NULL, NULL, "ge,imp3a-fpga-regs"); |
@@ -215,17 +200,10 @@ static int __init ge_imp3a_probe(void) | |||
215 | { | 200 | { |
216 | unsigned long root = of_get_flat_dt_root(); | 201 | unsigned long root = of_get_flat_dt_root(); |
217 | 202 | ||
218 | if (of_flat_dt_is_compatible(root, "ge,IMP3A")) { | 203 | return of_flat_dt_is_compatible(root, "ge,IMP3A"); |
219 | #ifdef CONFIG_PCI | ||
220 | primary_phb_addr = 0x9000; | ||
221 | #endif | ||
222 | return 1; | ||
223 | } | ||
224 | |||
225 | return 0; | ||
226 | } | 204 | } |
227 | 205 | ||
228 | machine_device_initcall(ge_imp3a, mpc85xx_common_publish_devices); | 206 | machine_arch_initcall(ge_imp3a, mpc85xx_common_publish_devices); |
229 | 207 | ||
230 | machine_arch_initcall(ge_imp3a, swiotlb_setup_bus_notifier); | 208 | machine_arch_initcall(ge_imp3a, swiotlb_setup_bus_notifier); |
231 | 209 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c index 767c7cf18a9c..15ce4b55f117 100644 --- a/arch/powerpc/platforms/85xx/mpc8536_ds.c +++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/seq_file.h> | 17 | #include <linux/seq_file.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/of_platform.h> | 19 | #include <linux/of_platform.h> |
20 | #include <linux/memblock.h> | ||
21 | 20 | ||
22 | #include <asm/time.h> | 21 | #include <asm/time.h> |
23 | #include <asm/machdep.h> | 22 | #include <asm/machdep.h> |
@@ -46,46 +45,17 @@ void __init mpc8536_ds_pic_init(void) | |||
46 | */ | 45 | */ |
47 | static void __init mpc8536_ds_setup_arch(void) | 46 | static void __init mpc8536_ds_setup_arch(void) |
48 | { | 47 | { |
49 | #ifdef CONFIG_PCI | ||
50 | struct device_node *np; | ||
51 | struct pci_controller *hose; | ||
52 | #endif | ||
53 | dma_addr_t max = 0xffffffff; | ||
54 | |||
55 | if (ppc_md.progress) | 48 | if (ppc_md.progress) |
56 | ppc_md.progress("mpc8536_ds_setup_arch()", 0); | 49 | ppc_md.progress("mpc8536_ds_setup_arch()", 0); |
57 | 50 | ||
58 | #ifdef CONFIG_PCI | 51 | fsl_pci_assign_primary(); |
59 | for_each_node_by_type(np, "pci") { | ||
60 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | ||
61 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | ||
62 | struct resource rsrc; | ||
63 | of_address_to_resource(np, 0, &rsrc); | ||
64 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
65 | fsl_add_bridge(np, 1); | ||
66 | else | ||
67 | fsl_add_bridge(np, 0); | ||
68 | |||
69 | hose = pci_find_hose_for_OF_device(np); | ||
70 | max = min(max, hose->dma_window_base_cur + | ||
71 | hose->dma_window_size); | ||
72 | } | ||
73 | } | ||
74 | |||
75 | #endif | ||
76 | 52 | ||
77 | #ifdef CONFIG_SWIOTLB | 53 | swiotlb_detect_4g(); |
78 | if ((memblock_end_of_DRAM() - 1) > max) { | ||
79 | ppc_swiotlb_enable = 1; | ||
80 | set_pci_dma_ops(&swiotlb_dma_ops); | ||
81 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; | ||
82 | } | ||
83 | #endif | ||
84 | 54 | ||
85 | printk("MPC8536 DS board from Freescale Semiconductor\n"); | 55 | printk("MPC8536 DS board from Freescale Semiconductor\n"); |
86 | } | 56 | } |
87 | 57 | ||
88 | machine_device_initcall(mpc8536_ds, mpc85xx_common_publish_devices); | 58 | machine_arch_initcall(mpc8536_ds, mpc85xx_common_publish_devices); |
89 | 59 | ||
90 | machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier); | 60 | machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier); |
91 | 61 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 29ee8fcd75a2..7d12a19aa7ee 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c | |||
@@ -137,10 +137,6 @@ static void __init init_ioports(void) | |||
137 | 137 | ||
138 | static void __init mpc85xx_ads_setup_arch(void) | 138 | static void __init mpc85xx_ads_setup_arch(void) |
139 | { | 139 | { |
140 | #ifdef CONFIG_PCI | ||
141 | struct device_node *np; | ||
142 | #endif | ||
143 | |||
144 | if (ppc_md.progress) | 140 | if (ppc_md.progress) |
145 | ppc_md.progress("mpc85xx_ads_setup_arch()", 0); | 141 | ppc_md.progress("mpc85xx_ads_setup_arch()", 0); |
146 | 142 | ||
@@ -150,11 +146,10 @@ static void __init mpc85xx_ads_setup_arch(void) | |||
150 | #endif | 146 | #endif |
151 | 147 | ||
152 | #ifdef CONFIG_PCI | 148 | #ifdef CONFIG_PCI |
153 | for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") | ||
154 | fsl_add_bridge(np, 1); | ||
155 | |||
156 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; | 149 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; |
157 | #endif | 150 | #endif |
151 | |||
152 | fsl_pci_assign_primary(); | ||
158 | } | 153 | } |
159 | 154 | ||
160 | static void mpc85xx_ads_show_cpuinfo(struct seq_file *m) | 155 | static void mpc85xx_ads_show_cpuinfo(struct seq_file *m) |
@@ -173,7 +168,7 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m) | |||
173 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); | 168 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); |
174 | } | 169 | } |
175 | 170 | ||
176 | machine_device_initcall(mpc85xx_ads, mpc85xx_common_publish_devices); | 171 | machine_arch_initcall(mpc85xx_ads, mpc85xx_common_publish_devices); |
177 | 172 | ||
178 | /* | 173 | /* |
179 | * Called very early, device-tree isn't unflattened | 174 | * Called very early, device-tree isn't unflattened |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 11156fb53d83..c474505ad0d0 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c | |||
@@ -276,6 +276,33 @@ machine_device_initcall(mpc85xx_cds, mpc85xx_cds_8259_attach); | |||
276 | 276 | ||
277 | #endif /* CONFIG_PPC_I8259 */ | 277 | #endif /* CONFIG_PPC_I8259 */ |
278 | 278 | ||
279 | static void mpc85xx_cds_pci_assign_primary(void) | ||
280 | { | ||
281 | #ifdef CONFIG_PCI | ||
282 | struct device_node *np; | ||
283 | |||
284 | if (fsl_pci_primary) | ||
285 | return; | ||
286 | |||
287 | /* | ||
288 | * MPC85xx_CDS has ISA bridge but unfortunately there is no | ||
289 | * isa node in device tree. We now looking for i8259 node as | ||
290 | * a workaround for such a broken device tree. This routine | ||
291 | * is for complying to all device trees. | ||
292 | */ | ||
293 | np = of_find_node_by_name(NULL, "i8259"); | ||
294 | while ((fsl_pci_primary = of_get_parent(np))) { | ||
295 | of_node_put(np); | ||
296 | np = fsl_pci_primary; | ||
297 | |||
298 | if ((of_device_is_compatible(np, "fsl,mpc8540-pci") || | ||
299 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) && | ||
300 | of_device_is_available(np)) | ||
301 | return; | ||
302 | } | ||
303 | #endif | ||
304 | } | ||
305 | |||
279 | /* | 306 | /* |
280 | * Setup the architecture | 307 | * Setup the architecture |
281 | */ | 308 | */ |
@@ -309,21 +336,12 @@ static void __init mpc85xx_cds_setup_arch(void) | |||
309 | } | 336 | } |
310 | 337 | ||
311 | #ifdef CONFIG_PCI | 338 | #ifdef CONFIG_PCI |
312 | for_each_node_by_type(np, "pci") { | ||
313 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | ||
314 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | ||
315 | struct resource rsrc; | ||
316 | of_address_to_resource(np, 0, &rsrc); | ||
317 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
318 | fsl_add_bridge(np, 1); | ||
319 | else | ||
320 | fsl_add_bridge(np, 0); | ||
321 | } | ||
322 | } | ||
323 | |||
324 | ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup; | 339 | ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup; |
325 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; | 340 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; |
326 | #endif | 341 | #endif |
342 | |||
343 | mpc85xx_cds_pci_assign_primary(); | ||
344 | fsl_pci_assign_primary(); | ||
327 | } | 345 | } |
328 | 346 | ||
329 | static void mpc85xx_cds_show_cpuinfo(struct seq_file *m) | 347 | static void mpc85xx_cds_show_cpuinfo(struct seq_file *m) |
@@ -355,7 +373,7 @@ static int __init mpc85xx_cds_probe(void) | |||
355 | return of_flat_dt_is_compatible(root, "MPC85xxCDS"); | 373 | return of_flat_dt_is_compatible(root, "MPC85xxCDS"); |
356 | } | 374 | } |
357 | 375 | ||
358 | machine_device_initcall(mpc85xx_cds, mpc85xx_common_publish_devices); | 376 | machine_arch_initcall(mpc85xx_cds, mpc85xx_common_publish_devices); |
359 | 377 | ||
360 | define_machine(mpc85xx_cds) { | 378 | define_machine(mpc85xx_cds) { |
361 | .name = "MPC85xx CDS", | 379 | .name = "MPC85xx CDS", |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index 6d3265fe7718..9ebb91ed96a3 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c | |||
@@ -20,7 +20,6 @@ | |||
20 | #include <linux/seq_file.h> | 20 | #include <linux/seq_file.h> |
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/of_platform.h> | 22 | #include <linux/of_platform.h> |
23 | #include <linux/memblock.h> | ||
24 | 23 | ||
25 | #include <asm/time.h> | 24 | #include <asm/time.h> |
26 | #include <asm/machdep.h> | 25 | #include <asm/machdep.h> |
@@ -129,13 +128,11 @@ static int mpc85xx_exclude_device(struct pci_controller *hose, | |||
129 | } | 128 | } |
130 | #endif /* CONFIG_PCI */ | 129 | #endif /* CONFIG_PCI */ |
131 | 130 | ||
132 | static void __init mpc85xx_ds_pci_init(void) | 131 | static void __init mpc85xx_ds_uli_init(void) |
133 | { | 132 | { |
134 | #ifdef CONFIG_PCI | 133 | #ifdef CONFIG_PCI |
135 | struct device_node *node; | 134 | struct device_node *node; |
136 | 135 | ||
137 | fsl_pci_init(); | ||
138 | |||
139 | /* See if we have a ULI under the primary */ | 136 | /* See if we have a ULI under the primary */ |
140 | 137 | ||
141 | node = of_find_node_by_name(NULL, "uli1575"); | 138 | node = of_find_node_by_name(NULL, "uli1575"); |
@@ -159,7 +156,9 @@ static void __init mpc85xx_ds_setup_arch(void) | |||
159 | if (ppc_md.progress) | 156 | if (ppc_md.progress) |
160 | ppc_md.progress("mpc85xx_ds_setup_arch()", 0); | 157 | ppc_md.progress("mpc85xx_ds_setup_arch()", 0); |
161 | 158 | ||
162 | mpc85xx_ds_pci_init(); | 159 | swiotlb_detect_4g(); |
160 | fsl_pci_assign_primary(); | ||
161 | mpc85xx_ds_uli_init(); | ||
163 | mpc85xx_smp_init(); | 162 | mpc85xx_smp_init(); |
164 | 163 | ||
165 | printk("MPC85xx DS board from Freescale Semiconductor\n"); | 164 | printk("MPC85xx DS board from Freescale Semiconductor\n"); |
@@ -175,9 +174,9 @@ static int __init mpc8544_ds_probe(void) | |||
175 | return !!of_flat_dt_is_compatible(root, "MPC8544DS"); | 174 | return !!of_flat_dt_is_compatible(root, "MPC8544DS"); |
176 | } | 175 | } |
177 | 176 | ||
178 | machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices); | 177 | machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices); |
179 | machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices); | 178 | machine_arch_initcall(mpc8572_ds, mpc85xx_common_publish_devices); |
180 | machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices); | 179 | machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices); |
181 | 180 | ||
182 | machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier); | 181 | machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier); |
183 | machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier); | 182 | machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier); |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 8e4b094c553b..8498f7323470 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c | |||
@@ -327,44 +327,16 @@ static void __init mpc85xx_mds_qeic_init(void) { } | |||
327 | 327 | ||
328 | static void __init mpc85xx_mds_setup_arch(void) | 328 | static void __init mpc85xx_mds_setup_arch(void) |
329 | { | 329 | { |
330 | #ifdef CONFIG_PCI | ||
331 | struct pci_controller *hose; | ||
332 | struct device_node *np; | ||
333 | #endif | ||
334 | dma_addr_t max = 0xffffffff; | ||
335 | |||
336 | if (ppc_md.progress) | 330 | if (ppc_md.progress) |
337 | ppc_md.progress("mpc85xx_mds_setup_arch()", 0); | 331 | ppc_md.progress("mpc85xx_mds_setup_arch()", 0); |
338 | 332 | ||
339 | #ifdef CONFIG_PCI | ||
340 | for_each_node_by_type(np, "pci") { | ||
341 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | ||
342 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | ||
343 | struct resource rsrc; | ||
344 | of_address_to_resource(np, 0, &rsrc); | ||
345 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
346 | fsl_add_bridge(np, 1); | ||
347 | else | ||
348 | fsl_add_bridge(np, 0); | ||
349 | |||
350 | hose = pci_find_hose_for_OF_device(np); | ||
351 | max = min(max, hose->dma_window_base_cur + | ||
352 | hose->dma_window_size); | ||
353 | } | ||
354 | } | ||
355 | #endif | ||
356 | |||
357 | mpc85xx_smp_init(); | 333 | mpc85xx_smp_init(); |
358 | 334 | ||
359 | mpc85xx_mds_qe_init(); | 335 | mpc85xx_mds_qe_init(); |
360 | 336 | ||
361 | #ifdef CONFIG_SWIOTLB | 337 | fsl_pci_assign_primary(); |
362 | if ((memblock_end_of_DRAM() - 1) > max) { | 338 | |
363 | ppc_swiotlb_enable = 1; | 339 | swiotlb_detect_4g(); |
364 | set_pci_dma_ops(&swiotlb_dma_ops); | ||
365 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; | ||
366 | } | ||
367 | #endif | ||
368 | } | 340 | } |
369 | 341 | ||
370 | 342 | ||
@@ -409,9 +381,9 @@ static int __init mpc85xx_publish_devices(void) | |||
409 | return mpc85xx_common_publish_devices(); | 381 | return mpc85xx_common_publish_devices(); |
410 | } | 382 | } |
411 | 383 | ||
412 | machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); | 384 | machine_arch_initcall(mpc8568_mds, mpc85xx_publish_devices); |
413 | machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices); | 385 | machine_arch_initcall(mpc8569_mds, mpc85xx_publish_devices); |
414 | machine_device_initcall(p1021_mds, mpc85xx_common_publish_devices); | 386 | machine_arch_initcall(p1021_mds, mpc85xx_common_publish_devices); |
415 | 387 | ||
416 | machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier); | 388 | machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier); |
417 | machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier); | 389 | machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier); |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c index 1910fdcb75b2..ede8771d6f02 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c | |||
@@ -86,23 +86,17 @@ void __init mpc85xx_rdb_pic_init(void) | |||
86 | */ | 86 | */ |
87 | static void __init mpc85xx_rdb_setup_arch(void) | 87 | static void __init mpc85xx_rdb_setup_arch(void) |
88 | { | 88 | { |
89 | #if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE) | 89 | #ifdef CONFIG_QUICC_ENGINE |
90 | struct device_node *np; | 90 | struct device_node *np; |
91 | #endif | 91 | #endif |
92 | 92 | ||
93 | if (ppc_md.progress) | 93 | if (ppc_md.progress) |
94 | ppc_md.progress("mpc85xx_rdb_setup_arch()", 0); | 94 | ppc_md.progress("mpc85xx_rdb_setup_arch()", 0); |
95 | 95 | ||
96 | #ifdef CONFIG_PCI | ||
97 | for_each_node_by_type(np, "pci") { | ||
98 | if (of_device_is_compatible(np, "fsl,mpc8548-pcie")) | ||
99 | fsl_add_bridge(np, 0); | ||
100 | } | ||
101 | |||
102 | #endif | ||
103 | |||
104 | mpc85xx_smp_init(); | 96 | mpc85xx_smp_init(); |
105 | 97 | ||
98 | fsl_pci_assign_primary(); | ||
99 | |||
106 | #ifdef CONFIG_QUICC_ENGINE | 100 | #ifdef CONFIG_QUICC_ENGINE |
107 | np = of_find_compatible_node(NULL, NULL, "fsl,qe"); | 101 | np = of_find_compatible_node(NULL, NULL, "fsl,qe"); |
108 | if (!np) { | 102 | if (!np) { |
@@ -161,15 +155,15 @@ qe_fail: | |||
161 | printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n"); | 155 | printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n"); |
162 | } | 156 | } |
163 | 157 | ||
164 | machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices); | 158 | machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices); |
165 | machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices); | 159 | machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices); |
166 | machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices); | 160 | machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices); |
167 | machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices); | 161 | machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices); |
168 | machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices); | 162 | machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices); |
169 | machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices); | 163 | machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices); |
170 | machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices); | 164 | machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices); |
171 | machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices); | 165 | machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices); |
172 | machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices); | 166 | machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices); |
173 | 167 | ||
174 | /* | 168 | /* |
175 | * Called very early, device-tree isn't unflattened | 169 | * Called very early, device-tree isn't unflattened |
diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c index dbaf44354f0d..0252961392d5 100644 --- a/arch/powerpc/platforms/85xx/p1010rdb.c +++ b/arch/powerpc/platforms/85xx/p1010rdb.c | |||
@@ -46,25 +46,15 @@ void __init p1010_rdb_pic_init(void) | |||
46 | */ | 46 | */ |
47 | static void __init p1010_rdb_setup_arch(void) | 47 | static void __init p1010_rdb_setup_arch(void) |
48 | { | 48 | { |
49 | #ifdef CONFIG_PCI | ||
50 | struct device_node *np; | ||
51 | #endif | ||
52 | |||
53 | if (ppc_md.progress) | 49 | if (ppc_md.progress) |
54 | ppc_md.progress("p1010_rdb_setup_arch()", 0); | 50 | ppc_md.progress("p1010_rdb_setup_arch()", 0); |
55 | 51 | ||
56 | #ifdef CONFIG_PCI | 52 | fsl_pci_assign_primary(); |
57 | for_each_node_by_type(np, "pci") { | ||
58 | if (of_device_is_compatible(np, "fsl,p1010-pcie")) | ||
59 | fsl_add_bridge(np, 0); | ||
60 | } | ||
61 | |||
62 | #endif | ||
63 | 53 | ||
64 | printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n"); | 54 | printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n"); |
65 | } | 55 | } |
66 | 56 | ||
67 | machine_device_initcall(p1010_rdb, mpc85xx_common_publish_devices); | 57 | machine_arch_initcall(p1010_rdb, mpc85xx_common_publish_devices); |
68 | machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier); | 58 | machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier); |
69 | 59 | ||
70 | /* | 60 | /* |
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c index 3c732acf331d..848a3e98e1c1 100644 --- a/arch/powerpc/platforms/85xx/p1022_ds.c +++ b/arch/powerpc/platforms/85xx/p1022_ds.c | |||
@@ -18,7 +18,6 @@ | |||
18 | 18 | ||
19 | #include <linux/pci.h> | 19 | #include <linux/pci.h> |
20 | #include <linux/of_platform.h> | 20 | #include <linux/of_platform.h> |
21 | #include <linux/memblock.h> | ||
22 | #include <asm/div64.h> | 21 | #include <asm/div64.h> |
23 | #include <asm/mpic.h> | 22 | #include <asm/mpic.h> |
24 | #include <asm/swiotlb.h> | 23 | #include <asm/swiotlb.h> |
@@ -507,32 +506,9 @@ early_param("video", early_video_setup); | |||
507 | */ | 506 | */ |
508 | static void __init p1022_ds_setup_arch(void) | 507 | static void __init p1022_ds_setup_arch(void) |
509 | { | 508 | { |
510 | #ifdef CONFIG_PCI | ||
511 | struct device_node *np; | ||
512 | #endif | ||
513 | dma_addr_t max = 0xffffffff; | ||
514 | |||
515 | if (ppc_md.progress) | 509 | if (ppc_md.progress) |
516 | ppc_md.progress("p1022_ds_setup_arch()", 0); | 510 | ppc_md.progress("p1022_ds_setup_arch()", 0); |
517 | 511 | ||
518 | #ifdef CONFIG_PCI | ||
519 | for_each_compatible_node(np, "pci", "fsl,p1022-pcie") { | ||
520 | struct resource rsrc; | ||
521 | struct pci_controller *hose; | ||
522 | |||
523 | of_address_to_resource(np, 0, &rsrc); | ||
524 | |||
525 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
526 | fsl_add_bridge(np, 1); | ||
527 | else | ||
528 | fsl_add_bridge(np, 0); | ||
529 | |||
530 | hose = pci_find_hose_for_OF_device(np); | ||
531 | max = min(max, hose->dma_window_base_cur + | ||
532 | hose->dma_window_size); | ||
533 | } | ||
534 | #endif | ||
535 | |||
536 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) | 512 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) |
537 | diu_ops.get_pixel_format = p1022ds_get_pixel_format; | 513 | diu_ops.get_pixel_format = p1022ds_get_pixel_format; |
538 | diu_ops.set_gamma_table = p1022ds_set_gamma_table; | 514 | diu_ops.set_gamma_table = p1022ds_set_gamma_table; |
@@ -601,18 +577,14 @@ static void __init p1022_ds_setup_arch(void) | |||
601 | 577 | ||
602 | mpc85xx_smp_init(); | 578 | mpc85xx_smp_init(); |
603 | 579 | ||
604 | #ifdef CONFIG_SWIOTLB | 580 | fsl_pci_assign_primary(); |
605 | if ((memblock_end_of_DRAM() - 1) > max) { | 581 | |
606 | ppc_swiotlb_enable = 1; | 582 | swiotlb_detect_4g(); |
607 | set_pci_dma_ops(&swiotlb_dma_ops); | ||
608 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; | ||
609 | } | ||
610 | #endif | ||
611 | 583 | ||
612 | pr_info("Freescale P1022 DS reference board\n"); | 584 | pr_info("Freescale P1022 DS reference board\n"); |
613 | } | 585 | } |
614 | 586 | ||
615 | machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices); | 587 | machine_arch_initcall(p1022_ds, mpc85xx_common_publish_devices); |
616 | 588 | ||
617 | machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier); | 589 | machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier); |
618 | 590 | ||
diff --git a/arch/powerpc/platforms/85xx/p1022_rdk.c b/arch/powerpc/platforms/85xx/p1022_rdk.c new file mode 100644 index 000000000000..55ffa1cc380c --- /dev/null +++ b/arch/powerpc/platforms/85xx/p1022_rdk.c | |||
@@ -0,0 +1,167 @@ | |||
1 | /* | ||
2 | * P1022 RDK board specific routines | ||
3 | * | ||
4 | * Copyright 2012 Freescale Semiconductor, Inc. | ||
5 | * | ||
6 | * Author: Timur Tabi <timur@freescale.com> | ||
7 | * | ||
8 | * Based on p1022_ds.c | ||
9 | * | ||
10 | * This file is licensed under the terms of the GNU General Public License | ||
11 | * version 2. This program is licensed "as is" without any warranty of any | ||
12 | * kind, whether express or implied. | ||
13 | */ | ||
14 | |||
15 | #include <linux/pci.h> | ||
16 | #include <linux/of_platform.h> | ||
17 | #include <asm/div64.h> | ||
18 | #include <asm/mpic.h> | ||
19 | #include <asm/swiotlb.h> | ||
20 | |||
21 | #include <sysdev/fsl_soc.h> | ||
22 | #include <sysdev/fsl_pci.h> | ||
23 | #include <asm/udbg.h> | ||
24 | #include <asm/fsl_guts.h> | ||
25 | #include "smp.h" | ||
26 | |||
27 | #include "mpc85xx.h" | ||
28 | |||
29 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) | ||
30 | |||
31 | /* DIU Pixel Clock bits of the CLKDVDR Global Utilities register */ | ||
32 | #define CLKDVDR_PXCKEN 0x80000000 | ||
33 | #define CLKDVDR_PXCKINV 0x10000000 | ||
34 | #define CLKDVDR_PXCKDLY 0x06000000 | ||
35 | #define CLKDVDR_PXCLK_MASK 0x00FF0000 | ||
36 | |||
37 | /** | ||
38 | * p1022rdk_set_monitor_port: switch the output to a different monitor port | ||
39 | */ | ||
40 | static void p1022rdk_set_monitor_port(enum fsl_diu_monitor_port port) | ||
41 | { | ||
42 | if (port != FSL_DIU_PORT_DVI) { | ||
43 | pr_err("p1022rdk: unsupported monitor port %i\n", port); | ||
44 | return; | ||
45 | } | ||
46 | } | ||
47 | |||
48 | /** | ||
49 | * p1022rdk_set_pixel_clock: program the DIU's clock | ||
50 | * | ||
51 | * @pixclock: the wavelength, in picoseconds, of the clock | ||
52 | */ | ||
53 | void p1022rdk_set_pixel_clock(unsigned int pixclock) | ||
54 | { | ||
55 | struct device_node *guts_np = NULL; | ||
56 | struct ccsr_guts __iomem *guts; | ||
57 | unsigned long freq; | ||
58 | u64 temp; | ||
59 | u32 pxclk; | ||
60 | |||
61 | /* Map the global utilities registers. */ | ||
62 | guts_np = of_find_compatible_node(NULL, NULL, "fsl,p1022-guts"); | ||
63 | if (!guts_np) { | ||
64 | pr_err("p1022rdk: missing global utilties device node\n"); | ||
65 | return; | ||
66 | } | ||
67 | |||
68 | guts = of_iomap(guts_np, 0); | ||
69 | of_node_put(guts_np); | ||
70 | if (!guts) { | ||
71 | pr_err("p1022rdk: could not map global utilties device\n"); | ||
72 | return; | ||
73 | } | ||
74 | |||
75 | /* Convert pixclock from a wavelength to a frequency */ | ||
76 | temp = 1000000000000ULL; | ||
77 | do_div(temp, pixclock); | ||
78 | freq = temp; | ||
79 | |||
80 | /* | ||
81 | * 'pxclk' is the ratio of the platform clock to the pixel clock. | ||
82 | * This number is programmed into the CLKDVDR register, and the valid | ||
83 | * range of values is 2-255. | ||
84 | */ | ||
85 | pxclk = DIV_ROUND_CLOSEST(fsl_get_sys_freq(), freq); | ||
86 | pxclk = clamp_t(u32, pxclk, 2, 255); | ||
87 | |||
88 | /* Disable the pixel clock, and set it to non-inverted and no delay */ | ||
89 | clrbits32(&guts->clkdvdr, | ||
90 | CLKDVDR_PXCKEN | CLKDVDR_PXCKDLY | CLKDVDR_PXCLK_MASK); | ||
91 | |||
92 | /* Enable the clock and set the pxclk */ | ||
93 | setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16)); | ||
94 | |||
95 | iounmap(guts); | ||
96 | } | ||
97 | |||
98 | /** | ||
99 | * p1022rdk_valid_monitor_port: set the monitor port for sysfs | ||
100 | */ | ||
101 | enum fsl_diu_monitor_port | ||
102 | p1022rdk_valid_monitor_port(enum fsl_diu_monitor_port port) | ||
103 | { | ||
104 | return FSL_DIU_PORT_DVI; | ||
105 | } | ||
106 | |||
107 | #endif | ||
108 | |||
109 | void __init p1022_rdk_pic_init(void) | ||
110 | { | ||
111 | struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | | ||
112 | MPIC_SINGLE_DEST_CPU, | ||
113 | 0, 256, " OpenPIC "); | ||
114 | BUG_ON(mpic == NULL); | ||
115 | mpic_init(mpic); | ||
116 | } | ||
117 | |||
118 | /* | ||
119 | * Setup the architecture | ||
120 | */ | ||
121 | static void __init p1022_rdk_setup_arch(void) | ||
122 | { | ||
123 | if (ppc_md.progress) | ||
124 | ppc_md.progress("p1022_rdk_setup_arch()", 0); | ||
125 | |||
126 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) | ||
127 | diu_ops.set_monitor_port = p1022rdk_set_monitor_port; | ||
128 | diu_ops.set_pixel_clock = p1022rdk_set_pixel_clock; | ||
129 | diu_ops.valid_monitor_port = p1022rdk_valid_monitor_port; | ||
130 | #endif | ||
131 | |||
132 | mpc85xx_smp_init(); | ||
133 | |||
134 | fsl_pci_assign_primary(); | ||
135 | |||
136 | swiotlb_detect_4g(); | ||
137 | |||
138 | pr_info("Freescale / iVeia P1022 RDK reference board\n"); | ||
139 | } | ||
140 | |||
141 | machine_arch_initcall(p1022_rdk, mpc85xx_common_publish_devices); | ||
142 | |||
143 | machine_arch_initcall(p1022_rdk, swiotlb_setup_bus_notifier); | ||
144 | |||
145 | /* | ||
146 | * Called very early, device-tree isn't unflattened | ||
147 | */ | ||
148 | static int __init p1022_rdk_probe(void) | ||
149 | { | ||
150 | unsigned long root = of_get_flat_dt_root(); | ||
151 | |||
152 | return of_flat_dt_is_compatible(root, "fsl,p1022rdk"); | ||
153 | } | ||
154 | |||
155 | define_machine(p1022_rdk) { | ||
156 | .name = "P1022 RDK", | ||
157 | .probe = p1022_rdk_probe, | ||
158 | .setup_arch = p1022_rdk_setup_arch, | ||
159 | .init_IRQ = p1022_rdk_pic_init, | ||
160 | #ifdef CONFIG_PCI | ||
161 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
162 | #endif | ||
163 | .get_irq = mpic_get_irq, | ||
164 | .restart = fsl_rstcr_restart, | ||
165 | .calibrate_decr = generic_calibrate_decr, | ||
166 | .progress = udbg_progress, | ||
167 | }; | ||
diff --git a/arch/powerpc/platforms/85xx/p1023_rds.c b/arch/powerpc/platforms/85xx/p1023_rds.c index 2990e8b13dc9..9cc60a738834 100644 --- a/arch/powerpc/platforms/85xx/p1023_rds.c +++ b/arch/powerpc/platforms/85xx/p1023_rds.c | |||
@@ -80,15 +80,12 @@ static void __init mpc85xx_rds_setup_arch(void) | |||
80 | } | 80 | } |
81 | } | 81 | } |
82 | 82 | ||
83 | #ifdef CONFIG_PCI | ||
84 | for_each_compatible_node(np, "pci", "fsl,p1023-pcie") | ||
85 | fsl_add_bridge(np, 0); | ||
86 | #endif | ||
87 | |||
88 | mpc85xx_smp_init(); | 83 | mpc85xx_smp_init(); |
84 | |||
85 | fsl_pci_assign_primary(); | ||
89 | } | 86 | } |
90 | 87 | ||
91 | machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices); | 88 | machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices); |
92 | 89 | ||
93 | static void __init mpc85xx_rds_pic_init(void) | 90 | static void __init mpc85xx_rds_pic_init(void) |
94 | { | 91 | { |
diff --git a/arch/powerpc/platforms/85xx/p2041_rdb.c b/arch/powerpc/platforms/85xx/p2041_rdb.c index 6541fa2630c0..000c0892fc40 100644 --- a/arch/powerpc/platforms/85xx/p2041_rdb.c +++ b/arch/powerpc/platforms/85xx/p2041_rdb.c | |||
@@ -80,7 +80,7 @@ define_machine(p2041_rdb) { | |||
80 | .power_save = e500_idle, | 80 | .power_save = e500_idle, |
81 | }; | 81 | }; |
82 | 82 | ||
83 | machine_device_initcall(p2041_rdb, corenet_ds_publish_devices); | 83 | machine_arch_initcall(p2041_rdb, corenet_ds_publish_devices); |
84 | 84 | ||
85 | #ifdef CONFIG_SWIOTLB | 85 | #ifdef CONFIG_SWIOTLB |
86 | machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier); | 86 | machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier); |
diff --git a/arch/powerpc/platforms/85xx/p3041_ds.c b/arch/powerpc/platforms/85xx/p3041_ds.c index f238efa75891..b3edc205daa9 100644 --- a/arch/powerpc/platforms/85xx/p3041_ds.c +++ b/arch/powerpc/platforms/85xx/p3041_ds.c | |||
@@ -82,7 +82,7 @@ define_machine(p3041_ds) { | |||
82 | .power_save = e500_idle, | 82 | .power_save = e500_idle, |
83 | }; | 83 | }; |
84 | 84 | ||
85 | machine_device_initcall(p3041_ds, corenet_ds_publish_devices); | 85 | machine_arch_initcall(p3041_ds, corenet_ds_publish_devices); |
86 | 86 | ||
87 | #ifdef CONFIG_SWIOTLB | 87 | #ifdef CONFIG_SWIOTLB |
88 | machine_arch_initcall(p3041_ds, swiotlb_setup_bus_notifier); | 88 | machine_arch_initcall(p3041_ds, swiotlb_setup_bus_notifier); |
diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c index c92417dc6574..54df10632aea 100644 --- a/arch/powerpc/platforms/85xx/p4080_ds.c +++ b/arch/powerpc/platforms/85xx/p4080_ds.c | |||
@@ -81,7 +81,7 @@ define_machine(p4080_ds) { | |||
81 | .power_save = e500_idle, | 81 | .power_save = e500_idle, |
82 | }; | 82 | }; |
83 | 83 | ||
84 | machine_device_initcall(p4080_ds, corenet_ds_publish_devices); | 84 | machine_arch_initcall(p4080_ds, corenet_ds_publish_devices); |
85 | #ifdef CONFIG_SWIOTLB | 85 | #ifdef CONFIG_SWIOTLB |
86 | machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier); | 86 | machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier); |
87 | #endif | 87 | #endif |
diff --git a/arch/powerpc/platforms/85xx/p5020_ds.c b/arch/powerpc/platforms/85xx/p5020_ds.c index 17bef15a85ed..753a42c29d4d 100644 --- a/arch/powerpc/platforms/85xx/p5020_ds.c +++ b/arch/powerpc/platforms/85xx/p5020_ds.c | |||
@@ -91,7 +91,7 @@ define_machine(p5020_ds) { | |||
91 | #endif | 91 | #endif |
92 | }; | 92 | }; |
93 | 93 | ||
94 | machine_device_initcall(p5020_ds, corenet_ds_publish_devices); | 94 | machine_arch_initcall(p5020_ds, corenet_ds_publish_devices); |
95 | 95 | ||
96 | #ifdef CONFIG_SWIOTLB | 96 | #ifdef CONFIG_SWIOTLB |
97 | machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier); | 97 | machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier); |
diff --git a/arch/powerpc/platforms/85xx/p5040_ds.c b/arch/powerpc/platforms/85xx/p5040_ds.c new file mode 100644 index 000000000000..11381851828e --- /dev/null +++ b/arch/powerpc/platforms/85xx/p5040_ds.c | |||
@@ -0,0 +1,89 @@ | |||
1 | /* | ||
2 | * P5040 DS Setup | ||
3 | * | ||
4 | * Copyright 2009-2010 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/pci.h> | ||
14 | |||
15 | #include <asm/machdep.h> | ||
16 | #include <asm/udbg.h> | ||
17 | #include <asm/mpic.h> | ||
18 | |||
19 | #include <linux/of_fdt.h> | ||
20 | |||
21 | #include <sysdev/fsl_soc.h> | ||
22 | #include <sysdev/fsl_pci.h> | ||
23 | #include <asm/ehv_pic.h> | ||
24 | |||
25 | #include "corenet_ds.h" | ||
26 | |||
27 | /* | ||
28 | * Called very early, device-tree isn't unflattened | ||
29 | */ | ||
30 | static int __init p5040_ds_probe(void) | ||
31 | { | ||
32 | unsigned long root = of_get_flat_dt_root(); | ||
33 | #ifdef CONFIG_SMP | ||
34 | extern struct smp_ops_t smp_85xx_ops; | ||
35 | #endif | ||
36 | |||
37 | if (of_flat_dt_is_compatible(root, "fsl,P5040DS")) | ||
38 | return 1; | ||
39 | |||
40 | /* Check if we're running under the Freescale hypervisor */ | ||
41 | if (of_flat_dt_is_compatible(root, "fsl,P5040DS-hv")) { | ||
42 | ppc_md.init_IRQ = ehv_pic_init; | ||
43 | ppc_md.get_irq = ehv_pic_get_irq; | ||
44 | ppc_md.restart = fsl_hv_restart; | ||
45 | ppc_md.power_off = fsl_hv_halt; | ||
46 | ppc_md.halt = fsl_hv_halt; | ||
47 | #ifdef CONFIG_SMP | ||
48 | /* | ||
49 | * Disable the timebase sync operations because we can't write | ||
50 | * to the timebase registers under the hypervisor. | ||
51 | */ | ||
52 | smp_85xx_ops.give_timebase = NULL; | ||
53 | smp_85xx_ops.take_timebase = NULL; | ||
54 | #endif | ||
55 | return 1; | ||
56 | } | ||
57 | |||
58 | return 0; | ||
59 | } | ||
60 | |||
61 | define_machine(p5040_ds) { | ||
62 | .name = "P5040 DS", | ||
63 | .probe = p5040_ds_probe, | ||
64 | .setup_arch = corenet_ds_setup_arch, | ||
65 | .init_IRQ = corenet_ds_pic_init, | ||
66 | #ifdef CONFIG_PCI | ||
67 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
68 | #endif | ||
69 | /* coreint doesn't play nice with lazy EE, use legacy mpic for now */ | ||
70 | #ifdef CONFIG_PPC64 | ||
71 | .get_irq = mpic_get_irq, | ||
72 | #else | ||
73 | .get_irq = mpic_get_coreint_irq, | ||
74 | #endif | ||
75 | .restart = fsl_rstcr_restart, | ||
76 | .calibrate_decr = generic_calibrate_decr, | ||
77 | .progress = udbg_progress, | ||
78 | #ifdef CONFIG_PPC64 | ||
79 | .power_save = book3e_idle, | ||
80 | #else | ||
81 | .power_save = e500_idle, | ||
82 | #endif | ||
83 | }; | ||
84 | |||
85 | machine_arch_initcall(p5040_ds, corenet_ds_publish_devices); | ||
86 | |||
87 | #ifdef CONFIG_SWIOTLB | ||
88 | machine_arch_initcall(p5040_ds, swiotlb_setup_bus_notifier); | ||
89 | #endif | ||
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c index 95a2e53af71b..f6ea5618c733 100644 --- a/arch/powerpc/platforms/85xx/qemu_e500.c +++ b/arch/powerpc/platforms/85xx/qemu_e500.c | |||
@@ -41,7 +41,8 @@ static void __init qemu_e500_setup_arch(void) | |||
41 | { | 41 | { |
42 | ppc_md.progress("qemu_e500_setup_arch()", 0); | 42 | ppc_md.progress("qemu_e500_setup_arch()", 0); |
43 | 43 | ||
44 | fsl_pci_init(); | 44 | fsl_pci_assign_primary(); |
45 | swiotlb_detect_4g(); | ||
45 | mpc85xx_smp_init(); | 46 | mpc85xx_smp_init(); |
46 | } | 47 | } |
47 | 48 | ||
@@ -55,7 +56,7 @@ static int __init qemu_e500_probe(void) | |||
55 | return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500"); | 56 | return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500"); |
56 | } | 57 | } |
57 | 58 | ||
58 | machine_device_initcall(qemu_e500, mpc85xx_common_publish_devices); | 59 | machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices); |
59 | 60 | ||
60 | define_machine(qemu_e500) { | 61 | define_machine(qemu_e500) { |
61 | .name = "QEMU e500", | 62 | .name = "QEMU e500", |
diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c index cd3a66bdb54b..f62121825914 100644 --- a/arch/powerpc/platforms/85xx/sbc8548.c +++ b/arch/powerpc/platforms/85xx/sbc8548.c | |||
@@ -88,26 +88,11 @@ static int __init sbc8548_hw_rev(void) | |||
88 | */ | 88 | */ |
89 | static void __init sbc8548_setup_arch(void) | 89 | static void __init sbc8548_setup_arch(void) |
90 | { | 90 | { |
91 | #ifdef CONFIG_PCI | ||
92 | struct device_node *np; | ||
93 | #endif | ||
94 | |||
95 | if (ppc_md.progress) | 91 | if (ppc_md.progress) |
96 | ppc_md.progress("sbc8548_setup_arch()", 0); | 92 | ppc_md.progress("sbc8548_setup_arch()", 0); |
97 | 93 | ||
98 | #ifdef CONFIG_PCI | 94 | fsl_pci_assign_primary(); |
99 | for_each_node_by_type(np, "pci") { | 95 | |
100 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | ||
101 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | ||
102 | struct resource rsrc; | ||
103 | of_address_to_resource(np, 0, &rsrc); | ||
104 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
105 | fsl_add_bridge(np, 1); | ||
106 | else | ||
107 | fsl_add_bridge(np, 0); | ||
108 | } | ||
109 | } | ||
110 | #endif | ||
111 | sbc_rev = sbc8548_hw_rev(); | 96 | sbc_rev = sbc8548_hw_rev(); |
112 | } | 97 | } |
113 | 98 | ||
@@ -128,7 +113,7 @@ static void sbc8548_show_cpuinfo(struct seq_file *m) | |||
128 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); | 113 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); |
129 | } | 114 | } |
130 | 115 | ||
131 | machine_device_initcall(sbc8548, mpc85xx_common_publish_devices); | 116 | machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices); |
132 | 117 | ||
133 | /* | 118 | /* |
134 | * Called very early, device-tree isn't unflattened | 119 | * Called very early, device-tree isn't unflattened |
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c index ff4249044a3c..6fcfa12e5c56 100644 --- a/arch/powerpc/platforms/85xx/smp.c +++ b/arch/powerpc/platforms/85xx/smp.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * Author: Andy Fleming <afleming@freescale.com> | 2 | * Author: Andy Fleming <afleming@freescale.com> |
3 | * Kumar Gala <galak@kernel.crashing.org> | 3 | * Kumar Gala <galak@kernel.crashing.org> |
4 | * | 4 | * |
5 | * Copyright 2006-2008, 2011 Freescale Semiconductor Inc. | 5 | * Copyright 2006-2008, 2011-2012 Freescale Semiconductor Inc. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
8 | * under the terms of the GNU General Public License as published by the | 8 | * under the terms of the GNU General Public License as published by the |
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/of.h> | 17 | #include <linux/of.h> |
18 | #include <linux/kexec.h> | 18 | #include <linux/kexec.h> |
19 | #include <linux/highmem.h> | 19 | #include <linux/highmem.h> |
20 | #include <linux/cpu.h> | ||
20 | 21 | ||
21 | #include <asm/machdep.h> | 22 | #include <asm/machdep.h> |
22 | #include <asm/pgtable.h> | 23 | #include <asm/pgtable.h> |
@@ -24,33 +25,118 @@ | |||
24 | #include <asm/mpic.h> | 25 | #include <asm/mpic.h> |
25 | #include <asm/cacheflush.h> | 26 | #include <asm/cacheflush.h> |
26 | #include <asm/dbell.h> | 27 | #include <asm/dbell.h> |
28 | #include <asm/fsl_guts.h> | ||
27 | 29 | ||
28 | #include <sysdev/fsl_soc.h> | 30 | #include <sysdev/fsl_soc.h> |
29 | #include <sysdev/mpic.h> | 31 | #include <sysdev/mpic.h> |
30 | #include "smp.h" | 32 | #include "smp.h" |
31 | 33 | ||
32 | extern void __early_start(void); | 34 | struct epapr_spin_table { |
33 | 35 | u32 addr_h; | |
34 | #define BOOT_ENTRY_ADDR_UPPER 0 | 36 | u32 addr_l; |
35 | #define BOOT_ENTRY_ADDR_LOWER 1 | 37 | u32 r3_h; |
36 | #define BOOT_ENTRY_R3_UPPER 2 | 38 | u32 r3_l; |
37 | #define BOOT_ENTRY_R3_LOWER 3 | 39 | u32 reserved; |
38 | #define BOOT_ENTRY_RESV 4 | 40 | u32 pir; |
39 | #define BOOT_ENTRY_PIR 5 | 41 | }; |
40 | #define BOOT_ENTRY_R6_UPPER 6 | 42 | |
41 | #define BOOT_ENTRY_R6_LOWER 7 | 43 | static struct ccsr_guts __iomem *guts; |
42 | #define NUM_BOOT_ENTRY 8 | 44 | static u64 timebase; |
43 | #define SIZE_BOOT_ENTRY (NUM_BOOT_ENTRY * sizeof(u32)) | 45 | static int tb_req; |
44 | 46 | static int tb_valid; | |
45 | static int __init | 47 | |
46 | smp_85xx_kick_cpu(int nr) | 48 | static void mpc85xx_timebase_freeze(int freeze) |
49 | { | ||
50 | uint32_t mask; | ||
51 | |||
52 | mask = CCSR_GUTS_DEVDISR_TB0 | CCSR_GUTS_DEVDISR_TB1; | ||
53 | if (freeze) | ||
54 | setbits32(&guts->devdisr, mask); | ||
55 | else | ||
56 | clrbits32(&guts->devdisr, mask); | ||
57 | |||
58 | in_be32(&guts->devdisr); | ||
59 | } | ||
60 | |||
61 | static void mpc85xx_give_timebase(void) | ||
62 | { | ||
63 | unsigned long flags; | ||
64 | |||
65 | local_irq_save(flags); | ||
66 | |||
67 | while (!tb_req) | ||
68 | barrier(); | ||
69 | tb_req = 0; | ||
70 | |||
71 | mpc85xx_timebase_freeze(1); | ||
72 | timebase = get_tb(); | ||
73 | mb(); | ||
74 | tb_valid = 1; | ||
75 | |||
76 | while (tb_valid) | ||
77 | barrier(); | ||
78 | |||
79 | mpc85xx_timebase_freeze(0); | ||
80 | |||
81 | local_irq_restore(flags); | ||
82 | } | ||
83 | |||
84 | static void mpc85xx_take_timebase(void) | ||
85 | { | ||
86 | unsigned long flags; | ||
87 | |||
88 | local_irq_save(flags); | ||
89 | |||
90 | tb_req = 1; | ||
91 | while (!tb_valid) | ||
92 | barrier(); | ||
93 | |||
94 | set_tb(timebase >> 32, timebase & 0xffffffff); | ||
95 | isync(); | ||
96 | tb_valid = 0; | ||
97 | |||
98 | local_irq_restore(flags); | ||
99 | } | ||
100 | |||
101 | #ifdef CONFIG_HOTPLUG_CPU | ||
102 | static void __cpuinit smp_85xx_mach_cpu_die(void) | ||
103 | { | ||
104 | unsigned int cpu = smp_processor_id(); | ||
105 | u32 tmp; | ||
106 | |||
107 | local_irq_disable(); | ||
108 | idle_task_exit(); | ||
109 | generic_set_cpu_dead(cpu); | ||
110 | mb(); | ||
111 | |||
112 | mtspr(SPRN_TCR, 0); | ||
113 | |||
114 | __flush_disable_L1(); | ||
115 | tmp = (mfspr(SPRN_HID0) & ~(HID0_DOZE|HID0_SLEEP)) | HID0_NAP; | ||
116 | mtspr(SPRN_HID0, tmp); | ||
117 | isync(); | ||
118 | |||
119 | /* Enter NAP mode. */ | ||
120 | tmp = mfmsr(); | ||
121 | tmp |= MSR_WE; | ||
122 | mb(); | ||
123 | mtmsr(tmp); | ||
124 | isync(); | ||
125 | |||
126 | while (1) | ||
127 | ; | ||
128 | } | ||
129 | #endif | ||
130 | |||
131 | static int __cpuinit smp_85xx_kick_cpu(int nr) | ||
47 | { | 132 | { |
48 | unsigned long flags; | 133 | unsigned long flags; |
49 | const u64 *cpu_rel_addr; | 134 | const u64 *cpu_rel_addr; |
50 | __iomem u32 *bptr_vaddr; | 135 | __iomem struct epapr_spin_table *spin_table; |
51 | struct device_node *np; | 136 | struct device_node *np; |
52 | int n = 0, hw_cpu = get_hard_smp_processor_id(nr); | 137 | int hw_cpu = get_hard_smp_processor_id(nr); |
53 | int ioremappable; | 138 | int ioremappable; |
139 | int ret = 0; | ||
54 | 140 | ||
55 | WARN_ON(nr < 0 || nr >= NR_CPUS); | 141 | WARN_ON(nr < 0 || nr >= NR_CPUS); |
56 | WARN_ON(hw_cpu < 0 || hw_cpu >= NR_CPUS); | 142 | WARN_ON(hw_cpu < 0 || hw_cpu >= NR_CPUS); |
@@ -75,46 +161,81 @@ smp_85xx_kick_cpu(int nr) | |||
75 | 161 | ||
76 | /* Map the spin table */ | 162 | /* Map the spin table */ |
77 | if (ioremappable) | 163 | if (ioremappable) |
78 | bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY); | 164 | spin_table = ioremap(*cpu_rel_addr, |
165 | sizeof(struct epapr_spin_table)); | ||
79 | else | 166 | else |
80 | bptr_vaddr = phys_to_virt(*cpu_rel_addr); | 167 | spin_table = phys_to_virt(*cpu_rel_addr); |
81 | 168 | ||
82 | local_irq_save(flags); | 169 | local_irq_save(flags); |
83 | |||
84 | out_be32(bptr_vaddr + BOOT_ENTRY_PIR, hw_cpu); | ||
85 | #ifdef CONFIG_PPC32 | 170 | #ifdef CONFIG_PPC32 |
86 | out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start)); | 171 | #ifdef CONFIG_HOTPLUG_CPU |
172 | /* Corresponding to generic_set_cpu_dead() */ | ||
173 | generic_set_cpu_up(nr); | ||
174 | |||
175 | if (system_state == SYSTEM_RUNNING) { | ||
176 | out_be32(&spin_table->addr_l, 0); | ||
177 | |||
178 | /* | ||
179 | * We don't set the BPTR register here since it already points | ||
180 | * to the boot page properly. | ||
181 | */ | ||
182 | mpic_reset_core(hw_cpu); | ||
183 | |||
184 | /* wait until core is ready... */ | ||
185 | if (!spin_event_timeout(in_be32(&spin_table->addr_l) == 1, | ||
186 | 10000, 100)) { | ||
187 | pr_err("%s: timeout waiting for core %d to reset\n", | ||
188 | __func__, hw_cpu); | ||
189 | ret = -ENOENT; | ||
190 | goto out; | ||
191 | } | ||
192 | |||
193 | /* clear the acknowledge status */ | ||
194 | __secondary_hold_acknowledge = -1; | ||
195 | } | ||
196 | #endif | ||
197 | out_be32(&spin_table->pir, hw_cpu); | ||
198 | out_be32(&spin_table->addr_l, __pa(__early_start)); | ||
87 | 199 | ||
88 | if (!ioremappable) | 200 | if (!ioremappable) |
89 | flush_dcache_range((ulong)bptr_vaddr, | 201 | flush_dcache_range((ulong)spin_table, |
90 | (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY)); | 202 | (ulong)spin_table + sizeof(struct epapr_spin_table)); |
91 | 203 | ||
92 | /* Wait a bit for the CPU to ack. */ | 204 | /* Wait a bit for the CPU to ack. */ |
93 | while ((__secondary_hold_acknowledge != hw_cpu) && (++n < 1000)) | 205 | if (!spin_event_timeout(__secondary_hold_acknowledge == hw_cpu, |
94 | mdelay(1); | 206 | 10000, 100)) { |
207 | pr_err("%s: timeout waiting for core %d to ack\n", | ||
208 | __func__, hw_cpu); | ||
209 | ret = -ENOENT; | ||
210 | goto out; | ||
211 | } | ||
212 | out: | ||
95 | #else | 213 | #else |
96 | smp_generic_kick_cpu(nr); | 214 | smp_generic_kick_cpu(nr); |
97 | 215 | ||
98 | out_be64((u64 *)(bptr_vaddr + BOOT_ENTRY_ADDR_UPPER), | 216 | out_be32(&spin_table->pir, hw_cpu); |
99 | __pa((u64)*((unsigned long long *) generic_secondary_smp_init))); | 217 | out_be64((u64 *)(&spin_table->addr_h), |
218 | __pa((u64)*((unsigned long long *)generic_secondary_smp_init))); | ||
100 | 219 | ||
101 | if (!ioremappable) | 220 | if (!ioremappable) |
102 | flush_dcache_range((ulong)bptr_vaddr, | 221 | flush_dcache_range((ulong)spin_table, |
103 | (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY)); | 222 | (ulong)spin_table + sizeof(struct epapr_spin_table)); |
104 | #endif | 223 | #endif |
105 | 224 | ||
106 | local_irq_restore(flags); | 225 | local_irq_restore(flags); |
107 | 226 | ||
108 | if (ioremappable) | 227 | if (ioremappable) |
109 | iounmap(bptr_vaddr); | 228 | iounmap(spin_table); |
110 | |||
111 | pr_debug("waited %d msecs for CPU #%d.\n", n, nr); | ||
112 | 229 | ||
113 | return 0; | 230 | return ret; |
114 | } | 231 | } |
115 | 232 | ||
116 | struct smp_ops_t smp_85xx_ops = { | 233 | struct smp_ops_t smp_85xx_ops = { |
117 | .kick_cpu = smp_85xx_kick_cpu, | 234 | .kick_cpu = smp_85xx_kick_cpu, |
235 | #ifdef CONFIG_HOTPLUG_CPU | ||
236 | .cpu_disable = generic_cpu_disable, | ||
237 | .cpu_die = generic_cpu_die, | ||
238 | #endif | ||
118 | #ifdef CONFIG_KEXEC | 239 | #ifdef CONFIG_KEXEC |
119 | .give_timebase = smp_generic_give_timebase, | 240 | .give_timebase = smp_generic_give_timebase, |
120 | .take_timebase = smp_generic_take_timebase, | 241 | .take_timebase = smp_generic_take_timebase, |
@@ -218,8 +339,7 @@ static void mpc85xx_smp_machine_kexec(struct kimage *image) | |||
218 | } | 339 | } |
219 | #endif /* CONFIG_KEXEC */ | 340 | #endif /* CONFIG_KEXEC */ |
220 | 341 | ||
221 | static void __init | 342 | static void __cpuinit smp_85xx_setup_cpu(int cpu_nr) |
222 | smp_85xx_setup_cpu(int cpu_nr) | ||
223 | { | 343 | { |
224 | if (smp_85xx_ops.probe == smp_mpic_probe) | 344 | if (smp_85xx_ops.probe == smp_mpic_probe) |
225 | mpic_setup_this_cpu(); | 345 | mpic_setup_this_cpu(); |
@@ -228,6 +348,16 @@ smp_85xx_setup_cpu(int cpu_nr) | |||
228 | doorbell_setup_this_cpu(); | 348 | doorbell_setup_this_cpu(); |
229 | } | 349 | } |
230 | 350 | ||
351 | static const struct of_device_id mpc85xx_smp_guts_ids[] = { | ||
352 | { .compatible = "fsl,mpc8572-guts", }, | ||
353 | { .compatible = "fsl,p1020-guts", }, | ||
354 | { .compatible = "fsl,p1021-guts", }, | ||
355 | { .compatible = "fsl,p1022-guts", }, | ||
356 | { .compatible = "fsl,p1023-guts", }, | ||
357 | { .compatible = "fsl,p2020-guts", }, | ||
358 | {}, | ||
359 | }; | ||
360 | |||
231 | void __init mpc85xx_smp_init(void) | 361 | void __init mpc85xx_smp_init(void) |
232 | { | 362 | { |
233 | struct device_node *np; | 363 | struct device_node *np; |
@@ -249,6 +379,22 @@ void __init mpc85xx_smp_init(void) | |||
249 | smp_85xx_ops.cause_ipi = doorbell_cause_ipi; | 379 | smp_85xx_ops.cause_ipi = doorbell_cause_ipi; |
250 | } | 380 | } |
251 | 381 | ||
382 | np = of_find_matching_node(NULL, mpc85xx_smp_guts_ids); | ||
383 | if (np) { | ||
384 | guts = of_iomap(np, 0); | ||
385 | of_node_put(np); | ||
386 | if (!guts) { | ||
387 | pr_err("%s: Could not map guts node address\n", | ||
388 | __func__); | ||
389 | return; | ||
390 | } | ||
391 | smp_85xx_ops.give_timebase = mpc85xx_give_timebase; | ||
392 | smp_85xx_ops.take_timebase = mpc85xx_take_timebase; | ||
393 | #ifdef CONFIG_HOTPLUG_CPU | ||
394 | ppc_md.cpu_die = smp_85xx_mach_cpu_die; | ||
395 | #endif | ||
396 | } | ||
397 | |||
252 | smp_ops = &smp_85xx_ops; | 398 | smp_ops = &smp_85xx_ops; |
253 | 399 | ||
254 | #ifdef CONFIG_KEXEC | 400 | #ifdef CONFIG_KEXEC |
diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c index b9c6daa07b66..ae368e0e1076 100644 --- a/arch/powerpc/platforms/85xx/socrates.c +++ b/arch/powerpc/platforms/85xx/socrates.c | |||
@@ -66,20 +66,13 @@ static void __init socrates_pic_init(void) | |||
66 | */ | 66 | */ |
67 | static void __init socrates_setup_arch(void) | 67 | static void __init socrates_setup_arch(void) |
68 | { | 68 | { |
69 | #ifdef CONFIG_PCI | ||
70 | struct device_node *np; | ||
71 | #endif | ||
72 | |||
73 | if (ppc_md.progress) | 69 | if (ppc_md.progress) |
74 | ppc_md.progress("socrates_setup_arch()", 0); | 70 | ppc_md.progress("socrates_setup_arch()", 0); |
75 | 71 | ||
76 | #ifdef CONFIG_PCI | 72 | fsl_pci_assign_primary(); |
77 | for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") | ||
78 | fsl_add_bridge(np, 1); | ||
79 | #endif | ||
80 | } | 73 | } |
81 | 74 | ||
82 | machine_device_initcall(socrates, mpc85xx_common_publish_devices); | 75 | machine_arch_initcall(socrates, mpc85xx_common_publish_devices); |
83 | 76 | ||
84 | /* | 77 | /* |
85 | * Called very early, device-tree isn't unflattened | 78 | * Called very early, device-tree isn't unflattened |
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c index e0508002b086..6f4939b6309e 100644 --- a/arch/powerpc/platforms/85xx/stx_gp3.c +++ b/arch/powerpc/platforms/85xx/stx_gp3.c | |||
@@ -60,21 +60,14 @@ static void __init stx_gp3_pic_init(void) | |||
60 | */ | 60 | */ |
61 | static void __init stx_gp3_setup_arch(void) | 61 | static void __init stx_gp3_setup_arch(void) |
62 | { | 62 | { |
63 | #ifdef CONFIG_PCI | ||
64 | struct device_node *np; | ||
65 | #endif | ||
66 | |||
67 | if (ppc_md.progress) | 63 | if (ppc_md.progress) |
68 | ppc_md.progress("stx_gp3_setup_arch()", 0); | 64 | ppc_md.progress("stx_gp3_setup_arch()", 0); |
69 | 65 | ||
66 | fsl_pci_assign_primary(); | ||
67 | |||
70 | #ifdef CONFIG_CPM2 | 68 | #ifdef CONFIG_CPM2 |
71 | cpm2_reset(); | 69 | cpm2_reset(); |
72 | #endif | 70 | #endif |
73 | |||
74 | #ifdef CONFIG_PCI | ||
75 | for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") | ||
76 | fsl_add_bridge(np, 1); | ||
77 | #endif | ||
78 | } | 71 | } |
79 | 72 | ||
80 | static void stx_gp3_show_cpuinfo(struct seq_file *m) | 73 | static void stx_gp3_show_cpuinfo(struct seq_file *m) |
@@ -93,7 +86,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m) | |||
93 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); | 86 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); |
94 | } | 87 | } |
95 | 88 | ||
96 | machine_device_initcall(stx_gp3, mpc85xx_common_publish_devices); | 89 | machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices); |
97 | 90 | ||
98 | /* | 91 | /* |
99 | * Called very early, device-tree isn't unflattened | 92 | * Called very early, device-tree isn't unflattened |
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c index 3e70a2035e53..d8941eea7075 100644 --- a/arch/powerpc/platforms/85xx/tqm85xx.c +++ b/arch/powerpc/platforms/85xx/tqm85xx.c | |||
@@ -59,10 +59,6 @@ static void __init tqm85xx_pic_init(void) | |||
59 | */ | 59 | */ |
60 | static void __init tqm85xx_setup_arch(void) | 60 | static void __init tqm85xx_setup_arch(void) |
61 | { | 61 | { |
62 | #ifdef CONFIG_PCI | ||
63 | struct device_node *np; | ||
64 | #endif | ||
65 | |||
66 | if (ppc_md.progress) | 62 | if (ppc_md.progress) |
67 | ppc_md.progress("tqm85xx_setup_arch()", 0); | 63 | ppc_md.progress("tqm85xx_setup_arch()", 0); |
68 | 64 | ||
@@ -70,20 +66,7 @@ static void __init tqm85xx_setup_arch(void) | |||
70 | cpm2_reset(); | 66 | cpm2_reset(); |
71 | #endif | 67 | #endif |
72 | 68 | ||
73 | #ifdef CONFIG_PCI | 69 | fsl_pci_assign_primary(); |
74 | for_each_node_by_type(np, "pci") { | ||
75 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | ||
76 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | ||
77 | struct resource rsrc; | ||
78 | if (!of_address_to_resource(np, 0, &rsrc)) { | ||
79 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
80 | fsl_add_bridge(np, 1); | ||
81 | else | ||
82 | fsl_add_bridge(np, 0); | ||
83 | } | ||
84 | } | ||
85 | } | ||
86 | #endif | ||
87 | } | 70 | } |
88 | 71 | ||
89 | static void tqm85xx_show_cpuinfo(struct seq_file *m) | 72 | static void tqm85xx_show_cpuinfo(struct seq_file *m) |
@@ -123,7 +106,7 @@ static void __devinit tqm85xx_ti1520_fixup(struct pci_dev *pdev) | |||
123 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, | 106 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, |
124 | tqm85xx_ti1520_fixup); | 107 | tqm85xx_ti1520_fixup); |
125 | 108 | ||
126 | machine_device_initcall(tqm85xx, mpc85xx_common_publish_devices); | 109 | machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices); |
127 | 110 | ||
128 | static const char *board[] __initdata = { | 111 | static const char *board[] __initdata = { |
129 | "tqc,tqm8540", | 112 | "tqc,tqm8540", |
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c index 41c687550ea7..dcbf7e42dce7 100644 --- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c +++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c | |||
@@ -111,18 +111,11 @@ static void xes_mpc85xx_fixups(void) | |||
111 | } | 111 | } |
112 | } | 112 | } |
113 | 113 | ||
114 | #ifdef CONFIG_PCI | ||
115 | static int primary_phb_addr; | ||
116 | #endif | ||
117 | |||
118 | /* | 114 | /* |
119 | * Setup the architecture | 115 | * Setup the architecture |
120 | */ | 116 | */ |
121 | static void __init xes_mpc85xx_setup_arch(void) | 117 | static void __init xes_mpc85xx_setup_arch(void) |
122 | { | 118 | { |
123 | #ifdef CONFIG_PCI | ||
124 | struct device_node *np; | ||
125 | #endif | ||
126 | struct device_node *root; | 119 | struct device_node *root; |
127 | const char *model = "Unknown"; | 120 | const char *model = "Unknown"; |
128 | 121 | ||
@@ -137,26 +130,14 @@ static void __init xes_mpc85xx_setup_arch(void) | |||
137 | 130 | ||
138 | xes_mpc85xx_fixups(); | 131 | xes_mpc85xx_fixups(); |
139 | 132 | ||
140 | #ifdef CONFIG_PCI | ||
141 | for_each_node_by_type(np, "pci") { | ||
142 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | ||
143 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | ||
144 | struct resource rsrc; | ||
145 | of_address_to_resource(np, 0, &rsrc); | ||
146 | if ((rsrc.start & 0xfffff) == primary_phb_addr) | ||
147 | fsl_add_bridge(np, 1); | ||
148 | else | ||
149 | fsl_add_bridge(np, 0); | ||
150 | } | ||
151 | } | ||
152 | #endif | ||
153 | |||
154 | mpc85xx_smp_init(); | 133 | mpc85xx_smp_init(); |
134 | |||
135 | fsl_pci_assign_primary(); | ||
155 | } | 136 | } |
156 | 137 | ||
157 | machine_device_initcall(xes_mpc8572, mpc85xx_common_publish_devices); | 138 | machine_arch_initcall(xes_mpc8572, mpc85xx_common_publish_devices); |
158 | machine_device_initcall(xes_mpc8548, mpc85xx_common_publish_devices); | 139 | machine_arch_initcall(xes_mpc8548, mpc85xx_common_publish_devices); |
159 | machine_device_initcall(xes_mpc8540, mpc85xx_common_publish_devices); | 140 | machine_arch_initcall(xes_mpc8540, mpc85xx_common_publish_devices); |
160 | 141 | ||
161 | /* | 142 | /* |
162 | * Called very early, device-tree isn't unflattened | 143 | * Called very early, device-tree isn't unflattened |
@@ -165,42 +146,21 @@ static int __init xes_mpc8572_probe(void) | |||
165 | { | 146 | { |
166 | unsigned long root = of_get_flat_dt_root(); | 147 | unsigned long root = of_get_flat_dt_root(); |
167 | 148 | ||
168 | if (of_flat_dt_is_compatible(root, "xes,MPC8572")) { | 149 | return of_flat_dt_is_compatible(root, "xes,MPC8572"); |
169 | #ifdef CONFIG_PCI | ||
170 | primary_phb_addr = 0x8000; | ||
171 | #endif | ||
172 | return 1; | ||
173 | } else { | ||
174 | return 0; | ||
175 | } | ||
176 | } | 150 | } |
177 | 151 | ||
178 | static int __init xes_mpc8548_probe(void) | 152 | static int __init xes_mpc8548_probe(void) |
179 | { | 153 | { |
180 | unsigned long root = of_get_flat_dt_root(); | 154 | unsigned long root = of_get_flat_dt_root(); |
181 | 155 | ||
182 | if (of_flat_dt_is_compatible(root, "xes,MPC8548")) { | 156 | return of_flat_dt_is_compatible(root, "xes,MPC8548"); |
183 | #ifdef CONFIG_PCI | ||
184 | primary_phb_addr = 0xb000; | ||
185 | #endif | ||
186 | return 1; | ||
187 | } else { | ||
188 | return 0; | ||
189 | } | ||
190 | } | 157 | } |
191 | 158 | ||
192 | static int __init xes_mpc8540_probe(void) | 159 | static int __init xes_mpc8540_probe(void) |
193 | { | 160 | { |
194 | unsigned long root = of_get_flat_dt_root(); | 161 | unsigned long root = of_get_flat_dt_root(); |
195 | 162 | ||
196 | if (of_flat_dt_is_compatible(root, "xes,MPC8540")) { | 163 | return of_flat_dt_is_compatible(root, "xes,MPC8540"); |
197 | #ifdef CONFIG_PCI | ||
198 | primary_phb_addr = 0xb000; | ||
199 | #endif | ||
200 | return 1; | ||
201 | } else { | ||
202 | return 0; | ||
203 | } | ||
204 | } | 164 | } |
205 | 165 | ||
206 | define_machine(xes_mpc8572) { | 166 | define_machine(xes_mpc8572) { |
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c index 563aafa8629c..bf5338754c5a 100644 --- a/arch/powerpc/platforms/86xx/gef_ppc9a.c +++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c | |||
@@ -73,13 +73,6 @@ static void __init gef_ppc9a_init_irq(void) | |||
73 | static void __init gef_ppc9a_setup_arch(void) | 73 | static void __init gef_ppc9a_setup_arch(void) |
74 | { | 74 | { |
75 | struct device_node *regs; | 75 | struct device_node *regs; |
76 | #ifdef CONFIG_PCI | ||
77 | struct device_node *np; | ||
78 | |||
79 | for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { | ||
80 | fsl_add_bridge(np, 1); | ||
81 | } | ||
82 | #endif | ||
83 | 76 | ||
84 | printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n"); | 77 | printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n"); |
85 | 78 | ||
@@ -87,6 +80,8 @@ static void __init gef_ppc9a_setup_arch(void) | |||
87 | mpc86xx_smp_init(); | 80 | mpc86xx_smp_init(); |
88 | #endif | 81 | #endif |
89 | 82 | ||
83 | fsl_pci_assign_primary(); | ||
84 | |||
90 | /* Remap basic board registers */ | 85 | /* Remap basic board registers */ |
91 | regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs"); | 86 | regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs"); |
92 | if (regs) { | 87 | if (regs) { |
@@ -221,6 +216,7 @@ static long __init mpc86xx_time_init(void) | |||
221 | static __initdata struct of_device_id of_bus_ids[] = { | 216 | static __initdata struct of_device_id of_bus_ids[] = { |
222 | { .compatible = "simple-bus", }, | 217 | { .compatible = "simple-bus", }, |
223 | { .compatible = "gianfar", }, | 218 | { .compatible = "gianfar", }, |
219 | { .compatible = "fsl,mpc8641-pcie", }, | ||
224 | {}, | 220 | {}, |
225 | }; | 221 | }; |
226 | 222 | ||
@@ -231,7 +227,7 @@ static int __init declare_of_platform_devices(void) | |||
231 | 227 | ||
232 | return 0; | 228 | return 0; |
233 | } | 229 | } |
234 | machine_device_initcall(gef_ppc9a, declare_of_platform_devices); | 230 | machine_arch_initcall(gef_ppc9a, declare_of_platform_devices); |
235 | 231 | ||
236 | define_machine(gef_ppc9a) { | 232 | define_machine(gef_ppc9a) { |
237 | .name = "GE PPC9A", | 233 | .name = "GE PPC9A", |
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c index cc6a91ae0889..0b7851330a07 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc310.c +++ b/arch/powerpc/platforms/86xx/gef_sbc310.c | |||
@@ -73,20 +73,14 @@ static void __init gef_sbc310_init_irq(void) | |||
73 | static void __init gef_sbc310_setup_arch(void) | 73 | static void __init gef_sbc310_setup_arch(void) |
74 | { | 74 | { |
75 | struct device_node *regs; | 75 | struct device_node *regs; |
76 | #ifdef CONFIG_PCI | ||
77 | struct device_node *np; | ||
78 | |||
79 | for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { | ||
80 | fsl_add_bridge(np, 1); | ||
81 | } | ||
82 | #endif | ||
83 | |||
84 | printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n"); | 76 | printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n"); |
85 | 77 | ||
86 | #ifdef CONFIG_SMP | 78 | #ifdef CONFIG_SMP |
87 | mpc86xx_smp_init(); | 79 | mpc86xx_smp_init(); |
88 | #endif | 80 | #endif |
89 | 81 | ||
82 | fsl_pci_assign_primary(); | ||
83 | |||
90 | /* Remap basic board registers */ | 84 | /* Remap basic board registers */ |
91 | regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs"); | 85 | regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs"); |
92 | if (regs) { | 86 | if (regs) { |
@@ -209,6 +203,7 @@ static long __init mpc86xx_time_init(void) | |||
209 | static __initdata struct of_device_id of_bus_ids[] = { | 203 | static __initdata struct of_device_id of_bus_ids[] = { |
210 | { .compatible = "simple-bus", }, | 204 | { .compatible = "simple-bus", }, |
211 | { .compatible = "gianfar", }, | 205 | { .compatible = "gianfar", }, |
206 | { .compatible = "fsl,mpc8641-pcie", }, | ||
212 | {}, | 207 | {}, |
213 | }; | 208 | }; |
214 | 209 | ||
@@ -219,7 +214,7 @@ static int __init declare_of_platform_devices(void) | |||
219 | 214 | ||
220 | return 0; | 215 | return 0; |
221 | } | 216 | } |
222 | machine_device_initcall(gef_sbc310, declare_of_platform_devices); | 217 | machine_arch_initcall(gef_sbc310, declare_of_platform_devices); |
223 | 218 | ||
224 | define_machine(gef_sbc310) { | 219 | define_machine(gef_sbc310) { |
225 | .name = "GE SBC310", | 220 | .name = "GE SBC310", |
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c index aead6b337f4a..b9eb174897b1 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc610.c +++ b/arch/powerpc/platforms/86xx/gef_sbc610.c | |||
@@ -73,13 +73,6 @@ static void __init gef_sbc610_init_irq(void) | |||
73 | static void __init gef_sbc610_setup_arch(void) | 73 | static void __init gef_sbc610_setup_arch(void) |
74 | { | 74 | { |
75 | struct device_node *regs; | 75 | struct device_node *regs; |
76 | #ifdef CONFIG_PCI | ||
77 | struct device_node *np; | ||
78 | |||
79 | for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { | ||
80 | fsl_add_bridge(np, 1); | ||
81 | } | ||
82 | #endif | ||
83 | 76 | ||
84 | printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n"); | 77 | printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n"); |
85 | 78 | ||
@@ -87,6 +80,8 @@ static void __init gef_sbc610_setup_arch(void) | |||
87 | mpc86xx_smp_init(); | 80 | mpc86xx_smp_init(); |
88 | #endif | 81 | #endif |
89 | 82 | ||
83 | fsl_pci_assign_primary(); | ||
84 | |||
90 | /* Remap basic board registers */ | 85 | /* Remap basic board registers */ |
91 | regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs"); | 86 | regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs"); |
92 | if (regs) { | 87 | if (regs) { |
@@ -198,6 +193,7 @@ static long __init mpc86xx_time_init(void) | |||
198 | static __initdata struct of_device_id of_bus_ids[] = { | 193 | static __initdata struct of_device_id of_bus_ids[] = { |
199 | { .compatible = "simple-bus", }, | 194 | { .compatible = "simple-bus", }, |
200 | { .compatible = "gianfar", }, | 195 | { .compatible = "gianfar", }, |
196 | { .compatible = "fsl,mpc8641-pcie", }, | ||
201 | {}, | 197 | {}, |
202 | }; | 198 | }; |
203 | 199 | ||
@@ -208,7 +204,7 @@ static int __init declare_of_platform_devices(void) | |||
208 | 204 | ||
209 | return 0; | 205 | return 0; |
210 | } | 206 | } |
211 | machine_device_initcall(gef_sbc610, declare_of_platform_devices); | 207 | machine_arch_initcall(gef_sbc610, declare_of_platform_devices); |
212 | 208 | ||
213 | define_machine(gef_sbc610) { | 209 | define_machine(gef_sbc610) { |
214 | .name = "GE SBC610", | 210 | .name = "GE SBC610", |
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index 62cd3c555bfb..a817398a56da 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c | |||
@@ -91,6 +91,9 @@ static struct of_device_id __initdata mpc8610_ids[] = { | |||
91 | { .compatible = "simple-bus", }, | 91 | { .compatible = "simple-bus", }, |
92 | /* So that the DMA channel nodes can be probed individually: */ | 92 | /* So that the DMA channel nodes can be probed individually: */ |
93 | { .compatible = "fsl,eloplus-dma", }, | 93 | { .compatible = "fsl,eloplus-dma", }, |
94 | /* PCI controllers */ | ||
95 | { .compatible = "fsl,mpc8610-pci", }, | ||
96 | { .compatible = "fsl,mpc8641-pcie", }, | ||
94 | {} | 97 | {} |
95 | }; | 98 | }; |
96 | 99 | ||
@@ -107,7 +110,7 @@ static int __init mpc8610_declare_of_platform_devices(void) | |||
107 | 110 | ||
108 | return 0; | 111 | return 0; |
109 | } | 112 | } |
110 | machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices); | 113 | machine_arch_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices); |
111 | 114 | ||
112 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) | 115 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) |
113 | 116 | ||
@@ -278,25 +281,13 @@ mpc8610hpcd_valid_monitor_port(enum fsl_diu_monitor_port port) | |||
278 | static void __init mpc86xx_hpcd_setup_arch(void) | 281 | static void __init mpc86xx_hpcd_setup_arch(void) |
279 | { | 282 | { |
280 | struct resource r; | 283 | struct resource r; |
281 | struct device_node *np; | ||
282 | unsigned char *pixis; | 284 | unsigned char *pixis; |
283 | 285 | ||
284 | if (ppc_md.progress) | 286 | if (ppc_md.progress) |
285 | ppc_md.progress("mpc86xx_hpcd_setup_arch()", 0); | 287 | ppc_md.progress("mpc86xx_hpcd_setup_arch()", 0); |
286 | 288 | ||
287 | #ifdef CONFIG_PCI | 289 | fsl_pci_assign_primary(); |
288 | for_each_node_by_type(np, "pci") { | 290 | |
289 | if (of_device_is_compatible(np, "fsl,mpc8610-pci") | ||
290 | || of_device_is_compatible(np, "fsl,mpc8641-pcie")) { | ||
291 | struct resource rsrc; | ||
292 | of_address_to_resource(np, 0, &rsrc); | ||
293 | if ((rsrc.start & 0xfffff) == 0xa000) | ||
294 | fsl_add_bridge(np, 1); | ||
295 | else | ||
296 | fsl_add_bridge(np, 0); | ||
297 | } | ||
298 | } | ||
299 | #endif | ||
300 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) | 291 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) |
301 | diu_ops.get_pixel_format = mpc8610hpcd_get_pixel_format; | 292 | diu_ops.get_pixel_format = mpc8610hpcd_get_pixel_format; |
302 | diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table; | 293 | diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table; |
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index 817245bc0219..e8bf3fae5606 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
20 | #include <linux/seq_file.h> | 20 | #include <linux/seq_file.h> |
21 | #include <linux/of_platform.h> | 21 | #include <linux/of_platform.h> |
22 | #include <linux/memblock.h> | ||
23 | 22 | ||
24 | #include <asm/time.h> | 23 | #include <asm/time.h> |
25 | #include <asm/machdep.h> | 24 | #include <asm/machdep.h> |
@@ -51,15 +50,8 @@ extern int uli_exclude_device(struct pci_controller *hose, | |||
51 | static int mpc86xx_exclude_device(struct pci_controller *hose, | 50 | static int mpc86xx_exclude_device(struct pci_controller *hose, |
52 | u_char bus, u_char devfn) | 51 | u_char bus, u_char devfn) |
53 | { | 52 | { |
54 | struct device_node* node; | 53 | if (hose->dn == fsl_pci_primary) |
55 | struct resource rsrc; | ||
56 | |||
57 | node = hose->dn; | ||
58 | of_address_to_resource(node, 0, &rsrc); | ||
59 | |||
60 | if ((rsrc.start & 0xfffff) == 0x8000) { | ||
61 | return uli_exclude_device(hose, bus, devfn); | 54 | return uli_exclude_device(hose, bus, devfn); |
62 | } | ||
63 | 55 | ||
64 | return PCIBIOS_SUCCESSFUL; | 56 | return PCIBIOS_SUCCESSFUL; |
65 | } | 57 | } |
@@ -69,30 +61,11 @@ static int mpc86xx_exclude_device(struct pci_controller *hose, | |||
69 | static void __init | 61 | static void __init |
70 | mpc86xx_hpcn_setup_arch(void) | 62 | mpc86xx_hpcn_setup_arch(void) |
71 | { | 63 | { |
72 | #ifdef CONFIG_PCI | ||
73 | struct device_node *np; | ||
74 | struct pci_controller *hose; | ||
75 | #endif | ||
76 | dma_addr_t max = 0xffffffff; | ||
77 | |||
78 | if (ppc_md.progress) | 64 | if (ppc_md.progress) |
79 | ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0); | 65 | ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0); |
80 | 66 | ||
81 | #ifdef CONFIG_PCI | 67 | #ifdef CONFIG_PCI |
82 | for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { | ||
83 | struct resource rsrc; | ||
84 | of_address_to_resource(np, 0, &rsrc); | ||
85 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
86 | fsl_add_bridge(np, 1); | ||
87 | else | ||
88 | fsl_add_bridge(np, 0); | ||
89 | hose = pci_find_hose_for_OF_device(np); | ||
90 | max = min(max, hose->dma_window_base_cur + | ||
91 | hose->dma_window_size); | ||
92 | } | ||
93 | |||
94 | ppc_md.pci_exclude_device = mpc86xx_exclude_device; | 68 | ppc_md.pci_exclude_device = mpc86xx_exclude_device; |
95 | |||
96 | #endif | 69 | #endif |
97 | 70 | ||
98 | printk("MPC86xx HPCN board from Freescale Semiconductor\n"); | 71 | printk("MPC86xx HPCN board from Freescale Semiconductor\n"); |
@@ -101,13 +74,9 @@ mpc86xx_hpcn_setup_arch(void) | |||
101 | mpc86xx_smp_init(); | 74 | mpc86xx_smp_init(); |
102 | #endif | 75 | #endif |
103 | 76 | ||
104 | #ifdef CONFIG_SWIOTLB | 77 | fsl_pci_assign_primary(); |
105 | if ((memblock_end_of_DRAM() - 1) > max) { | 78 | |
106 | ppc_swiotlb_enable = 1; | 79 | swiotlb_detect_4g(); |
107 | set_pci_dma_ops(&swiotlb_dma_ops); | ||
108 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; | ||
109 | } | ||
110 | #endif | ||
111 | } | 80 | } |
112 | 81 | ||
113 | 82 | ||
@@ -162,6 +131,7 @@ static __initdata struct of_device_id of_bus_ids[] = { | |||
162 | { .compatible = "simple-bus", }, | 131 | { .compatible = "simple-bus", }, |
163 | { .compatible = "fsl,srio", }, | 132 | { .compatible = "fsl,srio", }, |
164 | { .compatible = "gianfar", }, | 133 | { .compatible = "gianfar", }, |
134 | { .compatible = "fsl,mpc8641-pcie", }, | ||
165 | {}, | 135 | {}, |
166 | }; | 136 | }; |
167 | 137 | ||
@@ -171,7 +141,7 @@ static int __init declare_of_platform_devices(void) | |||
171 | 141 | ||
172 | return 0; | 142 | return 0; |
173 | } | 143 | } |
174 | machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices); | 144 | machine_arch_initcall(mpc86xx_hpcn, declare_of_platform_devices); |
175 | machine_arch_initcall(mpc86xx_hpcn, swiotlb_setup_bus_notifier); | 145 | machine_arch_initcall(mpc86xx_hpcn, swiotlb_setup_bus_notifier); |
176 | 146 | ||
177 | define_machine(mpc86xx_hpcn) { | 147 | define_machine(mpc86xx_hpcn) { |
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c index e7007d0d949e..b47a8fd0f3d3 100644 --- a/arch/powerpc/platforms/86xx/sbc8641d.c +++ b/arch/powerpc/platforms/86xx/sbc8641d.c | |||
@@ -38,23 +38,16 @@ | |||
38 | static void __init | 38 | static void __init |
39 | sbc8641_setup_arch(void) | 39 | sbc8641_setup_arch(void) |
40 | { | 40 | { |
41 | #ifdef CONFIG_PCI | ||
42 | struct device_node *np; | ||
43 | #endif | ||
44 | |||
45 | if (ppc_md.progress) | 41 | if (ppc_md.progress) |
46 | ppc_md.progress("sbc8641_setup_arch()", 0); | 42 | ppc_md.progress("sbc8641_setup_arch()", 0); |
47 | 43 | ||
48 | #ifdef CONFIG_PCI | ||
49 | for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") | ||
50 | fsl_add_bridge(np, 0); | ||
51 | #endif | ||
52 | |||
53 | printk("SBC8641 board from Wind River\n"); | 44 | printk("SBC8641 board from Wind River\n"); |
54 | 45 | ||
55 | #ifdef CONFIG_SMP | 46 | #ifdef CONFIG_SMP |
56 | mpc86xx_smp_init(); | 47 | mpc86xx_smp_init(); |
57 | #endif | 48 | #endif |
49 | |||
50 | fsl_pci_assign_primary(); | ||
58 | } | 51 | } |
59 | 52 | ||
60 | 53 | ||
@@ -102,6 +95,7 @@ mpc86xx_time_init(void) | |||
102 | static __initdata struct of_device_id of_bus_ids[] = { | 95 | static __initdata struct of_device_id of_bus_ids[] = { |
103 | { .compatible = "simple-bus", }, | 96 | { .compatible = "simple-bus", }, |
104 | { .compatible = "gianfar", }, | 97 | { .compatible = "gianfar", }, |
98 | { .compatible = "fsl,mpc8641-pcie", }, | ||
105 | {}, | 99 | {}, |
106 | }; | 100 | }; |
107 | 101 | ||
@@ -111,7 +105,7 @@ static int __init declare_of_platform_devices(void) | |||
111 | 105 | ||
112 | return 0; | 106 | return 0; |
113 | } | 107 | } |
114 | machine_device_initcall(sbc8641, declare_of_platform_devices); | 108 | machine_arch_initcall(sbc8641, declare_of_platform_devices); |
115 | 109 | ||
116 | define_machine(sbc8641) { | 110 | define_machine(sbc8641) { |
117 | .name = "SBC8641D", | 111 | .name = "SBC8641D", |