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authorScott Wood <scottwood@freescale.com>2012-07-10 20:26:49 -0400
committerKumar Gala <galak@kernel.crashing.org>2012-07-11 08:49:34 -0400
commit91a6f347921e9a65392301aecb218cb88d625528 (patch)
tree4ed37c7076944a3c120a7989d7e08ef968d572cd /arch/powerpc/platforms
parent07e4f8014f4d3404de7cdeaba3fe307cc6eecb79 (diff)
powerpc/mpc85xx_ds: convert to unified PCI init
Similar to how the primary PCI bridge is identified by looking for an isa subnode, we determine whether to apply uli exclusions by looking for a uli subnode. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ds.c97
1 files changed, 29 insertions, 68 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index d30f6c47917d..6d3265fe7718 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -114,71 +114,53 @@ void __init mpc85xx_ds_pic_init(void)
114} 114}
115 115
116#ifdef CONFIG_PCI 116#ifdef CONFIG_PCI
117static int primary_phb_addr;
118extern int uli_exclude_device(struct pci_controller *hose, 117extern int uli_exclude_device(struct pci_controller *hose,
119 u_char bus, u_char devfn); 118 u_char bus, u_char devfn);
120 119
120static struct device_node *pci_with_uli;
121
121static int mpc85xx_exclude_device(struct pci_controller *hose, 122static int mpc85xx_exclude_device(struct pci_controller *hose,
122 u_char bus, u_char devfn) 123 u_char bus, u_char devfn)
123{ 124{
124 struct device_node* node; 125 if (hose->dn == pci_with_uli)
125 struct resource rsrc;
126
127 node = hose->dn;
128 of_address_to_resource(node, 0, &rsrc);
129
130 if ((rsrc.start & 0xfffff) == primary_phb_addr) {
131 return uli_exclude_device(hose, bus, devfn); 126 return uli_exclude_device(hose, bus, devfn);
132 }
133 127
134 return PCIBIOS_SUCCESSFUL; 128 return PCIBIOS_SUCCESSFUL;
135} 129}
136#endif /* CONFIG_PCI */ 130#endif /* CONFIG_PCI */
137 131
138/* 132static void __init mpc85xx_ds_pci_init(void)
139 * Setup the architecture
140 */
141static void __init mpc85xx_ds_setup_arch(void)
142{ 133{
143#ifdef CONFIG_PCI 134#ifdef CONFIG_PCI
144 struct device_node *np; 135 struct device_node *node;
145 struct pci_controller *hose;
146#endif
147 dma_addr_t max = 0xffffffff;
148 136
149 if (ppc_md.progress) 137 fsl_pci_init();
150 ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
151 138
152#ifdef CONFIG_PCI 139 /* See if we have a ULI under the primary */
153 for_each_node_by_type(np, "pci") { 140
154 if (of_device_is_compatible(np, "fsl,mpc8540-pci") || 141 node = of_find_node_by_name(NULL, "uli1575");
155 of_device_is_compatible(np, "fsl,mpc8548-pcie") || 142 while ((pci_with_uli = of_get_parent(node))) {
156 of_device_is_compatible(np, "fsl,p2020-pcie")) { 143 of_node_put(node);
157 struct resource rsrc; 144 node = pci_with_uli;
158 of_address_to_resource(np, 0, &rsrc); 145
159 if ((rsrc.start & 0xfffff) == primary_phb_addr) 146 if (pci_with_uli == fsl_pci_primary) {
160 fsl_add_bridge(np, 1); 147 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
161 else 148 break;
162 fsl_add_bridge(np, 0);
163
164 hose = pci_find_hose_for_OF_device(np);
165 max = min(max, hose->dma_window_base_cur +
166 hose->dma_window_size);
167 } 149 }
168 } 150 }
169
170 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
171#endif 151#endif
152}
172 153
173 mpc85xx_smp_init(); 154/*
155 * Setup the architecture
156 */
157static void __init mpc85xx_ds_setup_arch(void)
158{
159 if (ppc_md.progress)
160 ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
174 161
175#ifdef CONFIG_SWIOTLB 162 mpc85xx_ds_pci_init();
176 if ((memblock_end_of_DRAM() - 1) > max) { 163 mpc85xx_smp_init();
177 ppc_swiotlb_enable = 1;
178 set_pci_dma_ops(&swiotlb_dma_ops);
179 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
180 }
181#endif
182 164
183 printk("MPC85xx DS board from Freescale Semiconductor\n"); 165 printk("MPC85xx DS board from Freescale Semiconductor\n");
184} 166}
@@ -190,14 +172,7 @@ static int __init mpc8544_ds_probe(void)
190{ 172{
191 unsigned long root = of_get_flat_dt_root(); 173 unsigned long root = of_get_flat_dt_root();
192 174
193 if (of_flat_dt_is_compatible(root, "MPC8544DS")) { 175 return !!of_flat_dt_is_compatible(root, "MPC8544DS");
194#ifdef CONFIG_PCI
195 primary_phb_addr = 0xb000;
196#endif
197 return 1;
198 }
199
200 return 0;
201} 176}
202 177
203machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices); 178machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
@@ -215,14 +190,7 @@ static int __init mpc8572_ds_probe(void)
215{ 190{
216 unsigned long root = of_get_flat_dt_root(); 191 unsigned long root = of_get_flat_dt_root();
217 192
218 if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) { 193 return !!of_flat_dt_is_compatible(root, "fsl,MPC8572DS");
219#ifdef CONFIG_PCI
220 primary_phb_addr = 0x8000;
221#endif
222 return 1;
223 }
224
225 return 0;
226} 194}
227 195
228/* 196/*
@@ -232,14 +200,7 @@ static int __init p2020_ds_probe(void)
232{ 200{
233 unsigned long root = of_get_flat_dt_root(); 201 unsigned long root = of_get_flat_dt_root();
234 202
235 if (of_flat_dt_is_compatible(root, "fsl,P2020DS")) { 203 return !!of_flat_dt_is_compatible(root, "fsl,P2020DS");
236#ifdef CONFIG_PCI
237 primary_phb_addr = 0x9000;
238#endif
239 return 1;
240 }
241
242 return 0;
243} 204}
244 205
245define_machine(mpc8544_ds) { 206define_machine(mpc8544_ds) {