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authorArnd Bergmann <arnd.bergmann@de.ibm.com>2006-03-24 13:47:52 -0500
committerPaul Mackerras <paulus@samba.org>2006-03-26 22:48:42 -0500
commit47952d5ea67dc7098667a954483a82acf81eb4da (patch)
tree1696c80c6b883496006abd0a4586b02a981a50d4 /arch/powerpc/platforms
parent2fa68747dad290f4415e2ea8565d57876747b2d3 (diff)
[PATCH] powerpc: use guarded ioremap for cell on-chip mappings
I'm not sure where the information came from, but I assumed that doing cache-inhibited mappings for mmio regions was sufficient. It seems we also need the guarded bit set, like everyone else, which is the default for ioremap. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c10
-rw-r--r--arch/powerpc/platforms/cell/iommu.c12
-rw-r--r--arch/powerpc/platforms/cell/pervasive.c2
-rw-r--r--arch/powerpc/platforms/cell/spider-pic.c4
4 files changed, 12 insertions, 16 deletions
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index e3fffdfcc674..ae62f5d5c31b 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -226,9 +226,7 @@ static int setup_iic_hardcoded(void)
226 regs += 0x20; 226 regs += 0x20;
227 227
228 printk(KERN_INFO "IIC for CPU %d at %lx\n", cpu, regs); 228 printk(KERN_INFO "IIC for CPU %d at %lx\n", cpu, regs);
229 iic->regs = __ioremap(regs, sizeof(struct iic_regs), 229 iic->regs = ioremap(regs, sizeof(struct iic_regs));
230 _PAGE_NO_CACHE);
231
232 iic->target_id = (nodeid << 4) + ((cpu & 1) ? 0xf : 0xe); 230 iic->target_id = (nodeid << 4) + ((cpu & 1) ? 0xf : 0xe);
233 } 231 }
234 232
@@ -269,14 +267,12 @@ static int setup_iic(void)
269 } 267 }
270 268
271 iic = &per_cpu(iic, np[0]); 269 iic = &per_cpu(iic, np[0]);
272 iic->regs = __ioremap(regs[0], sizeof(struct iic_regs), 270 iic->regs = ioremap(regs[0], sizeof(struct iic_regs));
273 _PAGE_NO_CACHE);
274 iic->target_id = ((np[0] & 2) << 3) + ((np[0] & 1) ? 0xf : 0xe); 271 iic->target_id = ((np[0] & 2) << 3) + ((np[0] & 1) ? 0xf : 0xe);
275 printk("IIC for CPU %d at %lx mapped to %p\n", np[0], regs[0], iic->regs); 272 printk("IIC for CPU %d at %lx mapped to %p\n", np[0], regs[0], iic->regs);
276 273
277 iic = &per_cpu(iic, np[1]); 274 iic = &per_cpu(iic, np[1]);
278 iic->regs = __ioremap(regs[2], sizeof(struct iic_regs), 275 iic->regs = ioremap(regs[2], sizeof(struct iic_regs));
279 _PAGE_NO_CACHE);
280 iic->target_id = ((np[1] & 2) << 3) + ((np[1] & 1) ? 0xf : 0xe); 276 iic->target_id = ((np[1] & 2) << 3) + ((np[1] & 1) ? 0xf : 0xe);
281 printk("IIC for CPU %d at %lx mapped to %p\n", np[1], regs[2], iic->regs); 277 printk("IIC for CPU %d at %lx mapped to %p\n", np[1], regs[2], iic->regs);
282 278
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index c8a98be8b6a1..a49ceb799a8e 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -344,8 +344,8 @@ static int cell_map_iommu_hardcoded(int num_nodes)
344 344
345 /* node 0 */ 345 /* node 0 */
346 iommu = &cell_iommus[0]; 346 iommu = &cell_iommus[0];
347 iommu->mapped_base = __ioremap(0x20000511000, 0x1000, _PAGE_NO_CACHE); 347 iommu->mapped_base = ioremap(0x20000511000, 0x1000);
348 iommu->mapped_mmio_base = __ioremap(0x20000510000, 0x1000, _PAGE_NO_CACHE); 348 iommu->mapped_mmio_base = ioremap(0x20000510000, 0x1000);
349 349
350 enable_mapping(iommu->mapped_base, iommu->mapped_mmio_base); 350 enable_mapping(iommu->mapped_base, iommu->mapped_mmio_base);
351 351
@@ -357,8 +357,8 @@ static int cell_map_iommu_hardcoded(int num_nodes)
357 357
358 /* node 1 */ 358 /* node 1 */
359 iommu = &cell_iommus[1]; 359 iommu = &cell_iommus[1];
360 iommu->mapped_base = __ioremap(0x30000511000, 0x1000, _PAGE_NO_CACHE); 360 iommu->mapped_base = ioremap(0x30000511000, 0x1000);
361 iommu->mapped_mmio_base = __ioremap(0x30000510000, 0x1000, _PAGE_NO_CACHE); 361 iommu->mapped_mmio_base = ioremap(0x30000510000, 0x1000);
362 362
363 enable_mapping(iommu->mapped_base, iommu->mapped_mmio_base); 363 enable_mapping(iommu->mapped_base, iommu->mapped_mmio_base);
364 364
@@ -407,8 +407,8 @@ static int cell_map_iommu(void)
407 iommu->base = *base; 407 iommu->base = *base;
408 iommu->mmio_base = *mmio_base; 408 iommu->mmio_base = *mmio_base;
409 409
410 iommu->mapped_base = __ioremap(*base, 0x1000, _PAGE_NO_CACHE); 410 iommu->mapped_base = ioremap(*base, 0x1000);
411 iommu->mapped_mmio_base = __ioremap(*mmio_base, 0x1000, _PAGE_NO_CACHE); 411 iommu->mapped_mmio_base = ioremap(*mmio_base, 0x1000);
412 412
413 enable_mapping(iommu->mapped_base, 413 enable_mapping(iommu->mapped_base,
414 iommu->mapped_mmio_base); 414 iommu->mapped_mmio_base);
diff --git a/arch/powerpc/platforms/cell/pervasive.c b/arch/powerpc/platforms/cell/pervasive.c
index e0e051c675dd..58baeb52f6fc 100644
--- a/arch/powerpc/platforms/cell/pervasive.c
+++ b/arch/powerpc/platforms/cell/pervasive.c
@@ -203,7 +203,7 @@ found:
203 203
204 pr_debug("pervasive area for CPU %d at %lx, size %x\n", 204 pr_debug("pervasive area for CPU %d at %lx, size %x\n",
205 cpu, real_address, size); 205 cpu, real_address, size);
206 p->regs = __ioremap(real_address, size, _PAGE_NO_CACHE); 206 p->regs = ioremap(real_address, size);
207 p->thread = thread; 207 p->thread = thread;
208 return 0; 208 return 0;
209} 209}
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 9647a8dad4fe..55cbdd77a62d 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -159,7 +159,7 @@ void spider_init_IRQ_hardcoded(void)
159 for (node = 0; node < num_present_cpus()/2; node++) { 159 for (node = 0; node < num_present_cpus()/2; node++) {
160 spiderpic = pics[node]; 160 spiderpic = pics[node];
161 printk(KERN_DEBUG "SPIDER addr: %lx\n", spiderpic); 161 printk(KERN_DEBUG "SPIDER addr: %lx\n", spiderpic);
162 spider_pics[node] = __ioremap(spiderpic, 0x800, _PAGE_NO_CACHE); 162 spider_pics[node] = ioremap(spiderpic, 0x800);
163 for (n = 0; n < IIC_NUM_EXT; n++) { 163 for (n = 0; n < IIC_NUM_EXT; n++) {
164 int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; 164 int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
165 get_irq_desc(irq)->handler = &spider_pic; 165 get_irq_desc(irq)->handler = &spider_pic;
@@ -210,7 +210,7 @@ void spider_init_IRQ(void)
210 if ( n != 2) 210 if ( n != 2)
211 printk("reg property with invalid number of elements \n"); 211 printk("reg property with invalid number of elements \n");
212 212
213 spider_pics[node] = __ioremap(spider_reg, 0x800, _PAGE_NO_CACHE); 213 spider_pics[node] = ioremap(spider_reg, 0x800);
214 214
215 printk("SPIDER addr: %lx with %i addr_cells mapped to %p\n", 215 printk("SPIDER addr: %lx with %i addr_cells mapped to %p\n",
216 spider_reg, n, spider_pics[node]); 216 spider_reg, n, spider_pics[node]);