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authorJon Loeliger <jdl@freescale.com>2006-08-17 15:27:57 -0400
committerPaul Mackerras <paulus@samba.org>2006-08-25 00:32:13 -0400
commitc85c41ad73c6db4cf4cc98c595cc5e2fdbdb53d5 (patch)
tree6d198b8f8f6fb2e22f39265c4083fb5796f09eff /arch/powerpc/platforms
parent5dc599c206ad50e1b190edfbc98b7cf8ce361003 (diff)
[POWERPC] Use mpc8641hpcn PIC base address from dev tree.
After going through the trouble of setting up the PIC base address in the pic@40000 device tree node, use it instead of the obsolete hard-coded value. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c19
1 files changed, 9 insertions, 10 deletions
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 813eb5811eb4..0b1b52168bb7 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -68,37 +68,36 @@ mpc86xx_hpcn_init_irq(void)
68{ 68{
69 struct mpic *mpic1; 69 struct mpic *mpic1;
70 struct device_node *np; 70 struct device_node *np;
71 phys_addr_t openpic_paddr; 71 struct resource res;
72#ifdef CONFIG_PCI 72#ifdef CONFIG_PCI
73 struct device_node *cascade_node = NULL; 73 struct device_node *cascade_node = NULL;
74 int cascade_irq; 74 int cascade_irq;
75#endif 75#endif
76 76
77 /* Determine PIC address. */
77 np = of_find_node_by_type(NULL, "open-pic"); 78 np = of_find_node_by_type(NULL, "open-pic");
78 if (np == NULL) 79 if (np == NULL)
79 return; 80 return;
80 81 of_address_to_resource(np, 0, &res);
81 /* Determine the Physical Address of the OpenPIC regs */
82 openpic_paddr = get_immrbase() + MPC86xx_OPENPIC_OFFSET;
83 82
84 /* Alloc mpic structure and per isu has 16 INT entries. */ 83 /* Alloc mpic structure and per isu has 16 INT entries. */
85 mpic1 = mpic_alloc(np, openpic_paddr, 84 mpic1 = mpic_alloc(np, res.start,
86 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 85 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
87 16, NR_IRQS - 4, 86 16, NR_IRQS - 4,
88 " MPIC "); 87 " MPIC ");
89 BUG_ON(mpic1 == NULL); 88 BUG_ON(mpic1 == NULL);
90 89
91 mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10000); 90 mpic_assign_isu(mpic1, 0, res.start + 0x10000);
92 91
93 /* 48 Internal Interrupts */ 92 /* 48 Internal Interrupts */
94 mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10200); 93 mpic_assign_isu(mpic1, 1, res.start + 0x10200);
95 mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10400); 94 mpic_assign_isu(mpic1, 2, res.start + 0x10400);
96 mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10600); 95 mpic_assign_isu(mpic1, 3, res.start + 0x10600);
97 96
98 /* 16 External interrupts 97 /* 16 External interrupts
99 * Moving them from [0 - 15] to [64 - 79] 98 * Moving them from [0 - 15] to [64 - 79]
100 */ 99 */
101 mpic_assign_isu(mpic1, 4, openpic_paddr + 0x10000); 100 mpic_assign_isu(mpic1, 4, res.start + 0x10000);
102 101
103 mpic_init(mpic1); 102 mpic_init(mpic1);
104 103