Merge remote-tracking branch 'kumar/next' into next

Freescale updates for 3.6

12 files changed, 386 insertions, 465 deletions

diff --git a/arch/powerpc/platforms/82xx/km82xx.c b/arch/powerpc/platforms/82xx/km82xx.c
index 3661bcdc326a..cf964e19573a 100644
--- a/arch/powerpc/platforms/82xx/km82xx.c
+++ b/arch/powerpc/platforms/82xx/km82xx.c
@@ -128,6 +128,11 @@ static __initdata struct cpm_pin km82xx_pins[] = {
         {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
         {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
         {3, 25, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXD */
+
+        /* SPI */
+        {3, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MISO PD16 */
+        {3, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MOSI PD17 */
+        {3, 18, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_CLK PD18 */
 };
 
 static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/83xx/km83xx.c b/arch/powerpc/platforms/83xx/km83xx.c
index a266ba876863..89923d723349 100644
--- a/arch/powerpc/platforms/83xx/km83xx.c
+++ b/arch/powerpc/platforms/83xx/km83xx.c
@@ -3,7 +3,7 @@
  * Author: Heiko Schocher <hs@denx.de>
  *
  * Description:
- * Keymile KMETER1 board specific routines.
+ * Keymile 83xx platform specific routines.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -70,54 +70,88 @@ static void __init mpc83xx_km_setup_arch(void)
                 for_each_node_by_name(np, "spi")
                         par_io_of_config(np);
 
-                for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
+                for_each_node_by_name(np, "ucc")
                         par_io_of_config(np);
         }
 
         np = of_find_compatible_node(NULL, "network", "ucc_geth");
         if (np != NULL) {
-                uint svid;
+                /*
+                 * handle mpc8360E Erratum QE_ENET10:
+                 * RGMII AC values do not meet the specification
+                 */
+                uint svid = mfspr(SPRN_SVR);
+                struct  device_node *np_par;
+                struct  resource res;
+                void    __iomem *base;
+                int     ret;
+
+                np_par = of_find_node_by_name(NULL, "par_io");
+                if (np_par == NULL) {
+                        printk(KERN_WARNING "%s couldn;t find par_io node\n",
+                                __func__);
+                        return;
+                }
+                /* Map Parallel I/O ports registers */
+                ret = of_address_to_resource(np_par, 0, &res);
+                if (ret) {
+                        printk(KERN_WARNING "%s couldn;t map par_io registers\n",
+                                __func__);
+                        return;
+                }
+
+                base = ioremap(res.start, res.end - res.start + 1);
+
+                /*
+                 * set output delay adjustments to default values according
+                 * table 5 in Errata Rev. 5, 9/2011:
+                 *
+                 * write 0b01 to UCC1 bits 18:19
+                 * write 0b01 to UCC2 option 1 bits 4:5
+                 * write 0b01 to UCC2 option 2 bits 16:17
+                 */
+                clrsetbits_be32((base + 0xa8), 0x0c00f000, 0x04005000);
+
+                /*
+                 * set output delay adjustments to default values according
+                 * table 3-13 in Reference Manual Rev.3 05/2010:
+                 *
+                 * write 0b01 to UCC2 option 2 bits 16:17
+                 * write 0b0101 to UCC1 bits 20:23
+                 * write 0b0101 to UCC2 option 1 bits 24:27
+                 */
+                clrsetbits_be32((base + 0xac), 0x0000cff0, 0x00004550);
 
-                /* handle mpc8360ea rev.2.1 erratum 2: RGMII Timing */
-                svid = mfspr(SPRN_SVR);
                 if (SVR_REV(svid) == 0x0021) {
-                        struct  device_node *np_par;
-                        struct  resource res;
-                        void    __iomem *base;
-                        int     ret;
-
-                        np_par = of_find_node_by_name(NULL, "par_io");
-                        if (np_par == NULL) {
-                                printk(KERN_WARNING "%s couldn;t find par_io node\n",
-                                        __func__);
-                                return;
-                        }
-                        /* Map Parallel I/O ports registers */
-                        ret = of_address_to_resource(np_par, 0, &res);
-                        if (ret) {
-                                printk(KERN_WARNING "%s couldn;t map par_io registers\n",
-                                        __func__);
-                                return;
-                        }
-                        base = ioremap(res.start, resource_size(&res));
+                        /*
+                         * UCC2 option 1: write 0b1010 to bits 24:27
+                         * at address IMMRBAR+0x14AC
+                         */
+                        clrsetbits_be32((base + 0xac), 0x000000f0, 0x000000a0);
+                } else if (SVR_REV(svid) == 0x0020) {
+                        /*
+                         * UCC1: write 0b11 to bits 18:19
+                         * at address IMMRBAR+0x14A8
+                         */
+                        setbits32((base + 0xa8), 0x00003000);
 
                         /*
-                         * IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2)
-                         * IMMR + 0x14A8[18:19] = 11 (clk delay for UCC 1)
+                         * UCC2 option 1: write 0b11 to bits 4:5
+                         * at address IMMRBAR+0x14A8
                          */
-                        setbits32((base + 0xa8), 0x0c003000);
+                        setbits32((base + 0xa8), 0x0c000000);
 
                         /*
-                         * IMMR + 0x14AC[20:27] = 10101010
-                         * (data delay for both UCC's)
+                         * UCC2 option 2: write 0b11 to bits 16:17
+                         * at address IMMRBAR+0x14AC
                          */
-                        clrsetbits_be32((base + 0xac), 0xff0, 0xaa0);
-                        iounmap(base);
-                        of_node_put(np_par);
+                        setbits32((base + 0xac), 0x0000c000);
                 }
+                iounmap(base);
+                of_node_put(np_par);
                 of_node_put(np);
         }
-#endif                          /* CONFIG_QUICC_ENGINE */
+#endif  /* CONFIG_QUICC_ENGINE */
 }
 
 machine_device_initcall(mpc83xx_km, mpc83xx_declare_of_platform_devices);
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index f000d81c4e31..159c01e91463 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -23,6 +23,15 @@ config FSL_85XX_CACHE_SRAM
           cache-sram-size and cache-sram-offset kernel boot
           parameters should be passed when this option is enabled.
 
+config BSC9131_RDB
+        bool "Freescale BSC9131RDB"
+        select DEFAULT_UIMAGE
+        help
+          This option enables support for the Freescale BSC9131RDB board.
+          The BSC9131 is a heterogeneous SoC containing an e500v2 powerpc and a
+          StarCore SC3850 DSP
+          Manufacturer : Freescale Semiconductor, Inc
+
 config MPC8540_ADS
         bool "Freescale MPC8540 ADS"
         select DEFAULT_UIMAGE
@@ -175,12 +184,6 @@ config SBC8548
         help
           This option enables support for the Wind River SBC8548 board
 
-config SBC8560
-        bool "Wind River SBC8560"
-        select DEFAULT_UIMAGE
-        help
-          This option enables support for the Wind River SBC8560 board
-
 config GE_IMP3A
         bool "GE Intelligent Platforms IMP3A"
         select DEFAULT_UIMAGE
@@ -222,18 +225,6 @@ config P3041_DS
         help
           This option enables support for the P3041 DS board
 
-config P3060_QDS
-        bool "Freescale P3060 QDS"
-        select DEFAULT_UIMAGE
-        select PPC_E500MC
-        select PHYS_64BIT
-        select SWIOTLB
-        select GPIO_MPC8XXX
-        select HAS_RAPIDIO
-        select PPC_EPAPR_HV_PIC
-        help
-          This option enables support for the P3060 QDS board
-
 config P4080_DS
         bool "Freescale P4080 DS"
         select DEFAULT_UIMAGE
@@ -263,6 +254,22 @@ config P5020_DS
         help
           This option enables support for the P5020 DS board
 
+config PPC_QEMU_E500
+        bool "QEMU generic e500 platform"
+        depends on EXPERIMENTAL
+        select DEFAULT_UIMAGE
+        help
+          This option enables support for running as a QEMU guest using
+          QEMU's generic e500 machine.  This is not required if you're
+          using a QEMU machine that targets a specific board, such as
+          mpc8544ds.
+
+          Unlike most e500 boards that target a specific CPU, this
+          platform works with any e500-family CPU that QEMU supports.
+          Thus, you'll need to make sure CONFIG_PPC_E500MC is set or
+          unset based on the emulated CPU (or actual host CPU in the case
+          of KVM).
+
 endif # FSL_SOC_BOOKE
 
 config TQM85xx
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 2125d4ca068a..3dfe81175036 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_SMP) += smp.o
 
 obj-y += common.o
 
+obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
 obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
@@ -17,14 +18,13 @@ obj-$(CONFIG_P1022_DS)    += p1022_ds.o
 obj-$(CONFIG_P1023_RDS)   += p1023_rds.o
 obj-$(CONFIG_P2041_RDB)   += p2041_rdb.o corenet_ds.o
 obj-$(CONFIG_P3041_DS)    += p3041_ds.o corenet_ds.o
-obj-$(CONFIG_P3060_QDS)   += p3060_qds.o corenet_ds.o
 obj-$(CONFIG_P4080_DS)    += p4080_ds.o corenet_ds.o
 obj-$(CONFIG_P5020_DS)    += p5020_ds.o corenet_ds.o
 obj-$(CONFIG_STX_GP3)     += stx_gp3.o
 obj-$(CONFIG_TQM85xx)     += tqm85xx.o
-obj-$(CONFIG_SBC8560)     += sbc8560.o
 obj-$(CONFIG_SBC8548)     += sbc8548.o
 obj-$(CONFIG_SOCRATES)    += socrates.o socrates_fpga_pic.o
 obj-$(CONFIG_KSI8560)     += ksi8560.o
 obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
 obj-$(CONFIG_GE_IMP3A)    += ge_imp3a.o
+obj-$(CONFIG_PPC_QEMU_E500) += qemu_e500.o
diff --git a/arch/powerpc/platforms/85xx/bsc913x_rdb.c b/arch/powerpc/platforms/85xx/bsc913x_rdb.c
new file mode 100644
index 000000000000..9d57bedb940c
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/bsc913x_rdb.c
@@ -0,0 +1,67 @@
+/*
+ * BSC913xRDB Board Setup
+ *
+ * Author: Priyanka Jain <Priyanka.Jain@freescale.com>
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/of_platform.h>
+#include <linux/pci.h>
+#include <asm/mpic.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/udbg.h>
+
+#include "mpc85xx.h"
+
+void __init bsc913x_rdb_pic_init(void)
+{
+        struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
+          MPIC_SINGLE_DEST_CPU,
+          0, 256, " OpenPIC  ");
+
+        if (!mpic)
+                pr_err("bsc913x: Failed to allocate MPIC structure\n");
+        else
+                mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init bsc913x_rdb_setup_arch(void)
+{
+        if (ppc_md.progress)
+                ppc_md.progress("bsc913x_rdb_setup_arch()", 0);
+
+        pr_info("bsc913x board from Freescale Semiconductor\n");
+}
+
+machine_device_initcall(bsc9131_rdb, mpc85xx_common_publish_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+
+static int __init bsc9131_rdb_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        return of_flat_dt_is_compatible(root, "fsl,bsc9131rdb");
+}
+
+define_machine(bsc9131_rdb) {
+        .name                   = "BSC9131 RDB",
+        .probe                  = bsc9131_rdb_probe,
+        .setup_arch             = bsc913x_rdb_setup_arch,
+        .init_IRQ               = bsc913x_rdb_pic_init,
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index d30f6c47917d..6d3265fe7718 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -114,71 +114,53 @@ void __init mpc85xx_ds_pic_init(void)
 }
 
 #ifdef CONFIG_PCI
-static int primary_phb_addr;
 extern int uli_exclude_device(struct pci_controller *hose,
                                 u_char bus, u_char devfn);
 
+static struct device_node *pci_with_uli;
+
 static int mpc85xx_exclude_device(struct pci_controller *hose,
                                    u_char bus, u_char devfn)
 {
-        struct device_node* node;
-        struct resource rsrc;
-
-        node = hose->dn;
-        of_address_to_resource(node, 0, &rsrc);
-
-        if ((rsrc.start & 0xfffff) == primary_phb_addr) {
+        if (hose->dn == pci_with_uli)
                 return uli_exclude_device(hose, bus, devfn);
-        }
 
         return PCIBIOS_SUCCESSFUL;
 }
 #endif  /* CONFIG_PCI */
 
-/*
- * Setup the architecture
- */
-static void __init mpc85xx_ds_setup_arch(void)
+static void __init mpc85xx_ds_pci_init(void)
 {
 #ifdef CONFIG_PCI
-        struct device_node *np;
-        struct pci_controller *hose;
-#endif
-        dma_addr_t max = 0xffffffff;
+        struct device_node *node;
 
-        if (ppc_md.progress)
-                ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
+        fsl_pci_init();
 
-#ifdef CONFIG_PCI
-        for_each_node_by_type(np, "pci") {
-                if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                    of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
-                    of_device_is_compatible(np, "fsl,p2020-pcie")) {
-                        struct resource rsrc;
-                        of_address_to_resource(np, 0, &rsrc);
-                        if ((rsrc.start & 0xfffff) == primary_phb_addr)
-                                fsl_add_bridge(np, 1);
-                        else
-                                fsl_add_bridge(np, 0);
-
-                        hose = pci_find_hose_for_OF_device(np);
-                        max = min(max, hose->dma_window_base_cur +
-                                        hose->dma_window_size);
+        /* See if we have a ULI under the primary */
+
+        node = of_find_node_by_name(NULL, "uli1575");
+        while ((pci_with_uli = of_get_parent(node))) {
+                of_node_put(node);
+                node = pci_with_uli;
+
+                if (pci_with_uli == fsl_pci_primary) {
+                        ppc_md.pci_exclude_device = mpc85xx_exclude_device;
+                        break;
                 }
         }
-
-        ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
+}
 
-        mpc85xx_smp_init();
+/*
+ * Setup the architecture
+ */
+static void __init mpc85xx_ds_setup_arch(void)
+{
+        if (ppc_md.progress)
+                ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
 
-#ifdef CONFIG_SWIOTLB
-        if ((memblock_end_of_DRAM() - 1) > max) {
-                ppc_swiotlb_enable = 1;
-                set_pci_dma_ops(&swiotlb_dma_ops);
-                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-        }
-#endif
+        mpc85xx_ds_pci_init();
+        mpc85xx_smp_init();
 
         printk("MPC85xx DS board from Freescale Semiconductor\n");
 }
@@ -190,14 +172,7 @@ static int __init mpc8544_ds_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
 
-        if (of_flat_dt_is_compatible(root, "MPC8544DS")) {
-#ifdef CONFIG_PCI
-                primary_phb_addr = 0xb000;
-#endif
-                return 1;
-        }
-
-        return 0;
+        return !!of_flat_dt_is_compatible(root, "MPC8544DS");
 }
 
 machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
@@ -215,14 +190,7 @@ static int __init mpc8572_ds_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
 
-        if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) {
-#ifdef CONFIG_PCI
-                primary_phb_addr = 0x8000;
-#endif
-                return 1;
-        }
-
-        return 0;
+        return !!of_flat_dt_is_compatible(root, "fsl,MPC8572DS");
 }
 
 /*
@@ -232,14 +200,7 @@ static int __init p2020_ds_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
 
-        if (of_flat_dt_is_compatible(root, "fsl,P2020DS")) {
-#ifdef CONFIG_PCI
-                primary_phb_addr = 0x9000;
-#endif
-                return 1;
-        }
-
-        return 0;
+        return !!of_flat_dt_is_compatible(root, "fsl,P2020DS");
 }
 
 define_machine(mpc8544_ds) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 313fce4f5574..1910fdcb75b2 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -169,6 +169,7 @@ machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
 machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
 machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
 machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
+machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
@@ -237,6 +238,13 @@ static int __init p1020_utm_pc_probe(void)
         return of_flat_dt_is_compatible(root, "fsl,P1020UTM-PC");
 }
 
+static int __init p1024_rdb_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        return of_flat_dt_is_compatible(root, "fsl,P1024RDB");
+}
+
 define_machine(p2020_rdb) {
         .name                   = "P2020 RDB",
         .probe                  = p2020_rdb_probe,
@@ -348,3 +356,17 @@ define_machine(p1020_rdb_pc) {
         .calibrate_decr         = generic_calibrate_decr,
         .progress               = udbg_progress,
 };
+
+define_machine(p1024_rdb) {
+        .name                   = "P1024 RDB",
+        .probe                  = p1024_rdb_probe,
+        .setup_arch             = mpc85xx_rdb_setup_arch,
+        .init_IRQ               = mpc85xx_rdb_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 31d18b964f94..89ee02c54561 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -27,6 +27,7 @@
 #include <sysdev/fsl_pci.h>
 #include <asm/udbg.h>
 #include <asm/fsl_guts.h>
+#include <asm/fsl_lbc.h>
 #include "smp.h"
 
 #include "mpc85xx.h"
@@ -142,17 +143,73 @@ static void p1022ds_set_gamma_table(enum fsl_diu_monitor_port port,
 {
 }
 
+struct fsl_law {
+        u32     lawbar;
+        u32     reserved1;
+        u32     lawar;
+        u32     reserved[5];
+};
+
+#define LAWBAR_MASK     0x00F00000
+#define LAWBAR_SHIFT    12
+
+#define LAWAR_EN        0x80000000
+#define LAWAR_TGT_MASK  0x01F00000
+#define LAW_TRGT_IF_LBC (0x04 << 20)
+
+#define LAWAR_MASK      (LAWAR_EN | LAWAR_TGT_MASK)
+#define LAWAR_MATCH     (LAWAR_EN | LAW_TRGT_IF_LBC)
+
+#define BR_BA           0xFFFF8000
+
+/*
+ * Map a BRx value to a physical address
+ *
+ * The localbus BRx registers only store the lower 32 bits of the address.  To
+ * obtain the upper four bits, we need to scan the LAW table.  The entry which
+ * maps to the localbus will contain the upper four bits.
+ */
+static phys_addr_t lbc_br_to_phys(const void *ecm, unsigned int count, u32 br)
+{
+#ifndef CONFIG_PHYS_64BIT
+        /*
+         * If we only have 32-bit addressing, then the BRx address *is* the
+         * physical address.
+         */
+        return br & BR_BA;
+#else
+        const struct fsl_law *law = ecm + 0xc08;
+        unsigned int i;
+
+        for (i = 0; i < count; i++) {
+                u64 lawbar = in_be32(&law[i].lawbar);
+                u32 lawar = in_be32(&law[i].lawar);
+
+                if ((lawar & LAWAR_MASK) == LAWAR_MATCH)
+                        /* Extract the upper four bits */
+                        return (br & BR_BA) | ((lawbar & LAWBAR_MASK) << 12);
+        }
+
+        return 0;
+#endif
+}
+
 /**
  * p1022ds_set_monitor_port: switch the output to a different monitor port
- *
  */
 static void p1022ds_set_monitor_port(enum fsl_diu_monitor_port port)
 {
         struct device_node *guts_node;
-        struct device_node *indirect_node = NULL;
+        struct device_node *lbc_node = NULL;
+        struct device_node *law_node = NULL;
         struct ccsr_guts __iomem *guts;
+        struct fsl_lbc_regs *lbc = NULL;
+        void *ecm = NULL;
         u8 __iomem *lbc_lcs0_ba = NULL;
         u8 __iomem *lbc_lcs1_ba = NULL;
+        phys_addr_t cs0_addr, cs1_addr;
+        const __be32 *iprop;
+        unsigned int num_laws;
         u8 b;
 
         /* Map the global utilities registers. */
@@ -168,25 +225,43 @@ static void p1022ds_set_monitor_port(enum fsl_diu_monitor_port port)
                 goto exit;
         }
 
-        indirect_node = of_find_compatible_node(NULL, NULL,
-                                             "fsl,p1022ds-indirect-pixis");
-        if (!indirect_node) {
-                pr_err("p1022ds: missing pixis indirect mode node\n");
+        lbc_node = of_find_compatible_node(NULL, NULL, "fsl,p1022-elbc");
+        if (!lbc_node) {
+                pr_err("p1022ds: missing localbus node\n");
                 goto exit;
         }
 
-        lbc_lcs0_ba = of_iomap(indirect_node, 0);
-        if (!lbc_lcs0_ba) {
-                pr_err("p1022ds: could not map localbus chip select 0\n");
+        lbc = of_iomap(lbc_node, 0);
+        if (!lbc) {
+                pr_err("p1022ds: could not map localbus node\n");
                 goto exit;
         }
 
-        lbc_lcs1_ba = of_iomap(indirect_node, 1);
-        if (!lbc_lcs1_ba) {
-                pr_err("p1022ds: could not map localbus chip select 1\n");
+        law_node = of_find_compatible_node(NULL, NULL, "fsl,ecm-law");
+        if (!law_node) {
+                pr_err("p1022ds: missing local access window node\n");
                 goto exit;
         }
 
+        ecm = of_iomap(law_node, 0);
+        if (!ecm) {
+                pr_err("p1022ds: could not map local access window node\n");
+                goto exit;
+        }
+
+        iprop = of_get_property(law_node, "fsl,num-laws", 0);
+        if (!iprop) {
+                pr_err("p1022ds: LAW node is missing fsl,num-laws property\n");
+                goto exit;
+        }
+        num_laws = be32_to_cpup(iprop);
+
+        cs0_addr = lbc_br_to_phys(ecm, num_laws, in_be32(&lbc->bank[0].br));
+        cs1_addr = lbc_br_to_phys(ecm, num_laws, in_be32(&lbc->bank[1].br));
+
+        lbc_lcs0_ba = ioremap(cs0_addr, 1);
+        lbc_lcs1_ba = ioremap(cs1_addr, 1);
+
         /* Make sure we're in indirect mode first. */
         if ((in_be32(&guts->pmuxcr) & PMUXCR_ELBCDIU_MASK) !=
             PMUXCR_ELBCDIU_DIU) {
@@ -254,10 +329,15 @@ exit:
                 iounmap(lbc_lcs1_ba);
         if (lbc_lcs0_ba)
                 iounmap(lbc_lcs0_ba);
+        if (lbc)
+                iounmap(lbc);
+        if (ecm)
+                iounmap(ecm);
         if (guts)
                 iounmap(guts);
 
-        of_node_put(indirect_node);
+        of_node_put(law_node);
+        of_node_put(lbc_node);
         of_node_put(guts_node);
 }
 
diff --git a/arch/powerpc/platforms/85xx/p3060_qds.c b/arch/powerpc/platforms/85xx/p3060_qds.c
deleted file mode 100644
index 081cf4ac1881..000000000000
--- a/arch/powerpc/platforms/85xx/p3060_qds.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * P3060 QDS Setup
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/phy.h>
-#include <asm/machdep.h>
-#include <asm/udbg.h>
-#include <asm/mpic.h>
-#include <linux/of_platform.h>
-#include <sysdev/fsl_soc.h>
-#include <sysdev/fsl_pci.h>
-#include <asm/ehv_pic.h>
-#include "corenet_ds.h"
-
-/*
- * Called very early, device-tree isn't unflattened
- */
-static int __init p3060_qds_probe(void)
-{
-        unsigned long root = of_get_flat_dt_root();
-#ifdef CONFIG_SMP
-        extern struct smp_ops_t smp_85xx_ops;
-#endif
-
-        if (of_flat_dt_is_compatible(root, "fsl,P3060QDS"))
-                return 1;
-
-        /* Check if we're running under the Freescale hypervisor */
-        if (of_flat_dt_is_compatible(root, "fsl,P3060QDS-hv")) {
-                ppc_md.init_IRQ = ehv_pic_init;
-                ppc_md.get_irq = ehv_pic_get_irq;
-                ppc_md.restart = fsl_hv_restart;
-                ppc_md.power_off = fsl_hv_halt;
-                ppc_md.halt = fsl_hv_halt;
-#ifdef CONFIG_SMP
-                /*
-                 * Disable the timebase sync operations because we can't write
-                 * to the timebase registers under the hypervisor.
-                 */
-                smp_85xx_ops.give_timebase = NULL;
-                smp_85xx_ops.take_timebase = NULL;
-#endif
-                return 1;
-        }
-
-        return 0;
-}
-
-define_machine(p3060_qds) {
-        .name                   = "P3060 QDS",
-        .probe                  = p3060_qds_probe,
-        .setup_arch             = corenet_ds_setup_arch,
-        .init_IRQ               = corenet_ds_pic_init,
-#ifdef CONFIG_PCI
-        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
-#endif
-        .get_irq                = mpic_get_coreint_irq,
-        .restart                = fsl_rstcr_restart,
-        .calibrate_decr         = generic_calibrate_decr,
-        .progress               = udbg_progress,
-        .power_save             = e500_idle,
-};
-
-machine_device_initcall(p3060_qds, corenet_ds_publish_devices);
-
-#ifdef CONFIG_SWIOTLB
-machine_arch_initcall(p3060_qds, swiotlb_setup_bus_notifier);
-#endif
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c
new file mode 100644
index 000000000000..95a2e53af71b
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/qemu_e500.c
@@ -0,0 +1,72 @@
+/*
+ * Paravirt target for a generic QEMU e500 machine
+ *
+ * This is intended to be a flexible device-tree-driven platform, not fixed
+ * to a particular piece of hardware or a particular spec of virtual hardware,
+ * beyond the assumption of an e500-family CPU.  Some things are still hardcoded
+ * here, such as MPIC, but this is a limitation of the current code rather than
+ * an interface contract with QEMU.
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of_fdt.h>
+#include <asm/machdep.h>
+#include <asm/time.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "smp.h"
+#include "mpc85xx.h"
+
+void __init qemu_e500_pic_init(void)
+{
+        struct mpic *mpic;
+
+        mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU,
+                        0, 256, " OpenPIC  ");
+
+        BUG_ON(mpic == NULL);
+        mpic_init(mpic);
+}
+
+static void __init qemu_e500_setup_arch(void)
+{
+        ppc_md.progress("qemu_e500_setup_arch()", 0);
+
+        fsl_pci_init();
+        mpc85xx_smp_init();
+}
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init qemu_e500_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500");
+}
+
+machine_device_initcall(qemu_e500, mpc85xx_common_publish_devices);
+
+define_machine(qemu_e500) {
+        .name                   = "QEMU e500",
+        .probe                  = qemu_e500_probe,
+        .setup_arch             = qemu_e500_setup_arch,
+        .init_IRQ               = qemu_e500_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
deleted file mode 100644
index b1be632ede43..000000000000
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ /dev/null
@@ -1,254 +0,0 @@
-/*
- * Wind River SBC8560 setup and early boot code.
- *
- * Copyright 2007 Wind River Systems Inc.
- *
- * By Paul Gortmaker (see MAINTAINERS for contact information)
- *
- * Based largely on the MPC8560ADS support - Copyright 2005 Freescale Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/of_platform.h>
-
-#include <asm/time.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpic.h>
-#include <mm/mmu_decl.h>
-#include <asm/udbg.h>
-
-#include <sysdev/fsl_soc.h>
-#include <sysdev/fsl_pci.h>
-
-#include "mpc85xx.h"
-
-#ifdef CONFIG_CPM2
-#include <asm/cpm2.h>
-#include <sysdev/cpm2_pic.h>
-#endif
-
-static void __init sbc8560_pic_init(void)
-{
-        struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
-                        0, 256, " OpenPIC  ");
-        BUG_ON(mpic == NULL);
-        mpic_init(mpic);
-
-        mpc85xx_cpm2_pic_init();
-}
-
-/*
- * Setup the architecture
- */
-#ifdef CONFIG_CPM2
-struct cpm_pin {
-        int port, pin, flags;
-};
-
-static const struct cpm_pin sbc8560_pins[] = {
-        /* SCC1 */
-        {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
-        {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-
-        /* SCC2 */
-        {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-
-        /* FCC2 */
-        {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
-        {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
-        {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
-
-        /* FCC3 */
-        {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
-        {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
-};
-
-static void __init init_ioports(void)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) {
-                const struct cpm_pin *pin = &sbc8560_pins[i];
-                cpm2_set_pin(pin->port, pin->pin, pin->flags);
-        }
-
-        cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
-        cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
-        cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
-        cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
-        cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
-        cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
-        cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
-        cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
-}
-#endif
-
-static void __init sbc8560_setup_arch(void)
-{
-#ifdef CONFIG_PCI
-        struct device_node *np;
-#endif
-
-        if (ppc_md.progress)
-                ppc_md.progress("sbc8560_setup_arch()", 0);
-
-#ifdef CONFIG_CPM2
-        cpm2_reset();
-        init_ioports();
-#endif
-
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
-                fsl_add_bridge(np, 1);
-#endif
-}
-
-static void sbc8560_show_cpuinfo(struct seq_file *m)
-{
-        uint pvid, svid, phid1;
-
-        pvid = mfspr(SPRN_PVR);
-        svid = mfspr(SPRN_SVR);
-
-        seq_printf(m, "Vendor\t\t: Wind River\n");
-        seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
-        seq_printf(m, "SVR\t\t: 0x%x\n", svid);
-
-        /* Display cpu Pll setting */
-        phid1 = mfspr(SPRN_HID1);
-        seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
-}
-
-machine_device_initcall(sbc8560, mpc85xx_common_publish_devices);
-
-/*
- * Called very early, device-tree isn't unflattened
- */
-static int __init sbc8560_probe(void)
-{
-        unsigned long root = of_get_flat_dt_root();
-
-        return of_flat_dt_is_compatible(root, "SBC8560");
-}
-
-#ifdef CONFIG_RTC_DRV_M48T59
-static int __init sbc8560_rtc_init(void)
-{
-        struct device_node *np;
-        struct resource res;
-        struct platform_device *rtc_dev;
-
-        np = of_find_compatible_node(NULL, NULL, "m48t59");
-        if (np == NULL) {
-                printk("No RTC in DTB. Has it been eaten by wild dogs?\n");
-                return -ENODEV;
-        }
-
-        of_address_to_resource(np, 0, &res);
-        of_node_put(np);
-
-        printk("Found RTC (m48t59) at i/o 0x%x\n", res.start);
-
-        rtc_dev = platform_device_register_simple("rtc-m48t59", 0, &res, 1);
-
-        if (IS_ERR(rtc_dev)) {
-                printk("Registering sbc8560 RTC device failed\n");
-                return PTR_ERR(rtc_dev);
-        }
-
-        return 0;
-}
-
-arch_initcall(sbc8560_rtc_init);
-
-#endif  /* M48T59 */
-
-static __u8 __iomem *brstcr;
-
-static int __init sbc8560_bdrstcr_init(void)
-{
-        struct device_node *np;
-        struct resource res;
-
-        np = of_find_compatible_node(NULL, NULL, "wrs,sbc8560-brstcr");
-        if (np == NULL) {
-                printk(KERN_WARNING "sbc8560: No board specific RSTCR in DTB.\n");
-                return -ENODEV;
-        }
-
-        of_address_to_resource(np, 0, &res);
-
-        printk(KERN_INFO "sbc8560: Found BRSTCR at %pR\n", &res);
-
-        brstcr = ioremap(res.start, resource_size(&res));
-        if(!brstcr)
-                printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n");
-
-        of_node_put(np);
-
-        return 0;
-}
-
-arch_initcall(sbc8560_bdrstcr_init);
-
-void sbc8560_rstcr_restart(char * cmd)
-{
-        local_irq_disable();
-        if(brstcr)
-                clrbits8(brstcr, 0x80);
-
-        while(1);
-}
-
-define_machine(sbc8560) {
-        .name                   = "SBC8560",
-        .probe                  = sbc8560_probe,
-        .setup_arch             = sbc8560_setup_arch,
-        .init_IRQ               = sbc8560_pic_init,
-        .show_cpuinfo           = sbc8560_show_cpuinfo,
-        .get_irq                = mpic_get_irq,
-        .restart                = sbc8560_rstcr_restart,
-        .calibrate_decr         = generic_calibrate_decr,
-        .progress               = udbg_progress,
-};
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 61c9550819a2..30fd01de6bed 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -159,6 +159,10 @@ config PPC_E500MC
         bool "e500mc Support"
         select PPC_FPU
         depends on E500
+        help
+          This must be enabled for running on e500mc (and derivatives
+          such as e5500/e6500), and must be disabled for running on
+          e500v1 or e500v2.
 
 config PPC_FPU
         bool