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authorLinus Torvalds <torvalds@g5.osdl.org>2006-06-29 14:32:34 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-29 14:32:34 -0400
commit3aa590c6b7c89d844f81c2e96f295cf2c6967773 (patch)
tree6f18b295b1ff4cd7fd1880db6f56721599d64439 /arch/powerpc/platforms
parent4d3ce21fa9d2eaeda113aa2f9c2da80d972bef64 (diff)
parent339d76c54336443f5050b00172beb675f35e3be0 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (43 commits) [POWERPC] Use little-endian bit from firmware ibm,pa-features property [POWERPC] Make sure smp_processor_id works very early in boot [POWERPC] U4 DART improvements [POWERPC] todc: add support for Time-Of-Day-Clock [POWERPC] Make lparcfg.c work when both iseries and pseries are selected [POWERPC] Fix idr locking in init_new_context [POWERPC] mpc7448hpc2 (taiga) board config file [POWERPC] Add tsi108 pci and platform device data register function [POWERPC] Add general support for mpc7448hpc2 (Taiga) platform [POWERPC] Correct the MAX_CONTEXT definition powerpc: minor cleanups for mpc86xx [POWERPC] Make sure we select CONFIG_NEW_LEDS if ADB_PMU_LED is set [POWERPC] Simplify the code defining the 64-bit CPU features [POWERPC] powerpc: kconfig warning fix [POWERPC] Consolidate some of kernel/misc*.S [POWERPC] Remove unused function call_with_mmu_off [POWERPC] update asm-powerpc/time.h [POWERPC] Clean up it_lp_queue.h [POWERPC] Skip the "copy down" of the kernel if it is already at zero. [POWERPC] Add the use of the firmware soft-reset-nmi to kdump. ...
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig6
-rw-r--r--arch/powerpc/platforms/86xx/Makefile3
-rw-r--r--arch/powerpc/platforms/86xx/mpc8641_hpcn.h1
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx.h8
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c129
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_smp.c10
-rw-r--r--arch/powerpc/platforms/86xx/pci.c137
-rw-r--r--arch/powerpc/platforms/Makefile1
-rw-r--r--arch/powerpc/platforms/cell/Kconfig2
-rw-r--r--arch/powerpc/platforms/cell/setup.c16
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c8
-rw-r--r--arch/powerpc/platforms/cell/spufs/file.c10
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c6
-rw-r--r--arch/powerpc/platforms/embedded6xx/Kconfig15
-rw-r--r--arch/powerpc/platforms/embedded6xx/Makefile4
-rw-r--r--arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c335
-rw-r--r--arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h26
-rw-r--r--arch/powerpc/platforms/iseries/dt.c2
-rw-r--r--arch/powerpc/platforms/iseries/htab.c4
-rw-r--r--arch/powerpc/platforms/iseries/lpevents.c55
-rw-r--r--arch/powerpc/platforms/iseries/proc.c1
-rw-r--r--arch/powerpc/platforms/iseries/setup.c19
-rw-r--r--arch/powerpc/platforms/maple/setup.c7
-rw-r--r--arch/powerpc/platforms/powermac/setup.c9
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c33
-rw-r--r--arch/powerpc/platforms/pseries/lpar.c4
-rw-r--r--arch/powerpc/platforms/pseries/setup.c10
27 files changed, 620 insertions, 241 deletions
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 3a87863d2876..d1ecc0f9ab58 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -7,6 +7,7 @@ choice
7 7
8config MPC8641_HPCN 8config MPC8641_HPCN
9 bool "Freescale MPC8641 HPCN" 9 bool "Freescale MPC8641 HPCN"
10 select PPC_I8259
10 help 11 help
11 This option enables support for the MPC8641 HPCN board. 12 This option enables support for the MPC8641 HPCN board.
12 13
@@ -28,9 +29,4 @@ config PPC_INDIRECT_PCI_BE
28 depends on PPC_86xx 29 depends on PPC_86xx
29 default y 30 default y
30 31
31config PPC_STD_MMU
32 bool
33 depends on PPC_86xx
34 default y
35
36endmenu 32endmenu
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 7be796c5d5c9..476a6eeee710 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -2,9 +2,6 @@
2# Makefile for the PowerPC 86xx linux kernel. 2# Makefile for the PowerPC 86xx linux kernel.
3# 3#
4 4
5
6ifeq ($(CONFIG_PPC_86xx),y)
7obj-$(CONFIG_SMP) += mpc86xx_smp.o 5obj-$(CONFIG_SMP) += mpc86xx_smp.o
8endif
9obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o 6obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
10obj-$(CONFIG_PCI) += pci.o mpc86xx_pcie.o 7obj-$(CONFIG_PCI) += pci.o mpc86xx_pcie.o
diff --git a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
index 5042253758b7..5d2bcf78cef7 100644
--- a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
+++ b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
@@ -14,7 +14,6 @@
14#ifndef __MPC8641_HPCN_H__ 14#ifndef __MPC8641_HPCN_H__
15#define __MPC8641_HPCN_H__ 15#define __MPC8641_HPCN_H__
16 16
17#include <linux/config.h>
18#include <linux/init.h> 17#include <linux/init.h>
19 18
20/* PCI interrupt controller */ 19/* PCI interrupt controller */
diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h b/arch/powerpc/platforms/86xx/mpc86xx.h
index e3c9e4f417d3..2834462590b8 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx.h
+++ b/arch/powerpc/platforms/86xx/mpc86xx.h
@@ -15,11 +15,13 @@
15 * mpc86xx_* files. Mostly for use by mpc86xx_setup(). 15 * mpc86xx_* files. Mostly for use by mpc86xx_setup().
16 */ 16 */
17 17
18extern int __init add_bridge(struct device_node *dev); 18extern int add_bridge(struct device_node *dev);
19 19
20extern void __init setup_indirect_pcie(struct pci_controller *hose, 20extern int mpc86xx_exclude_device(u_char bus, u_char devfn);
21
22extern void setup_indirect_pcie(struct pci_controller *hose,
21 u32 cfg_addr, u32 cfg_data); 23 u32 cfg_addr, u32 cfg_data);
22extern void __init setup_indirect_pcie_nomap(struct pci_controller *hose, 24extern void setup_indirect_pcie_nomap(struct pci_controller *hose,
23 void __iomem *cfg_addr, 25 void __iomem *cfg_addr,
24 void __iomem *cfg_data); 26 void __iomem *cfg_data);
25 27
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 483c21df181e..ebae73eb0063 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -12,7 +12,6 @@
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14 14
15#include <linux/config.h>
16#include <linux/stddef.h> 15#include <linux/stddef.h>
17#include <linux/kernel.h> 16#include <linux/kernel.h>
18#include <linux/pci.h> 17#include <linux/pci.h>
@@ -36,6 +35,7 @@
36#include <sysdev/fsl_soc.h> 35#include <sysdev/fsl_soc.h>
37 36
38#include "mpc86xx.h" 37#include "mpc86xx.h"
38#include "mpc8641_hpcn.h"
39 39
40#ifndef CONFIG_PCI 40#ifndef CONFIG_PCI
41unsigned long isa_io_base = 0; 41unsigned long isa_io_base = 0;
@@ -186,17 +186,130 @@ mpc86xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
186 return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; 186 return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET;
187} 187}
188 188
189static void __devinit quirk_ali1575(struct pci_dev *dev)
190{
191 unsigned short temp;
192
193 /*
194 * ALI1575 interrupts route table setup:
195 *
196 * IRQ pin IRQ#
197 * PIRQA ---- 3
198 * PIRQB ---- 4
199 * PIRQC ---- 5
200 * PIRQD ---- 6
201 * PIRQE ---- 9
202 * PIRQF ---- 10
203 * PIRQG ---- 11
204 * PIRQH ---- 12
205 *
206 * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
207 * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
208 */
209 pci_write_config_dword(dev, 0x48, 0xb9317542);
210
211 /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
212 pci_write_config_byte(dev, 0x86, 0x0c);
213
214 /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
215 pci_write_config_byte(dev, 0x87, 0x0d);
216
217 /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
218 pci_write_config_byte(dev, 0x88, 0x0f);
219
220 /* USB 2.0 controller, interrupt: PIRQ7 */
221 pci_write_config_byte(dev, 0x74, 0x06);
222
223 /* Audio controller, interrupt: PIRQE */
224 pci_write_config_byte(dev, 0x8a, 0x0c);
225
226 /* Modem controller, interrupt: PIRQF */
227 pci_write_config_byte(dev, 0x8b, 0x0d);
228
229 /* HD audio controller, interrupt: PIRQG */
230 pci_write_config_byte(dev, 0x8c, 0x0e);
231
232 /* Serial ATA interrupt: PIRQD */
233 pci_write_config_byte(dev, 0x8d, 0x0b);
234
235 /* SMB interrupt: PIRQH */
236 pci_write_config_byte(dev, 0x8e, 0x0f);
237
238 /* PMU ACPI SCI interrupt: PIRQH */
239 pci_write_config_byte(dev, 0x8f, 0x0f);
240
241 /* Primary PATA IDE IRQ: 14
242 * Secondary PATA IDE IRQ: 15
243 */
244 pci_write_config_byte(dev, 0x44, 0x3d);
245 pci_write_config_byte(dev, 0x75, 0x0f);
246
247 /* Set IRQ14 and IRQ15 to legacy IRQs */
248 pci_read_config_word(dev, 0x46, &temp);
249 temp |= 0xc000;
250 pci_write_config_word(dev, 0x46, temp);
251
252 /* Set i8259 interrupt trigger
253 * IRQ 3: Level
254 * IRQ 4: Level
255 * IRQ 5: Level
256 * IRQ 6: Level
257 * IRQ 7: Level
258 * IRQ 9: Level
259 * IRQ 10: Level
260 * IRQ 11: Level
261 * IRQ 12: Level
262 * IRQ 14: Edge
263 * IRQ 15: Edge
264 */
265 outb(0xfa, 0x4d0);
266 outb(0x1e, 0x4d1);
267}
189 268
190int 269static void __devinit quirk_uli5288(struct pci_dev *dev)
191mpc86xx_exclude_device(u_char bus, u_char devfn)
192{ 270{
193#if !defined(CONFIG_PCI) 271 unsigned char c;
194 if (bus == 0 && PCI_SLOT(devfn) == 0) 272
195 return PCIBIOS_DEVICE_NOT_FOUND; 273 pci_read_config_byte(dev,0x83,&c);
196#endif 274 c |= 0x80;
275 pci_write_config_byte(dev, 0x83, c);
276
277 pci_write_config_byte(dev, 0x09, 0x01);
278 pci_write_config_byte(dev, 0x0a, 0x06);
279
280 pci_read_config_byte(dev,0x83,&c);
281 c &= 0x7f;
282 pci_write_config_byte(dev, 0x83, c);
197 283
198 return PCIBIOS_SUCCESSFUL; 284 pci_read_config_byte(dev,0x84,&c);
285 c |= 0x01;
286 pci_write_config_byte(dev, 0x84, c);
199} 287}
288
289static void __devinit quirk_uli5229(struct pci_dev *dev)
290{
291 unsigned short temp;
292 pci_write_config_word(dev, 0x04, 0x0405);
293 pci_read_config_word(dev, 0x4a, &temp);
294 temp |= 0x1000;
295 pci_write_config_word(dev, 0x4a, temp);
296}
297
298static void __devinit early_uli5249(struct pci_dev *dev)
299{
300 unsigned char temp;
301 pci_write_config_word(dev, 0x04, 0x0007);
302 pci_read_config_byte(dev, 0x7c, &temp);
303 pci_write_config_byte(dev, 0x7c, 0x80);
304 pci_write_config_byte(dev, 0x09, 0x01);
305 pci_write_config_byte(dev, 0x7c, temp);
306 dev->class |= 0x1;
307}
308
309DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575);
310DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
311DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
312DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
200#endif /* CONFIG_PCI */ 313#endif /* CONFIG_PCI */
201 314
202 315
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
index 944ec4b71416..bb7fb41933ad 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
@@ -10,7 +10,6 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13#include <linux/config.h>
14#include <linux/stddef.h> 13#include <linux/stddef.h>
15#include <linux/kernel.h> 14#include <linux/kernel.h>
16#include <linux/init.h> 15#include <linux/init.h>
@@ -34,8 +33,8 @@ extern unsigned long __secondary_hold_acknowledge;
34static void __init 33static void __init
35smp_86xx_release_core(int nr) 34smp_86xx_release_core(int nr)
36{ 35{
37 void *mcm_vaddr; 36 __be32 __iomem *mcm_vaddr;
38 unsigned long vaddr, pcr; 37 unsigned long pcr;
39 38
40 if (nr < 0 || nr >= NR_CPUS) 39 if (nr < 0 || nr >= NR_CPUS)
41 return; 40 return;
@@ -45,10 +44,9 @@ smp_86xx_release_core(int nr)
45 */ 44 */
46 mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET, 45 mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
47 MPC86xx_MCM_SIZE); 46 MPC86xx_MCM_SIZE);
48 vaddr = (unsigned long)mcm_vaddr + MCM_PORT_CONFIG_OFFSET; 47 pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
49 pcr = in_be32((volatile unsigned *)vaddr);
50 pcr |= 1 << (nr + 24); 48 pcr |= 1 << (nr + 24);
51 out_be32((volatile unsigned *)vaddr, pcr); 49 out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
52} 50}
53 51
54 52
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c
index 5180df7c75bc..bc5139043112 100644
--- a/arch/powerpc/platforms/86xx/pci.c
+++ b/arch/powerpc/platforms/86xx/pci.c
@@ -12,7 +12,6 @@
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14 14
15#include <linux/config.h>
16#include <linux/types.h> 15#include <linux/types.h>
17#include <linux/module.h> 16#include <linux/module.h>
18#include <linux/init.h> 17#include <linux/init.h>
@@ -122,15 +121,12 @@ static void __init setup_pcie_atmu(struct pci_controller *hose, struct resource
122static void __init 121static void __init
123mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) 122mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size)
124{ 123{
125 volatile struct ccsr_pex *pcie;
126 u16 cmd; 124 u16 cmd;
127 unsigned int temps; 125 unsigned int temps;
128 126
129 DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n", 127 DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n",
130 pcie_offset, pcie_size); 128 pcie_offset, pcie_size);
131 129
132 pcie = ioremap(pcie_offset, pcie_size);
133
134 early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); 130 early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd);
135 cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY 131 cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
136 | PCI_COMMAND_IO; 132 | PCI_COMMAND_IO;
@@ -144,6 +140,14 @@ mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size)
144 early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); 140 early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps);
145} 141}
146 142
143int mpc86xx_exclude_device(u_char bus, u_char devfn)
144{
145 if (bus == 0 && PCI_SLOT(devfn) == 0)
146 return PCIBIOS_DEVICE_NOT_FOUND;
147
148 return PCIBIOS_SUCCESSFUL;
149}
150
147int __init add_bridge(struct device_node *dev) 151int __init add_bridge(struct device_node *dev)
148{ 152{
149 int len; 153 int len;
@@ -198,128 +202,3 @@ int __init add_bridge(struct device_node *dev)
198 202
199 return 0; 203 return 0;
200} 204}
201
202static void __devinit quirk_ali1575(struct pci_dev *dev)
203{
204 unsigned short temp;
205
206 /*
207 * ALI1575 interrupts route table setup:
208 *
209 * IRQ pin IRQ#
210 * PIRQA ---- 3
211 * PIRQB ---- 4
212 * PIRQC ---- 5
213 * PIRQD ---- 6
214 * PIRQE ---- 9
215 * PIRQF ---- 10
216 * PIRQG ---- 11
217 * PIRQH ---- 12
218 *
219 * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
220 * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
221 */
222 pci_write_config_dword(dev, 0x48, 0xb9317542);
223
224 /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
225 pci_write_config_byte(dev, 0x86, 0x0c);
226
227 /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
228 pci_write_config_byte(dev, 0x87, 0x0d);
229
230 /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
231 pci_write_config_byte(dev, 0x88, 0x0f);
232
233 /* USB 2.0 controller, interrupt: PIRQ7 */
234 pci_write_config_byte(dev, 0x74, 0x06);
235
236 /* Audio controller, interrupt: PIRQE */
237 pci_write_config_byte(dev, 0x8a, 0x0c);
238
239 /* Modem controller, interrupt: PIRQF */
240 pci_write_config_byte(dev, 0x8b, 0x0d);
241
242 /* HD audio controller, interrupt: PIRQG */
243 pci_write_config_byte(dev, 0x8c, 0x0e);
244
245 /* Serial ATA interrupt: PIRQD */
246 pci_write_config_byte(dev, 0x8d, 0x0b);
247
248 /* SMB interrupt: PIRQH */
249 pci_write_config_byte(dev, 0x8e, 0x0f);
250
251 /* PMU ACPI SCI interrupt: PIRQH */
252 pci_write_config_byte(dev, 0x8f, 0x0f);
253
254 /* Primary PATA IDE IRQ: 14
255 * Secondary PATA IDE IRQ: 15
256 */
257 pci_write_config_byte(dev, 0x44, 0x3d);
258 pci_write_config_byte(dev, 0x75, 0x0f);
259
260 /* Set IRQ14 and IRQ15 to legacy IRQs */
261 pci_read_config_word(dev, 0x46, &temp);
262 temp |= 0xc000;
263 pci_write_config_word(dev, 0x46, temp);
264
265 /* Set i8259 interrupt trigger
266 * IRQ 3: Level
267 * IRQ 4: Level
268 * IRQ 5: Level
269 * IRQ 6: Level
270 * IRQ 7: Level
271 * IRQ 9: Level
272 * IRQ 10: Level
273 * IRQ 11: Level
274 * IRQ 12: Level
275 * IRQ 14: Edge
276 * IRQ 15: Edge
277 */
278 outb(0xfa, 0x4d0);
279 outb(0x1e, 0x4d1);
280}
281
282static void __devinit quirk_uli5288(struct pci_dev *dev)
283{
284 unsigned char c;
285
286 pci_read_config_byte(dev,0x83,&c);
287 c |= 0x80;
288 pci_write_config_byte(dev, 0x83, c);
289
290 pci_write_config_byte(dev, 0x09, 0x01);
291 pci_write_config_byte(dev, 0x0a, 0x06);
292
293 pci_read_config_byte(dev,0x83,&c);
294 c &= 0x7f;
295 pci_write_config_byte(dev, 0x83, c);
296
297 pci_read_config_byte(dev,0x84,&c);
298 c |= 0x01;
299 pci_write_config_byte(dev, 0x84, c);
300}
301
302static void __devinit quirk_uli5229(struct pci_dev *dev)
303{
304 unsigned short temp;
305 pci_write_config_word(dev, 0x04, 0x0405);
306 pci_read_config_word(dev, 0x4a, &temp);
307 temp |= 0x1000;
308 pci_write_config_word(dev, 0x4a, temp);
309}
310
311static void __devinit early_uli5249(struct pci_dev *dev)
312{
313 unsigned char temp;
314 pci_write_config_word(dev, 0x04, 0x0007);
315 pci_read_config_byte(dev, 0x7c, &temp);
316 pci_write_config_byte(dev, 0x7c, 0x80);
317 pci_write_config_byte(dev, 0x09, 0x01);
318 pci_write_config_byte(dev, 0x7c, temp);
319 dev->class |= 0x1;
320}
321
322DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575);
323DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
324DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
325DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 292863694562..5cf46dc57895 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_PPC_PSERIES) += pseries/
14obj-$(CONFIG_PPC_ISERIES) += iseries/ 14obj-$(CONFIG_PPC_ISERIES) += iseries/
15obj-$(CONFIG_PPC_MAPLE) += maple/ 15obj-$(CONFIG_PPC_MAPLE) += maple/
16obj-$(CONFIG_PPC_CELL) += cell/ 16obj-$(CONFIG_PPC_CELL) += cell/
17obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index 352bbbacde9a..0c8c7b6ab897 100644
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -6,6 +6,7 @@ config SPU_FS
6 default m 6 default m
7 depends on PPC_CELL 7 depends on PPC_CELL
8 select SPU_BASE 8 select SPU_BASE
9 select MEMORY_HOTPLUG
9 help 10 help
10 The SPU file system is used to access Synergistic Processing 11 The SPU file system is used to access Synergistic Processing
11 Units on machines implementing the Broadband Processor 12 Units on machines implementing the Broadband Processor
@@ -18,7 +19,6 @@ config SPU_BASE
18config SPUFS_MMAP 19config SPUFS_MMAP
19 bool 20 bool
20 depends on SPU_FS && SPARSEMEM 21 depends on SPU_FS && SPARSEMEM
21 select MEMORY_HOTPLUG
22 default y 22 default y
23 23
24config CBE_RAS 24config CBE_RAS
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 3d1831d331e5..00d112f92272 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -125,8 +125,6 @@ static void __init cell_init_early(void)
125{ 125{
126 DBG(" -> cell_init_early()\n"); 126 DBG(" -> cell_init_early()\n");
127 127
128 hpte_init_native();
129
130 cell_init_iommu(); 128 cell_init_iommu();
131 129
132 ppc64_interrupt_controller = IC_CELL_PIC; 130 ppc64_interrupt_controller = IC_CELL_PIC;
@@ -139,11 +137,17 @@ static int __init cell_probe(void)
139{ 137{
140 unsigned long root = of_get_flat_dt_root(); 138 unsigned long root = of_get_flat_dt_root();
141 139
142 if (of_flat_dt_is_compatible(root, "IBM,CBEA") || 140 if (!of_flat_dt_is_compatible(root, "IBM,CBEA") &&
143 of_flat_dt_is_compatible(root, "IBM,CPBW-1.0")) 141 !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
144 return 1; 142 return 0;
143
144#ifdef CONFIG_UDBG_RTAS_CONSOLE
145 udbg_init_rtas_console();
146#endif
147
148 hpte_init_native();
145 149
146 return 0; 150 return 1;
147} 151}
148 152
149/* 153/*
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index db82f503ba2c..b306723abb87 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -168,12 +168,12 @@ spu_irq_class_0_bottom(struct spu *spu)
168 168
169 stat &= mask; 169 stat &= mask;
170 170
171 if (stat & 1) /* invalid MFC DMA */ 171 if (stat & 1) /* invalid DMA alignment */
172 __spu_trap_invalid_dma(spu);
173
174 if (stat & 2) /* invalid DMA alignment */
175 __spu_trap_dma_align(spu); 172 __spu_trap_dma_align(spu);
176 173
174 if (stat & 2) /* invalid MFC DMA */
175 __spu_trap_invalid_dma(spu);
176
177 if (stat & 4) /* error on SPU */ 177 if (stat & 4) /* error on SPU */
178 __spu_trap_error(spu); 178 __spu_trap_error(spu);
179 179
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 7854a380dce2..58e794f9da1b 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -204,7 +204,7 @@ static int spufs_cntl_mmap(struct file *file, struct vm_area_struct *vma)
204 204
205 vma->vm_flags |= VM_RESERVED; 205 vma->vm_flags |= VM_RESERVED;
206 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 206 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
207 | _PAGE_NO_CACHE); 207 | _PAGE_NO_CACHE | _PAGE_GUARDED);
208 208
209 vma->vm_ops = &spufs_cntl_mmap_vmops; 209 vma->vm_ops = &spufs_cntl_mmap_vmops;
210 return 0; 210 return 0;
@@ -675,7 +675,7 @@ static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma)
675 675
676 vma->vm_flags |= VM_RESERVED; 676 vma->vm_flags |= VM_RESERVED;
677 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 677 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
678 | _PAGE_NO_CACHE); 678 | _PAGE_NO_CACHE | _PAGE_GUARDED);
679 679
680 vma->vm_ops = &spufs_signal1_mmap_vmops; 680 vma->vm_ops = &spufs_signal1_mmap_vmops;
681 return 0; 681 return 0;
@@ -762,7 +762,7 @@ static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma)
762 /* FIXME: */ 762 /* FIXME: */
763 vma->vm_flags |= VM_RESERVED; 763 vma->vm_flags |= VM_RESERVED;
764 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 764 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
765 | _PAGE_NO_CACHE); 765 | _PAGE_NO_CACHE | _PAGE_GUARDED);
766 766
767 vma->vm_ops = &spufs_signal2_mmap_vmops; 767 vma->vm_ops = &spufs_signal2_mmap_vmops;
768 return 0; 768 return 0;
@@ -850,7 +850,7 @@ static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
850 850
851 vma->vm_flags |= VM_RESERVED; 851 vma->vm_flags |= VM_RESERVED;
852 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 852 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
853 | _PAGE_NO_CACHE); 853 | _PAGE_NO_CACHE | _PAGE_GUARDED);
854 854
855 vma->vm_ops = &spufs_mss_mmap_vmops; 855 vma->vm_ops = &spufs_mss_mmap_vmops;
856 return 0; 856 return 0;
@@ -899,7 +899,7 @@ static int spufs_mfc_mmap(struct file *file, struct vm_area_struct *vma)
899 899
900 vma->vm_flags |= VM_RESERVED; 900 vma->vm_flags |= VM_RESERVED;
901 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 901 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
902 | _PAGE_NO_CACHE); 902 | _PAGE_NO_CACHE | _PAGE_GUARDED);
903 903
904 vma->vm_ops = &spufs_mfc_mmap_vmops; 904 vma->vm_ops = &spufs_mfc_mmap_vmops;
905 return 0; 905 return 0;
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index a656d810a44a..c7fea2cca534 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -464,7 +464,8 @@ static inline void wait_purge_complete(struct spu_state *csa, struct spu *spu)
464 * Poll MFC_CNTL[Ps] until value '11' is read 464 * Poll MFC_CNTL[Ps] until value '11' is read
465 * (purge complete). 465 * (purge complete).
466 */ 466 */
467 POLL_WHILE_FALSE(in_be64(&priv2->mfc_control_RW) & 467 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
468 MFC_CNTL_PURGE_DMA_STATUS_MASK) ==
468 MFC_CNTL_PURGE_DMA_COMPLETE); 469 MFC_CNTL_PURGE_DMA_COMPLETE);
469} 470}
470 471
@@ -1028,7 +1029,8 @@ static inline void wait_suspend_mfc_complete(struct spu_state *csa,
1028 * Restore, Step 47. 1029 * Restore, Step 47.
1029 * Poll MFC_CNTL[Ss] until 11 is returned. 1030 * Poll MFC_CNTL[Ss] until 11 is returned.
1030 */ 1031 */
1031 POLL_WHILE_FALSE(in_be64(&priv2->mfc_control_RW) & 1032 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
1033 MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==
1032 MFC_CNTL_SUSPEND_COMPLETE); 1034 MFC_CNTL_SUSPEND_COMPLETE);
1033} 1035}
1034 1036
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 4fdbc9ae876b..ba07a9a7c039 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -74,6 +74,16 @@ config SANDPOINT
74 Select SANDPOINT if configuring for a Motorola Sandpoint X3 74 Select SANDPOINT if configuring for a Motorola Sandpoint X3
75 (any flavor). 75 (any flavor).
76 76
77config MPC7448HPC2
78 bool "Freescale MPC7448HPC2(Taiga)"
79 select TSI108_BRIDGE
80 select DEFAULT_UIMAGE
81 select PPC_UDBG_16550
82 select MPIC
83 help
84 Select MPC7448HPC2 if configuring for Freescale MPC7448HPC2 (Taiga)
85 platform
86
77config RADSTONE_PPC7D 87config RADSTONE_PPC7D
78 bool "Radstone Technology PPC7D board" 88 bool "Radstone Technology PPC7D board"
79 select PPC_I8259 89 select PPC_I8259
@@ -221,6 +231,11 @@ config MV64X60
221 select PPC_INDIRECT_PCI 231 select PPC_INDIRECT_PCI
222 default y 232 default y
223 233
234config TSI108_BRIDGE
235 bool
236 depends on MPC7448HPC2
237 default y
238
224menu "Set bridge options" 239menu "Set bridge options"
225 depends on MV64X60 240 depends on MV64X60
226 241
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile
new file mode 100644
index 000000000000..fa499fe59291
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/Makefile
@@ -0,0 +1,4 @@
1#
2# Makefile for the 6xx/7xx/7xxxx linux kernel.
3#
4obj-$(CONFIG_MPC7448HPC2) += mpc7448_hpc2.o
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
new file mode 100644
index 000000000000..d7a4fc7ca238
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -0,0 +1,335 @@
1/*
2 * mpc7448_hpc2.c
3 *
4 * Board setup routines for the Freescale Taiga platform
5 *
6 * Author: Jacob Pan
7 * jacob.pan@freescale.com
8 * Author: Xianghua Xiao
9 * x.xiao@freescale.com
10 * Maintainer: Roy Zang <tie-fei.zang@freescale.com>
11 * Add Flat Device Tree support fot mpc7448hpc2 board
12 *
13 * Copyright 2004-2006 Freescale Semiconductor, Inc.
14 *
15 * This file is licensed under
16 * the terms of the GNU General Public License version 2. This program
17 * is licensed "as is" without any warranty of any kind, whether express
18 * or implied.
19 */
20
21#include <linux/config.h>
22#include <linux/stddef.h>
23#include <linux/kernel.h>
24#include <linux/pci.h>
25#include <linux/kdev_t.h>
26#include <linux/console.h>
27#include <linux/delay.h>
28#include <linux/irq.h>
29#include <linux/ide.h>
30#include <linux/seq_file.h>
31#include <linux/root_dev.h>
32#include <linux/serial.h>
33#include <linux/tty.h>
34#include <linux/serial_core.h>
35
36#include <asm/system.h>
37#include <asm/time.h>
38#include <asm/machdep.h>
39#include <asm/prom.h>
40#include <asm/udbg.h>
41#include <asm/tsi108.h>
42#include <asm/pci-bridge.h>
43#include <asm/reg.h>
44#include <mm/mmu_decl.h>
45#include "mpc7448_hpc2.h"
46#include <asm/tsi108_irq.h>
47#include <asm/mpic.h>
48
49#undef DEBUG
50#ifdef DEBUG
51#define DBG(fmt...) do { printk(fmt); } while(0)
52#else
53#define DBG(fmt...) do { } while(0)
54#endif
55
56#ifndef CONFIG_PCI
57isa_io_base = MPC7448_HPC2_ISA_IO_BASE;
58isa_mem_base = MPC7448_HPC2_ISA_MEM_BASE;
59pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET;
60#endif
61
62extern int tsi108_setup_pci(struct device_node *dev);
63extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
64extern void tsi108_pci_int_init(void);
65extern int tsi108_irq_cascade(struct pt_regs *regs, void *unused);
66
67/*
68 * Define all of the IRQ senses and polarities. Taken from the
69 * mpc7448hpc manual.
70 * Note: Likely, this table and the following function should be
71 * obtained and derived from the OF Device Tree.
72 */
73
74static u_char mpc7448_hpc2_pic_initsenses[] __initdata = {
75 /* External on-board sources */
76 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[0] XINT0 from FPGA */
77 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[1] XINT1 from FPGA */
78 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[2] PHY_INT from both GIGE */
79 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[3] RESERVED */
80 /* Internal Tsi108/109 interrupt sources */
81 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
82 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
83 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
84 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
85 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA0 */
86 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA1 */
87 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA2 */
88 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA3 */
89 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART0 */
90 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART1 */
91 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* I2C */
92 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* GPIO */
93 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE0 */
94 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE1 */
95 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
96 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* HLP */
97 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* SDC */
98 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Processor IF */
99 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
100 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* PCI/X block */
101};
102
103int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn)
104{
105 if (bus == 0 && PCI_SLOT(devfn) == 0)
106 return PCIBIOS_DEVICE_NOT_FOUND;
107 else
108 return PCIBIOS_SUCCESSFUL;
109}
110
111/*
112 * find pci slot by devfn in interrupt map of OF tree
113 */
114u8 find_slot_by_devfn(unsigned int *interrupt_map, unsigned int devfn)
115{
116 int i;
117 unsigned int tmp;
118 for (i = 0; i < 4; i++){
119 tmp = interrupt_map[i*4*7];
120 if ((tmp >> 11) == (devfn >> 3))
121 return i;
122 }
123 return i;
124}
125
126/*
127 * Scans the interrupt map for pci device
128 */
129void mpc7448_hpc2_fixup_irq(struct pci_dev *dev)
130{
131 struct pci_controller *hose;
132 struct device_node *node;
133 unsigned int *interrupt;
134 int busnr;
135 int len;
136 u8 slot;
137 u8 pin;
138
139 /* Lookup the hose */
140 busnr = dev->bus->number;
141 hose = pci_bus_to_hose(busnr);
142 if (!hose)
143 printk(KERN_ERR "No pci hose found\n");
144
145 /* Check it has an OF node associated */
146 node = (struct device_node *) hose->arch_data;
147 if (!node)
148 printk(KERN_ERR "No pci node found\n");
149
150 interrupt = (unsigned int *) get_property(node, "interrupt-map", &len);
151 slot = find_slot_by_devfn(interrupt, dev->devfn);
152 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
153 if (pin == 0 || pin > 4)
154 pin = 1;
155 pin--;
156 dev->irq = interrupt[slot*4*7 + pin*7 + 5];
157 DBG("TSI_PCI: dev->irq = 0x%x\n", dev->irq);
158}
159/* temporary pci irq map fixup*/
160
161void __init mpc7448_hpc2_pcibios_fixup(void)
162{
163 struct pci_dev *dev = NULL;
164 for_each_pci_dev(dev) {
165 mpc7448_hpc2_fixup_irq(dev);
166 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
167 }
168}
169
170static void __init mpc7448_hpc2_setup_arch(void)
171{
172 struct device_node *cpu;
173 struct device_node *np;
174 if (ppc_md.progress)
175 ppc_md.progress("mpc7448_hpc2_setup_arch():set_bridge", 0);
176
177 cpu = of_find_node_by_type(NULL, "cpu");
178 if (cpu != 0) {
179 unsigned int *fp;
180
181 fp = (int *)get_property(cpu, "clock-frequency", NULL);
182 if (fp != 0)
183 loops_per_jiffy = *fp / HZ;
184 else
185 loops_per_jiffy = 50000000 / HZ;
186 of_node_put(cpu);
187 }
188 tsi108_csr_vir_base = get_vir_csrbase();
189
190#ifdef CONFIG_ROOT_NFS
191 ROOT_DEV = Root_NFS;
192#else
193 ROOT_DEV = Root_HDA1;
194#endif
195
196#ifdef CONFIG_BLK_DEV_INITRD
197 ROOT_DEV = Root_RAM0;
198#endif
199
200 /* setup PCI host bridge */
201#ifdef CONFIG_PCI
202 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
203 tsi108_setup_pci(np);
204
205 ppc_md.pci_exclude_device = mpc7448_hpc2_exclude_device;
206 if (ppc_md.progress)
207 ppc_md.progress("tsi108: resources set", 0x100);
208#endif
209
210 printk(KERN_INFO "MPC7448HPC2 (TAIGA) Platform\n");
211 printk(KERN_INFO
212 "Jointly ported by Freescale and Tundra Semiconductor\n");
213 printk(KERN_INFO
214 "Enabling L2 cache then enabling the HID0 prefetch engine.\n");
215}
216
217/*
218 * Interrupt setup and service. Interrrupts on the mpc7448_hpc2 come
219 * from the four external INT pins, PCI interrupts are routed via
220 * PCI interrupt control registers, it generates internal IRQ23
221 *
222 * Interrupt routing on the Taiga Board:
223 * TSI108:PB_INT[0] -> CPU0:INT#
224 * TSI108:PB_INT[1] -> CPU0:MCP#
225 * TSI108:PB_INT[2] -> N/C
226 * TSI108:PB_INT[3] -> N/C
227 */
228static void __init mpc7448_hpc2_init_IRQ(void)
229{
230 struct mpic *mpic;
231 phys_addr_t mpic_paddr = 0;
232 struct device_node *tsi_pic;
233
234 tsi_pic = of_find_node_by_type(NULL, "open-pic");
235 if (tsi_pic) {
236 unsigned int size;
237 void *prop = get_property(tsi_pic, "reg", &size);
238 mpic_paddr = of_translate_address(tsi_pic, prop);
239 }
240
241 if (mpic_paddr == 0) {
242 printk("%s: No tsi108 PIC found !\n", __FUNCTION__);
243 return;
244 }
245
246 DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__,
247 (u32) mpic_paddr);
248
249 mpic = mpic_alloc(mpic_paddr,
250 MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
251 MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108),
252 0, /* num_sources used */
253 TSI108_IRQ_BASE,
254 0, /* num_sources used */
255 NR_IRQS - 4 /* XXXX */,
256 mpc7448_hpc2_pic_initsenses,
257 sizeof(mpc7448_hpc2_pic_initsenses), "Tsi108_PIC");
258
259 BUG_ON(mpic == NULL); /* XXXX */
260
261 mpic_init(mpic);
262 mpic_setup_cascade(IRQ_TSI108_PCI, tsi108_irq_cascade, mpic);
263 tsi108_pci_int_init();
264
265 /* Configure MPIC outputs to CPU0 */
266 tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
267}
268
269void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
270{
271 seq_printf(m, "vendor\t\t: Freescale Semiconductor\n");
272 seq_printf(m, "machine\t\t: MPC7448hpc2\n");
273}
274
275void mpc7448_hpc2_restart(char *cmd)
276{
277 local_irq_disable();
278
279 /* Set exception prefix high - to the firmware */
280 _nmask_and_or_msr(0, MSR_IP);
281
282 for (;;) ; /* Spin until reset happens */
283}
284
285void mpc7448_hpc2_power_off(void)
286{
287 local_irq_disable();
288 for (;;) ; /* No way to shut power off with software */
289}
290
291void mpc7448_hpc2_halt(void)
292{
293 mpc7448_hpc2_power_off();
294}
295
296/*
297 * Called very early, device-tree isn't unflattened
298 */
299static int __init mpc7448_hpc2_probe(void)
300{
301 unsigned long root = of_get_flat_dt_root();
302
303 if (!of_flat_dt_is_compatible(root, "mpc74xx"))
304 return 0;
305 return 1;
306}
307
308static int mpc7448_machine_check_exception(struct pt_regs *regs)
309{
310 extern void tsi108_clear_pci_cfg_error(void);
311 const struct exception_table_entry *entry;
312
313 /* Are we prepared to handle this fault */
314 if ((entry = search_exception_tables(regs->nip)) != NULL) {
315 tsi108_clear_pci_cfg_error();
316 regs->msr |= MSR_RI;
317 regs->nip = entry->fixup;
318 return 1;
319 }
320 return 0;
321
322}
323define_machine(mpc7448_hpc2){
324 .name = "MPC7448 HPC2",
325 .probe = mpc7448_hpc2_probe,
326 .setup_arch = mpc7448_hpc2_setup_arch,
327 .init_IRQ = mpc7448_hpc2_init_IRQ,
328 .show_cpuinfo = mpc7448_hpc2_show_cpuinfo,
329 .get_irq = mpic_get_irq,
330 .pcibios_fixup = mpc7448_hpc2_pcibios_fixup,
331 .restart = mpc7448_hpc2_restart,
332 .calibrate_decr = generic_calibrate_decr,
333 .machine_check_exception= mpc7448_machine_check_exception,
334 .progress = udbg_progress,
335};
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h
new file mode 100644
index 000000000000..a543a5242e34
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h
@@ -0,0 +1,26 @@
1/*
2 * mpc7448_hpc2.h
3 *
4 * Definitions for Freescale MPC7448_HPC2 platform
5 *
6 * Author: Jacob Pan
7 * jacob.pan@freescale.com
8 * Maintainer: Roy Zang <roy.zang@freescale.com>
9 *
10 * 2006 (c) Freescale Semiconductor, Inc. This file is licensed under
11 * the terms of the GNU General Public License version 2. This program
12 * is licensed "as is" without any warranty of any kind, whether express
13 * or implied.
14 */
15
16#ifndef __PPC_PLATFORMS_MPC7448_HPC2_H
17#define __PPC_PLATFORMS_MPC7448_HPC2_H
18
19#include <asm/ppcboot.h>
20
21/* Base Addresses for the PCI bus
22 */
23#define MPC7448_HPC2_PCI_MEM_OFFSET (0x00000000)
24#define MPC7448_HPC2_ISA_IO_BASE (0x00000000)
25#define MPC7448_HPC2_ISA_MEM_BASE (0x00000000)
26#endif /* __PPC_PLATFORMS_MPC7448_HPC2_H */
diff --git a/arch/powerpc/platforms/iseries/dt.c b/arch/powerpc/platforms/iseries/dt.c
index d3444aabe76e..d194140c1ebf 100644
--- a/arch/powerpc/platforms/iseries/dt.c
+++ b/arch/powerpc/platforms/iseries/dt.c
@@ -252,6 +252,7 @@ static void __init dt_model(struct iseries_flat_dt *dt)
252{ 252{
253 char buf[16] = "IBM,"; 253 char buf[16] = "IBM,";
254 254
255 /* N.B. lparcfg.c knows about the "IBM," prefixes ... */
255 /* "IBM," + mfgId[2:3] + systemSerial[1:5] */ 256 /* "IBM," + mfgId[2:3] + systemSerial[1:5] */
256 strne2a(buf + 4, xItExtVpdPanel.mfgID + 2, 2); 257 strne2a(buf + 4, xItExtVpdPanel.mfgID + 2, 2);
257 strne2a(buf + 6, xItExtVpdPanel.systemSerial + 1, 5); 258 strne2a(buf + 6, xItExtVpdPanel.systemSerial + 1, 5);
@@ -264,6 +265,7 @@ static void __init dt_model(struct iseries_flat_dt *dt)
264 dt_prop_str(dt, "model", buf); 265 dt_prop_str(dt, "model", buf);
265 266
266 dt_prop_str(dt, "compatible", "IBM,iSeries"); 267 dt_prop_str(dt, "compatible", "IBM,iSeries");
268 dt_prop_u32(dt, "ibm,partition-no", HvLpConfig_getLpIndex());
267} 269}
268 270
269static void __init dt_do_vdevice(struct iseries_flat_dt *dt, 271static void __init dt_do_vdevice(struct iseries_flat_dt *dt,
diff --git a/arch/powerpc/platforms/iseries/htab.c b/arch/powerpc/platforms/iseries/htab.c
index 30bdcf3925d9..ed44dfceaa45 100644
--- a/arch/powerpc/platforms/iseries/htab.c
+++ b/arch/powerpc/platforms/iseries/htab.c
@@ -242,13 +242,11 @@ static void iSeries_hpte_invalidate(unsigned long slot, unsigned long va,
242 local_irq_restore(flags); 242 local_irq_restore(flags);
243} 243}
244 244
245void hpte_init_iSeries(void) 245void __init hpte_init_iSeries(void)
246{ 246{
247 ppc_md.hpte_invalidate = iSeries_hpte_invalidate; 247 ppc_md.hpte_invalidate = iSeries_hpte_invalidate;
248 ppc_md.hpte_updatepp = iSeries_hpte_updatepp; 248 ppc_md.hpte_updatepp = iSeries_hpte_updatepp;
249 ppc_md.hpte_updateboltedpp = iSeries_hpte_updateboltedpp; 249 ppc_md.hpte_updateboltedpp = iSeries_hpte_updateboltedpp;
250 ppc_md.hpte_insert = iSeries_hpte_insert; 250 ppc_md.hpte_insert = iSeries_hpte_insert;
251 ppc_md.hpte_remove = iSeries_hpte_remove; 251 ppc_md.hpte_remove = iSeries_hpte_remove;
252
253 htab_finish_init();
254} 252}
diff --git a/arch/powerpc/platforms/iseries/lpevents.c b/arch/powerpc/platforms/iseries/lpevents.c
index 8ca7b9396355..2a9f81ea27d6 100644
--- a/arch/powerpc/platforms/iseries/lpevents.c
+++ b/arch/powerpc/platforms/iseries/lpevents.c
@@ -51,20 +51,21 @@ static unsigned lpEventHandlerPaths[HvLpEvent_Type_NumTypes];
51static struct HvLpEvent * get_next_hvlpevent(void) 51static struct HvLpEvent * get_next_hvlpevent(void)
52{ 52{
53 struct HvLpEvent * event; 53 struct HvLpEvent * event;
54 event = (struct HvLpEvent *)hvlpevent_queue.xSlicCurEventPtr; 54 event = (struct HvLpEvent *)hvlpevent_queue.hq_current_event;
55 55
56 if (hvlpevent_is_valid(event)) { 56 if (hvlpevent_is_valid(event)) {
57 /* rmb() needed only for weakly consistent machines (regatta) */ 57 /* rmb() needed only for weakly consistent machines (regatta) */
58 rmb(); 58 rmb();
59 /* Set pointer to next potential event */ 59 /* Set pointer to next potential event */
60 hvlpevent_queue.xSlicCurEventPtr += ((event->xSizeMinus1 + 60 hvlpevent_queue.hq_current_event += ((event->xSizeMinus1 +
61 LpEventAlign) / LpEventAlign) * LpEventAlign; 61 IT_LP_EVENT_ALIGN) / IT_LP_EVENT_ALIGN) *
62 IT_LP_EVENT_ALIGN;
62 63
63 /* Wrap to beginning if no room at end */ 64 /* Wrap to beginning if no room at end */
64 if (hvlpevent_queue.xSlicCurEventPtr > 65 if (hvlpevent_queue.hq_current_event >
65 hvlpevent_queue.xSlicLastValidEventPtr) { 66 hvlpevent_queue.hq_last_event) {
66 hvlpevent_queue.xSlicCurEventPtr = 67 hvlpevent_queue.hq_current_event =
67 hvlpevent_queue.xSlicEventStackPtr; 68 hvlpevent_queue.hq_event_stack;
68 } 69 }
69 } else { 70 } else {
70 event = NULL; 71 event = NULL;
@@ -82,10 +83,10 @@ int hvlpevent_is_pending(void)
82 if (smp_processor_id() >= spread_lpevents) 83 if (smp_processor_id() >= spread_lpevents)
83 return 0; 84 return 0;
84 85
85 next_event = (struct HvLpEvent *)hvlpevent_queue.xSlicCurEventPtr; 86 next_event = (struct HvLpEvent *)hvlpevent_queue.hq_current_event;
86 87
87 return hvlpevent_is_valid(next_event) || 88 return hvlpevent_is_valid(next_event) ||
88 hvlpevent_queue.xPlicOverflowIntPending; 89 hvlpevent_queue.hq_overflow_pending;
89} 90}
90 91
91static void hvlpevent_clear_valid(struct HvLpEvent * event) 92static void hvlpevent_clear_valid(struct HvLpEvent * event)
@@ -95,18 +96,18 @@ static void hvlpevent_clear_valid(struct HvLpEvent * event)
95 * ie. on 64-byte boundaries. 96 * ie. on 64-byte boundaries.
96 */ 97 */
97 struct HvLpEvent *tmp; 98 struct HvLpEvent *tmp;
98 unsigned extra = ((event->xSizeMinus1 + LpEventAlign) / 99 unsigned extra = ((event->xSizeMinus1 + IT_LP_EVENT_ALIGN) /
99 LpEventAlign) - 1; 100 IT_LP_EVENT_ALIGN) - 1;
100 101
101 switch (extra) { 102 switch (extra) {
102 case 3: 103 case 3:
103 tmp = (struct HvLpEvent*)((char*)event + 3 * LpEventAlign); 104 tmp = (struct HvLpEvent*)((char*)event + 3 * IT_LP_EVENT_ALIGN);
104 hvlpevent_invalidate(tmp); 105 hvlpevent_invalidate(tmp);
105 case 2: 106 case 2:
106 tmp = (struct HvLpEvent*)((char*)event + 2 * LpEventAlign); 107 tmp = (struct HvLpEvent*)((char*)event + 2 * IT_LP_EVENT_ALIGN);
107 hvlpevent_invalidate(tmp); 108 hvlpevent_invalidate(tmp);
108 case 1: 109 case 1:
109 tmp = (struct HvLpEvent*)((char*)event + 1 * LpEventAlign); 110 tmp = (struct HvLpEvent*)((char*)event + 1 * IT_LP_EVENT_ALIGN);
110 hvlpevent_invalidate(tmp); 111 hvlpevent_invalidate(tmp);
111 } 112 }
112 113
@@ -120,7 +121,7 @@ void process_hvlpevents(struct pt_regs *regs)
120 struct HvLpEvent * event; 121 struct HvLpEvent * event;
121 122
122 /* If we have recursed, just return */ 123 /* If we have recursed, just return */
123 if (!spin_trylock(&hvlpevent_queue.lock)) 124 if (!spin_trylock(&hvlpevent_queue.hq_lock))
124 return; 125 return;
125 126
126 for (;;) { 127 for (;;) {
@@ -148,17 +149,17 @@ void process_hvlpevents(struct pt_regs *regs)
148 printk(KERN_INFO "Unexpected Lp Event type=%d\n", event->xType ); 149 printk(KERN_INFO "Unexpected Lp Event type=%d\n", event->xType );
149 150
150 hvlpevent_clear_valid(event); 151 hvlpevent_clear_valid(event);
151 } else if (hvlpevent_queue.xPlicOverflowIntPending) 152 } else if (hvlpevent_queue.hq_overflow_pending)
152 /* 153 /*
153 * No more valid events. If overflow events are 154 * No more valid events. If overflow events are
154 * pending process them 155 * pending process them
155 */ 156 */
156 HvCallEvent_getOverflowLpEvents(hvlpevent_queue.xIndex); 157 HvCallEvent_getOverflowLpEvents(hvlpevent_queue.hq_index);
157 else 158 else
158 break; 159 break;
159 } 160 }
160 161
161 spin_unlock(&hvlpevent_queue.lock); 162 spin_unlock(&hvlpevent_queue.hq_lock);
162} 163}
163 164
164static int set_spread_lpevents(char *str) 165static int set_spread_lpevents(char *str)
@@ -184,20 +185,20 @@ void setup_hvlpevent_queue(void)
184{ 185{
185 void *eventStack; 186 void *eventStack;
186 187
187 spin_lock_init(&hvlpevent_queue.lock); 188 spin_lock_init(&hvlpevent_queue.hq_lock);
188 189
189 /* Allocate a page for the Event Stack. */ 190 /* Allocate a page for the Event Stack. */
190 eventStack = alloc_bootmem_pages(LpEventStackSize); 191 eventStack = alloc_bootmem_pages(IT_LP_EVENT_STACK_SIZE);
191 memset(eventStack, 0, LpEventStackSize); 192 memset(eventStack, 0, IT_LP_EVENT_STACK_SIZE);
192 193
193 /* Invoke the hypervisor to initialize the event stack */ 194 /* Invoke the hypervisor to initialize the event stack */
194 HvCallEvent_setLpEventStack(0, eventStack, LpEventStackSize); 195 HvCallEvent_setLpEventStack(0, eventStack, IT_LP_EVENT_STACK_SIZE);
195 196
196 hvlpevent_queue.xSlicEventStackPtr = (char *)eventStack; 197 hvlpevent_queue.hq_event_stack = eventStack;
197 hvlpevent_queue.xSlicCurEventPtr = (char *)eventStack; 198 hvlpevent_queue.hq_current_event = eventStack;
198 hvlpevent_queue.xSlicLastValidEventPtr = (char *)eventStack + 199 hvlpevent_queue.hq_last_event = (char *)eventStack +
199 (LpEventStackSize - LpEventMaxSize); 200 (IT_LP_EVENT_STACK_SIZE - IT_LP_EVENT_MAX_SIZE);
200 hvlpevent_queue.xIndex = 0; 201 hvlpevent_queue.hq_index = 0;
201} 202}
202 203
203/* Register a handler for an LpEvent type */ 204/* Register a handler for an LpEvent type */
diff --git a/arch/powerpc/platforms/iseries/proc.c b/arch/powerpc/platforms/iseries/proc.c
index e68b6b5fa89f..c241413629ac 100644
--- a/arch/powerpc/platforms/iseries/proc.c
+++ b/arch/powerpc/platforms/iseries/proc.c
@@ -24,7 +24,6 @@
24#include <asm/processor.h> 24#include <asm/processor.h>
25#include <asm/time.h> 25#include <asm/time.h>
26#include <asm/lppaca.h> 26#include <asm/lppaca.h>
27#include <asm/iseries/it_lp_queue.h>
28#include <asm/iseries/hv_call_xm.h> 27#include <asm/iseries/hv_call_xm.h>
29 28
30#include "processor_vpd.h" 29#include "processor_vpd.h"
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index 617c724c4590..66c77e4f8ec2 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -81,8 +81,6 @@ static void iSeries_pci_final_fixup(void) { }
81#endif 81#endif
82 82
83extern int rd_size; /* Defined in drivers/block/rd.c */ 83extern int rd_size; /* Defined in drivers/block/rd.c */
84extern unsigned long embedded_sysmap_start;
85extern unsigned long embedded_sysmap_end;
86 84
87extern unsigned long iSeries_recal_tb; 85extern unsigned long iSeries_recal_tb;
88extern unsigned long iSeries_recal_titan; 86extern unsigned long iSeries_recal_titan;
@@ -321,11 +319,6 @@ static void __init iSeries_init_early(void)
321 iSeries_recal_titan = HvCallXm_loadTod(); 319 iSeries_recal_titan = HvCallXm_loadTod();
322 320
323 /* 321 /*
324 * Initialize the hash table management pointers
325 */
326 hpte_init_iSeries();
327
328 /*
329 * Initialize the DMA/TCE management 322 * Initialize the DMA/TCE management
330 */ 323 */
331 iommu_init_early_iSeries(); 324 iommu_init_early_iSeries();
@@ -563,16 +556,6 @@ static void __init iSeries_fixup_klimit(void)
563 if (naca.xRamDisk) 556 if (naca.xRamDisk)
564 klimit = KERNELBASE + (u64)naca.xRamDisk + 557 klimit = KERNELBASE + (u64)naca.xRamDisk +
565 (naca.xRamDiskSize * HW_PAGE_SIZE); 558 (naca.xRamDiskSize * HW_PAGE_SIZE);
566 else {
567 /*
568 * No ram disk was included - check and see if there
569 * was an embedded system map. Change klimit to take
570 * into account any embedded system map
571 */
572 if (embedded_sysmap_end)
573 klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
574 0xfffffffffffff000);
575 }
576} 559}
577 560
578static int __init iSeries_src_init(void) 561static int __init iSeries_src_init(void)
@@ -683,6 +666,8 @@ static int __init iseries_probe(void)
683 */ 666 */
684 virt_irq_max = 255; 667 virt_irq_max = 255;
685 668
669 hpte_init_iSeries();
670
686 return 1; 671 return 1;
687} 672}
688 673
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index a0505ea48a86..4e32a5417fd1 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -199,11 +199,6 @@ static void __init maple_init_early(void)
199{ 199{
200 DBG(" -> maple_init_early\n"); 200 DBG(" -> maple_init_early\n");
201 201
202 /* Initialize hash table, from now on, we can take hash faults
203 * and call ioremap
204 */
205 hpte_init_native();
206
207 /* Setup interrupt mapping options */ 202 /* Setup interrupt mapping options */
208 ppc64_interrupt_controller = IC_OPEN_PIC; 203 ppc64_interrupt_controller = IC_OPEN_PIC;
209 204
@@ -272,6 +267,8 @@ static int __init maple_probe(void)
272 */ 267 */
273 alloc_dart_table(); 268 alloc_dart_table();
274 269
270 hpte_init_native();
271
275 return 1; 272 return 1;
276} 273}
277 274
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 9cc7db7a8bdc..89c5775f83be 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -600,13 +600,6 @@ pmac_halt(void)
600 */ 600 */
601static void __init pmac_init_early(void) 601static void __init pmac_init_early(void)
602{ 602{
603#ifdef CONFIG_PPC64
604 /* Initialize hash table, from now on, we can take hash faults
605 * and call ioremap
606 */
607 hpte_init_native();
608#endif
609
610 /* Enable early btext debug if requested */ 603 /* Enable early btext debug if requested */
611 if (strstr(cmd_line, "btextdbg")) { 604 if (strstr(cmd_line, "btextdbg")) {
612 udbg_adb_init_early(); 605 udbg_adb_init_early();
@@ -683,6 +676,8 @@ static int __init pmac_probe(void)
683 * part of the cacheable linar mapping 676 * part of the cacheable linar mapping
684 */ 677 */
685 alloc_dart_table(); 678 alloc_dart_table();
679
680 hpte_init_native();
686#endif 681#endif
687 682
688#ifdef CONFIG_PPC32 683#ifdef CONFIG_PPC32
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index d03a8b078f9d..8cfb5706790e 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -92,6 +92,15 @@ static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
92 *(tcep++) = 0; 92 *(tcep++) = 0;
93} 93}
94 94
95static unsigned long tce_get_pseries(struct iommu_table *tbl, long index)
96{
97 u64 *tcep;
98
99 index <<= TCE_PAGE_FACTOR;
100 tcep = ((u64 *)tbl->it_base) + index;
101
102 return *tcep;
103}
95 104
96static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum, 105static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum,
97 long npages, unsigned long uaddr, 106 long npages, unsigned long uaddr,
@@ -235,6 +244,25 @@ static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long n
235 } 244 }
236} 245}
237 246
247static unsigned long tce_get_pSeriesLP(struct iommu_table *tbl, long tcenum)
248{
249 u64 rc;
250 unsigned long tce_ret;
251
252 tcenum <<= TCE_PAGE_FACTOR;
253 rc = plpar_tce_get((u64)tbl->it_index, (u64)tcenum << 12, &tce_ret);
254
255 if (rc && printk_ratelimit()) {
256 printk("tce_get_pSeriesLP: plpar_tce_get failed. rc=%ld\n",
257 rc);
258 printk("\tindex = 0x%lx\n", (u64)tbl->it_index);
259 printk("\ttcenum = 0x%lx\n", (u64)tcenum);
260 show_stack(current, (unsigned long *)__get_SP());
261 }
262
263 return tce_ret;
264}
265
238static void iommu_table_setparms(struct pci_controller *phb, 266static void iommu_table_setparms(struct pci_controller *phb,
239 struct device_node *dn, 267 struct device_node *dn,
240 struct iommu_table *tbl) 268 struct iommu_table *tbl)
@@ -254,7 +282,10 @@ static void iommu_table_setparms(struct pci_controller *phb,
254 } 282 }
255 283
256 tbl->it_base = (unsigned long)__va(*basep); 284 tbl->it_base = (unsigned long)__va(*basep);
285
286#ifndef CONFIG_CRASH_DUMP
257 memset((void *)tbl->it_base, 0, *sizep); 287 memset((void *)tbl->it_base, 0, *sizep);
288#endif
258 289
259 tbl->it_busno = phb->bus->number; 290 tbl->it_busno = phb->bus->number;
260 291
@@ -560,11 +591,13 @@ void iommu_init_early_pSeries(void)
560 ppc_md.tce_build = tce_build_pSeriesLP; 591 ppc_md.tce_build = tce_build_pSeriesLP;
561 ppc_md.tce_free = tce_free_pSeriesLP; 592 ppc_md.tce_free = tce_free_pSeriesLP;
562 } 593 }
594 ppc_md.tce_get = tce_get_pSeriesLP;
563 ppc_md.iommu_bus_setup = iommu_bus_setup_pSeriesLP; 595 ppc_md.iommu_bus_setup = iommu_bus_setup_pSeriesLP;
564 ppc_md.iommu_dev_setup = iommu_dev_setup_pSeriesLP; 596 ppc_md.iommu_dev_setup = iommu_dev_setup_pSeriesLP;
565 } else { 597 } else {
566 ppc_md.tce_build = tce_build_pSeries; 598 ppc_md.tce_build = tce_build_pSeries;
567 ppc_md.tce_free = tce_free_pSeries; 599 ppc_md.tce_free = tce_free_pSeries;
600 ppc_md.tce_get = tce_get_pseries;
568 ppc_md.iommu_bus_setup = iommu_bus_setup_pSeries; 601 ppc_md.iommu_bus_setup = iommu_bus_setup_pSeries;
569 ppc_md.iommu_dev_setup = iommu_dev_setup_pSeries; 602 ppc_md.iommu_dev_setup = iommu_dev_setup_pSeries;
570 } 603 }
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 634b7d06d3cc..27480705996f 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -513,7 +513,7 @@ void pSeries_lpar_flush_hash_range(unsigned long number, int local)
513 spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags); 513 spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
514} 514}
515 515
516void hpte_init_lpar(void) 516void __init hpte_init_lpar(void)
517{ 517{
518 ppc_md.hpte_invalidate = pSeries_lpar_hpte_invalidate; 518 ppc_md.hpte_invalidate = pSeries_lpar_hpte_invalidate;
519 ppc_md.hpte_updatepp = pSeries_lpar_hpte_updatepp; 519 ppc_md.hpte_updatepp = pSeries_lpar_hpte_updatepp;
@@ -522,6 +522,4 @@ void hpte_init_lpar(void)
522 ppc_md.hpte_remove = pSeries_lpar_hpte_remove; 522 ppc_md.hpte_remove = pSeries_lpar_hpte_remove;
523 ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range; 523 ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range;
524 ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear; 524 ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear;
525
526 htab_finish_init();
527} 525}
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 1e28518c6121..b3197ff156c6 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -322,11 +322,6 @@ static void __init pSeries_init_early(void)
322 DBG(" -> pSeries_init_early()\n"); 322 DBG(" -> pSeries_init_early()\n");
323 323
324 fw_feature_init(); 324 fw_feature_init();
325
326 if (firmware_has_feature(FW_FEATURE_LPAR))
327 hpte_init_lpar();
328 else
329 hpte_init_native();
330 325
331 if (firmware_has_feature(FW_FEATURE_LPAR)) 326 if (firmware_has_feature(FW_FEATURE_LPAR))
332 find_udbg_vterm(); 327 find_udbg_vterm();
@@ -384,6 +379,11 @@ static int __init pSeries_probe_hypertas(unsigned long node,
384 if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL) 379 if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL)
385 powerpc_firmware_features |= FW_FEATURE_LPAR; 380 powerpc_firmware_features |= FW_FEATURE_LPAR;
386 381
382 if (firmware_has_feature(FW_FEATURE_LPAR))
383 hpte_init_lpar();
384 else
385 hpte_init_native();
386
387 return 1; 387 return 1;
388} 388}
389 389
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-20 20:36:10 -0500