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authorHaren Myneni <haren@us.ibm.com>2006-06-23 02:35:10 -0400
committerPaul Mackerras <paulus@samba.org>2006-06-27 21:59:46 -0400
commit5f50867b4f1938ab80d249206efbec37bba48c39 (patch)
treeb47656171eb83ebe6eeed7ec190b77924d0fe4b4 /arch/powerpc/platforms
parentf93d6d071fdbf27141c5331d6cd988664650bc1f (diff)
[POWERPC] kdump: Reserve the existing TCE mappings left by the first kernel
During kdump boot, noticed some machines checkstop on dma protection fault for ongoing DMA left in the first kernel. Instead of initializing TCE entries in iommu_init() for the kdump boot, this patch fixes this issue by walking through the each TCE table and checks whether the entries are in use by the first kernel. If so, reserve those entries by setting the corresponding bit in tbl->it_map such that these entries will not be available for the kdump boot. However it could be possible that all TCE entries might be used up due to the driver bug that does continuous mapping. My observation is around 1700 TCE entries are used on some systems (Ex: P4) at some point of time during kdump boot and saving dump (either write into the disk or sending to remote machine). Hence, this patch will make sure that minimum of 2048 entries will be available such that kdump boot could be successful in some cases. Signed-off-by: Haren Myneni <haren@us.ibm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index d03a8b078f9d..8cfb5706790e 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -92,6 +92,15 @@ static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
92 *(tcep++) = 0; 92 *(tcep++) = 0;
93} 93}
94 94
95static unsigned long tce_get_pseries(struct iommu_table *tbl, long index)
96{
97 u64 *tcep;
98
99 index <<= TCE_PAGE_FACTOR;
100 tcep = ((u64 *)tbl->it_base) + index;
101
102 return *tcep;
103}
95 104
96static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum, 105static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum,
97 long npages, unsigned long uaddr, 106 long npages, unsigned long uaddr,
@@ -235,6 +244,25 @@ static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long n
235 } 244 }
236} 245}
237 246
247static unsigned long tce_get_pSeriesLP(struct iommu_table *tbl, long tcenum)
248{
249 u64 rc;
250 unsigned long tce_ret;
251
252 tcenum <<= TCE_PAGE_FACTOR;
253 rc = plpar_tce_get((u64)tbl->it_index, (u64)tcenum << 12, &tce_ret);
254
255 if (rc && printk_ratelimit()) {
256 printk("tce_get_pSeriesLP: plpar_tce_get failed. rc=%ld\n",
257 rc);
258 printk("\tindex = 0x%lx\n", (u64)tbl->it_index);
259 printk("\ttcenum = 0x%lx\n", (u64)tcenum);
260 show_stack(current, (unsigned long *)__get_SP());
261 }
262
263 return tce_ret;
264}
265
238static void iommu_table_setparms(struct pci_controller *phb, 266static void iommu_table_setparms(struct pci_controller *phb,
239 struct device_node *dn, 267 struct device_node *dn,
240 struct iommu_table *tbl) 268 struct iommu_table *tbl)
@@ -254,7 +282,10 @@ static void iommu_table_setparms(struct pci_controller *phb,
254 } 282 }
255 283
256 tbl->it_base = (unsigned long)__va(*basep); 284 tbl->it_base = (unsigned long)__va(*basep);
285
286#ifndef CONFIG_CRASH_DUMP
257 memset((void *)tbl->it_base, 0, *sizep); 287 memset((void *)tbl->it_base, 0, *sizep);
288#endif
258 289
259 tbl->it_busno = phb->bus->number; 290 tbl->it_busno = phb->bus->number;
260 291
@@ -560,11 +591,13 @@ void iommu_init_early_pSeries(void)
560 ppc_md.tce_build = tce_build_pSeriesLP; 591 ppc_md.tce_build = tce_build_pSeriesLP;
561 ppc_md.tce_free = tce_free_pSeriesLP; 592 ppc_md.tce_free = tce_free_pSeriesLP;
562 } 593 }
594 ppc_md.tce_get = tce_get_pSeriesLP;
563 ppc_md.iommu_bus_setup = iommu_bus_setup_pSeriesLP; 595 ppc_md.iommu_bus_setup = iommu_bus_setup_pSeriesLP;
564 ppc_md.iommu_dev_setup = iommu_dev_setup_pSeriesLP; 596 ppc_md.iommu_dev_setup = iommu_dev_setup_pSeriesLP;
565 } else { 597 } else {
566 ppc_md.tce_build = tce_build_pSeries; 598 ppc_md.tce_build = tce_build_pSeries;
567 ppc_md.tce_free = tce_free_pSeries; 599 ppc_md.tce_free = tce_free_pSeries;
600 ppc_md.tce_get = tce_get_pseries;
568 ppc_md.iommu_bus_setup = iommu_bus_setup_pSeries; 601 ppc_md.iommu_bus_setup = iommu_bus_setup_pSeries;
569 ppc_md.iommu_dev_setup = iommu_dev_setup_pSeries; 602 ppc_md.iommu_dev_setup = iommu_dev_setup_pSeries;
570 } 603 }