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authorLinas Vepstas <linas@austin.ibm.com>2007-07-26 18:35:40 -0400
committerPaul Mackerras <paulus@samba.org>2007-08-16 21:01:50 -0400
commit0b9369f4934eb9933a1fbe991c5e8a4f9725da37 (patch)
tree3a47ae99f1b4e4fc42a553a9ae27270113847005 /arch/powerpc/platforms/pseries/eeh.c
parent093eda3ce5dc3758c9a5e806ea6573bfffed3ff7 (diff)
[POWERPC] EEH: Dump PCI bridge status on event
Gather bridge-specific data on EEH events. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> ---- arch/powerpc/platforms/pseries/eeh.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/pseries/eeh.c')
-rw-r--r--arch/powerpc/platforms/pseries/eeh.c27
1 files changed, 26 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 34f87682e092..41b64b370fc6 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -169,6 +169,8 @@ static void rtas_slot_error_detail(struct pci_dn *pdn, int severity,
169 */ 169 */
170static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len) 170static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
171{ 171{
172 struct device_node *dn;
173 struct pci_dev *dev = pdn->pcidev;
172 u32 cfg; 174 u32 cfg;
173 int cap, i; 175 int cap, i;
174 int n = 0; 176 int n = 0;
@@ -184,6 +186,17 @@ static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
184 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg); 186 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
185 printk(KERN_WARNING "EEH: PCI cmd/status register: %08x\n", cfg); 187 printk(KERN_WARNING "EEH: PCI cmd/status register: %08x\n", cfg);
186 188
189 /* Gather bridge-specific registers */
190 if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
191 rtas_read_config(pdn, PCI_SEC_STATUS, 2, &cfg);
192 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
193 printk(KERN_WARNING "EEH: Bridge secondary status: %04x\n", cfg);
194
195 rtas_read_config(pdn, PCI_BRIDGE_CONTROL, 2, &cfg);
196 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
197 printk(KERN_WARNING "EEH: Bridge control: %04x\n", cfg);
198 }
199
187 /* Dump out the PCI-X command and status regs */ 200 /* Dump out the PCI-X command and status regs */
188 cap = pci_find_capability(pdn->pcidev, PCI_CAP_ID_PCIX); 201 cap = pci_find_capability(pdn->pcidev, PCI_CAP_ID_PCIX);
189 if (cap) { 202 if (cap) {
@@ -209,7 +222,7 @@ static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
209 printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg); 222 printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg);
210 } 223 }
211 224
212 cap = pci_find_ext_capability(pdn->pcidev,PCI_EXT_CAP_ID_ERR); 225 cap = pci_find_ext_capability(pdn->pcidev, PCI_EXT_CAP_ID_ERR);
213 if (cap) { 226 if (cap) {
214 n += scnprintf(buf+n, len-n, "pci-e AER:\n"); 227 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
215 printk(KERN_WARNING 228 printk(KERN_WARNING
@@ -222,6 +235,18 @@ static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
222 } 235 }
223 } 236 }
224 } 237 }
238
239 /* Gather status on devices under the bridge */
240 if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
241 dn = pdn->node->child;
242 while (dn) {
243 pdn = PCI_DN(dn);
244 if (pdn)
245 n += gather_pci_data(pdn, buf+n, len-n);
246 dn = dn->sibling;
247 }
248 }
249
225 return n; 250 return n;
226} 251}
227 252