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authorGeoff Levand <geoffrey.levand@am.sony.com>2007-01-26 22:08:08 -0500
committerPaul Mackerras <paulus@samba.org>2007-02-06 22:03:18 -0500
commit861be32ce7f1cf272a3f809e77213b83117a0bd2 (patch)
tree5765d9227e3dd87582b586d16755e843695f0dd8 /arch/powerpc/platforms/ps3/spu.c
parent9cf9e19667f6ce01bd509a154157270069f836f9 (diff)
[POWERPC] ps3: bind interrupt to cpu
Change the PS3 irq allocation routines to take an argument indicating which cpu (processor thread) the interrupt should be serviced on. The current system configuration favors device interrupts that are serviced on cpu0, so that is used as the default. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/ps3/spu.c')
-rw-r--r--arch/powerpc/platforms/ps3/spu.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/platforms/ps3/spu.c b/arch/powerpc/platforms/ps3/spu.c
index ed88dc6a7f2f..9f6edc58568d 100644
--- a/arch/powerpc/platforms/ps3/spu.c
+++ b/arch/powerpc/platforms/ps3/spu.c
@@ -267,20 +267,20 @@ static int __init setup_interrupts(struct spu *spu)
267{ 267{
268 int result; 268 int result;
269 269
270 result = ps3_alloc_spe_irq(spu_pdata(spu)->spe_id, 0, 270 result = ps3_alloc_spe_irq(PS3_BINDING_CPU_ANY, spu_pdata(spu)->spe_id,
271 &spu->irqs[0]); 271 0, &spu->irqs[0]);
272 272
273 if (result) 273 if (result)
274 goto fail_alloc_0; 274 goto fail_alloc_0;
275 275
276 result = ps3_alloc_spe_irq(spu_pdata(spu)->spe_id, 1, 276 result = ps3_alloc_spe_irq(PS3_BINDING_CPU_ANY, spu_pdata(spu)->spe_id,
277 &spu->irqs[1]); 277 1, &spu->irqs[1]);
278 278
279 if (result) 279 if (result)
280 goto fail_alloc_1; 280 goto fail_alloc_1;
281 281
282 result = ps3_alloc_spe_irq(spu_pdata(spu)->spe_id, 2, 282 result = ps3_alloc_spe_irq(PS3_BINDING_CPU_ANY, spu_pdata(spu)->spe_id,
283 &spu->irqs[2]); 283 2, &spu->irqs[2]);
284 284
285 if (result) 285 if (result)
286 goto fail_alloc_2; 286 goto fail_alloc_2;