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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2005-12-13 02:01:21 -0500
committerPaul Mackerras <paulus@samba.org>2006-01-08 22:53:55 -0500
commitcc5d0189b9ba95260857a5018a1c2fef90008507 (patch)
tree1202c94b6b3cb81a96d0a0e54424cad10eef68bb /arch/powerpc/platforms/powermac/nvram.c
parent9cf84d7c97992dbe5360b241327341c07ce30fc9 (diff)
[PATCH] powerpc: Remove device_node addrs/n_addr
The pre-parsed addrs/n_addrs fields in struct device_node are finally gone. Remove the dodgy heuristics that did that parsing at boot and remove the fields themselves since we now have a good replacement with the new OF parsing code. This patch also fixes a bunch of drivers to use the new code instead, so that at least pmac32, pseries, iseries and g5 defconfigs build. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/powermac/nvram.c')
-rw-r--r--arch/powerpc/platforms/powermac/nvram.c52
1 files changed, 34 insertions, 18 deletions
diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c
index 59e0e51cf663..3ebd045a3350 100644
--- a/arch/powerpc/platforms/powermac/nvram.c
+++ b/arch/powerpc/platforms/powermac/nvram.c
@@ -514,7 +514,7 @@ static void core99_nvram_sync(void)
514#endif 514#endif
515} 515}
516 516
517static int __init core99_nvram_setup(struct device_node *dp) 517static int __init core99_nvram_setup(struct device_node *dp, unsigned long addr)
518{ 518{
519 int i; 519 int i;
520 u32 gen_bank0, gen_bank1; 520 u32 gen_bank0, gen_bank1;
@@ -528,7 +528,7 @@ static int __init core99_nvram_setup(struct device_node *dp)
528 printk(KERN_ERR "nvram: can't allocate ram image\n"); 528 printk(KERN_ERR "nvram: can't allocate ram image\n");
529 return -ENOMEM; 529 return -ENOMEM;
530 } 530 }
531 nvram_data = ioremap(dp->addrs[0].address, NVRAM_SIZE*2); 531 nvram_data = ioremap(addr, NVRAM_SIZE*2);
532 nvram_naddrs = 1; /* Make sure we get the correct case */ 532 nvram_naddrs = 1; /* Make sure we get the correct case */
533 533
534 DBG("nvram: Checking bank 0...\n"); 534 DBG("nvram: Checking bank 0...\n");
@@ -570,34 +570,48 @@ static int __init core99_nvram_setup(struct device_node *dp)
570int __init pmac_nvram_init(void) 570int __init pmac_nvram_init(void)
571{ 571{
572 struct device_node *dp; 572 struct device_node *dp;
573 struct resource r1, r2;
574 unsigned int s1 = 0, s2 = 0;
573 int err = 0; 575 int err = 0;
574 576
575 nvram_naddrs = 0; 577 nvram_naddrs = 0;
576 578
577 dp = find_devices("nvram"); 579 dp = of_find_node_by_name(NULL, "nvram");
578 if (dp == NULL) { 580 if (dp == NULL) {
579 printk(KERN_ERR "Can't find NVRAM device\n"); 581 printk(KERN_ERR "Can't find NVRAM device\n");
580 return -ENODEV; 582 return -ENODEV;
581 } 583 }
582 nvram_naddrs = dp->n_addrs; 584
585 /* Try to obtain an address */
586 if (of_address_to_resource(dp, 0, &r1) == 0) {
587 nvram_naddrs = 1;
588 s1 = (r1.end - r1.start) + 1;
589 if (of_address_to_resource(dp, 1, &r2) == 0) {
590 nvram_naddrs = 2;
591 s2 = (r2.end - r2.start) + 1;
592 }
593 }
594
583 is_core_99 = device_is_compatible(dp, "nvram,flash"); 595 is_core_99 = device_is_compatible(dp, "nvram,flash");
584 if (is_core_99) 596 if (is_core_99) {
585 err = core99_nvram_setup(dp); 597 err = core99_nvram_setup(dp, r1.start);
598 goto bail;
599 }
600
586#ifdef CONFIG_PPC32 601#ifdef CONFIG_PPC32
587 else if (_machine == _MACH_chrp && nvram_naddrs == 1) { 602 if (_machine == _MACH_chrp && nvram_naddrs == 1) {
588 nvram_data = ioremap(dp->addrs[0].address + isa_mem_base, 603 nvram_data = ioremap(r1.start, s1);
589 dp->addrs[0].size);
590 nvram_mult = 1; 604 nvram_mult = 1;
591 ppc_md.nvram_read_val = direct_nvram_read_byte; 605 ppc_md.nvram_read_val = direct_nvram_read_byte;
592 ppc_md.nvram_write_val = direct_nvram_write_byte; 606 ppc_md.nvram_write_val = direct_nvram_write_byte;
593 } else if (nvram_naddrs == 1) { 607 } else if (nvram_naddrs == 1) {
594 nvram_data = ioremap(dp->addrs[0].address, dp->addrs[0].size); 608 nvram_data = ioremap(r1.start, s1);
595 nvram_mult = (dp->addrs[0].size + NVRAM_SIZE - 1) / NVRAM_SIZE; 609 nvram_mult = (s1 + NVRAM_SIZE - 1) / NVRAM_SIZE;
596 ppc_md.nvram_read_val = direct_nvram_read_byte; 610 ppc_md.nvram_read_val = direct_nvram_read_byte;
597 ppc_md.nvram_write_val = direct_nvram_write_byte; 611 ppc_md.nvram_write_val = direct_nvram_write_byte;
598 } else if (nvram_naddrs == 2) { 612 } else if (nvram_naddrs == 2) {
599 nvram_addr = ioremap(dp->addrs[0].address, dp->addrs[0].size); 613 nvram_addr = ioremap(r1.start, s1);
600 nvram_data = ioremap(dp->addrs[1].address, dp->addrs[1].size); 614 nvram_data = ioremap(r2.start, s2);
601 ppc_md.nvram_read_val = indirect_nvram_read_byte; 615 ppc_md.nvram_read_val = indirect_nvram_read_byte;
602 ppc_md.nvram_write_val = indirect_nvram_write_byte; 616 ppc_md.nvram_write_val = indirect_nvram_write_byte;
603 } else if (nvram_naddrs == 0 && sys_ctrler == SYS_CTRLER_PMU) { 617 } else if (nvram_naddrs == 0 && sys_ctrler == SYS_CTRLER_PMU) {
@@ -606,13 +620,15 @@ int __init pmac_nvram_init(void)
606 ppc_md.nvram_read_val = pmu_nvram_read_byte; 620 ppc_md.nvram_read_val = pmu_nvram_read_byte;
607 ppc_md.nvram_write_val = pmu_nvram_write_byte; 621 ppc_md.nvram_write_val = pmu_nvram_write_byte;
608#endif /* CONFIG_ADB_PMU */ 622#endif /* CONFIG_ADB_PMU */
609 } 623 } else {
610#endif
611 else {
612 printk(KERN_ERR "Incompatible type of NVRAM\n"); 624 printk(KERN_ERR "Incompatible type of NVRAM\n");
613 return -ENXIO; 625 err = -ENXIO;
614 } 626 }
615 lookup_partitions(); 627#endif /* CONFIG_PPC32 */
628bail:
629 of_node_put(dp);
630 if (err == 0)
631 lookup_partitions();
616 return err; 632 return err;
617} 633}
618 634