diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2007-06-04 01:15:36 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-06-14 08:29:56 -0400 |
commit | 3d5134ee8341bffc4f539049abb9e90d469b448d (patch) | |
tree | 037958e0daa97b4ef350908a53182167ee2c8a03 /arch/powerpc/platforms/maple | |
parent | c19c03fc749147f565e807fa65f1729066800571 (diff) |
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/maple')
-rw-r--r-- | arch/powerpc/platforms/maple/pci.c | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c index 7aaa5bbc9363..f357b9258875 100644 --- a/arch/powerpc/platforms/maple/pci.c +++ b/arch/powerpc/platforms/maple/pci.c | |||
@@ -519,23 +519,6 @@ void __devinit maple_pci_irq_fixup(struct pci_dev *dev) | |||
519 | DBG(" <- maple_pci_irq_fixup\n"); | 519 | DBG(" <- maple_pci_irq_fixup\n"); |
520 | } | 520 | } |
521 | 521 | ||
522 | static void __init maple_fixup_phb_resources(void) | ||
523 | { | ||
524 | struct pci_controller *hose, *tmp; | ||
525 | |||
526 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { | ||
527 | unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base; | ||
528 | |||
529 | hose->io_resource.start += offset; | ||
530 | hose->io_resource.end += offset; | ||
531 | |||
532 | printk(KERN_INFO "PCI Host %d, io start: %llx; io end: %llx\n", | ||
533 | hose->global_number, | ||
534 | (unsigned long long)hose->io_resource.start, | ||
535 | (unsigned long long)hose->io_resource.end); | ||
536 | } | ||
537 | } | ||
538 | |||
539 | void __init maple_pci_init(void) | 522 | void __init maple_pci_init(void) |
540 | { | 523 | { |
541 | struct device_node *np, *root; | 524 | struct device_node *np, *root; |
@@ -573,24 +556,6 @@ void __init maple_pci_init(void) | |||
573 | if (ht && add_bridge(ht) != 0) | 556 | if (ht && add_bridge(ht) != 0) |
574 | of_node_put(ht); | 557 | of_node_put(ht); |
575 | 558 | ||
576 | /* | ||
577 | * We need to call pci_setup_phb_io for the HT bridge first | ||
578 | * so it gets the I/O port numbers starting at 0, and we | ||
579 | * need to call it for the AGP bridge after that so it gets | ||
580 | * small positive I/O port numbers. | ||
581 | */ | ||
582 | if (u3_ht) | ||
583 | pci_setup_phb_io(u3_ht, 1); | ||
584 | if (u3_agp) | ||
585 | pci_setup_phb_io(u3_agp, 0); | ||
586 | if (u4_pcie) | ||
587 | pci_setup_phb_io(u4_pcie, 0); | ||
588 | |||
589 | /* Fixup the IO resources on our host bridges as the common code | ||
590 | * does it only for childs of the host bridges | ||
591 | */ | ||
592 | maple_fixup_phb_resources(); | ||
593 | |||
594 | /* Setup the linkage between OF nodes and PHBs */ | 559 | /* Setup the linkage between OF nodes and PHBs */ |
595 | pci_devs_phb_init(); | 560 | pci_devs_phb_init(); |
596 | 561 | ||