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authorStephen Rothwell <sfr@canb.auug.org.au>2007-08-21 23:47:24 -0400
committerPaul Mackerras <paulus@samba.org>2007-08-22 02:48:35 -0400
commitdc8f571a26689102f6abe2565a84226edeaacc61 (patch)
tree2a155e79e63f2ff2c1321e3bc704eb472e516cc1 /arch/powerpc/platforms/iseries
parentf9ff0f304833be9a6a605c84e24d630d5aef2230 (diff)
[POWERPC] Move the iSeries exception vectors
out of head_64.S and into platforms/iseries/exception.S Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/iseries')
-rw-r--r--arch/powerpc/platforms/iseries/exception.S136
1 files changed, 136 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index b6e2f8c0b093..b5f600616ade 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -30,6 +30,8 @@
30#include <asm/asm-offsets.h> 30#include <asm/asm-offsets.h>
31#include <asm/thread_info.h> 31#include <asm/thread_info.h>
32#include <asm/ptrace.h> 32#include <asm/ptrace.h>
33#include <asm/exception.h>
34#include <asm/cputable.h>
33 35
34 .text 36 .text
35 37
@@ -83,6 +85,140 @@ iSeries_secondary_smp_loop:
83 b 1b /* If SMP not configured, secondaries 85 b 1b /* If SMP not configured, secondaries
84 * loop forever */ 86 * loop forever */
85 87
88/*** ISeries-LPAR interrupt handlers ***/
89
90 STD_EXCEPTION_ISERIES(0x200, machine_check, PACA_EXMC)
91
92 .globl data_access_iSeries
93data_access_iSeries:
94 mtspr SPRN_SPRG1,r13
95BEGIN_FTR_SECTION
96 mtspr SPRN_SPRG2,r12
97 mfspr r13,SPRN_DAR
98 mfspr r12,SPRN_DSISR
99 srdi r13,r13,60
100 rlwimi r13,r12,16,0x20
101 mfcr r12
102 cmpwi r13,0x2c
103 beq .do_stab_bolted_iSeries
104 mtcrf 0x80,r12
105 mfspr r12,SPRN_SPRG2
106END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
107 EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN)
108 EXCEPTION_PROLOG_ISERIES_2
109 b data_access_common
110
111.do_stab_bolted_iSeries:
112 mtcrf 0x80,r12
113 mfspr r12,SPRN_SPRG2
114 EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
115 EXCEPTION_PROLOG_ISERIES_2
116 b .do_stab_bolted
117
118 .globl data_access_slb_iSeries
119data_access_slb_iSeries:
120 mtspr SPRN_SPRG1,r13 /* save r13 */
121 mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
122 std r3,PACA_EXSLB+EX_R3(r13)
123 mfspr r3,SPRN_DAR
124 std r9,PACA_EXSLB+EX_R9(r13)
125 mfcr r9
126#ifdef __DISABLED__
127 cmpdi r3,0
128 bge slb_miss_user_iseries
129#endif
130 std r10,PACA_EXSLB+EX_R10(r13)
131 std r11,PACA_EXSLB+EX_R11(r13)
132 std r12,PACA_EXSLB+EX_R12(r13)
133 mfspr r10,SPRN_SPRG1
134 std r10,PACA_EXSLB+EX_R13(r13)
135 ld r12,PACALPPACAPTR(r13)
136 ld r12,LPPACASRR1(r12)
137 b .slb_miss_realmode
138
139 STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN)
140
141 .globl instruction_access_slb_iSeries
142instruction_access_slb_iSeries:
143 mtspr SPRN_SPRG1,r13 /* save r13 */
144 mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
145 std r3,PACA_EXSLB+EX_R3(r13)
146 ld r3,PACALPPACAPTR(r13)
147 ld r3,LPPACASRR0(r3) /* get SRR0 value */
148 std r9,PACA_EXSLB+EX_R9(r13)
149 mfcr r9
150#ifdef __DISABLED__
151 cmpdi r3,0
152 bge slb_miss_user_iseries
153#endif
154 std r10,PACA_EXSLB+EX_R10(r13)
155 std r11,PACA_EXSLB+EX_R11(r13)
156 std r12,PACA_EXSLB+EX_R12(r13)
157 mfspr r10,SPRN_SPRG1
158 std r10,PACA_EXSLB+EX_R13(r13)
159 ld r12,PACALPPACAPTR(r13)
160 ld r12,LPPACASRR1(r12)
161 b .slb_miss_realmode
162
163#ifdef __DISABLED__
164slb_miss_user_iseries:
165 std r10,PACA_EXGEN+EX_R10(r13)
166 std r11,PACA_EXGEN+EX_R11(r13)
167 std r12,PACA_EXGEN+EX_R12(r13)
168 mfspr r10,SPRG1
169 ld r11,PACA_EXSLB+EX_R9(r13)
170 ld r12,PACA_EXSLB+EX_R3(r13)
171 std r10,PACA_EXGEN+EX_R13(r13)
172 std r11,PACA_EXGEN+EX_R9(r13)
173 std r12,PACA_EXGEN+EX_R3(r13)
174 EXCEPTION_PROLOG_ISERIES_2
175 b slb_miss_user_common
176#endif
177
178 MASKABLE_EXCEPTION_ISERIES(0x500, hardware_interrupt)
179 STD_EXCEPTION_ISERIES(0x600, alignment, PACA_EXGEN)
180 STD_EXCEPTION_ISERIES(0x700, program_check, PACA_EXGEN)
181 STD_EXCEPTION_ISERIES(0x800, fp_unavailable, PACA_EXGEN)
182 MASKABLE_EXCEPTION_ISERIES(0x900, decrementer)
183 STD_EXCEPTION_ISERIES(0xa00, trap_0a, PACA_EXGEN)
184 STD_EXCEPTION_ISERIES(0xb00, trap_0b, PACA_EXGEN)
185
186 .globl system_call_iSeries
187system_call_iSeries:
188 mr r9,r13
189 mfspr r13,SPRN_SPRG3
190 EXCEPTION_PROLOG_ISERIES_2
191 b system_call_common
192
193 STD_EXCEPTION_ISERIES( 0xd00, single_step, PACA_EXGEN)
194 STD_EXCEPTION_ISERIES( 0xe00, trap_0e, PACA_EXGEN)
195 STD_EXCEPTION_ISERIES( 0xf00, performance_monitor, PACA_EXGEN)
196
197decrementer_iSeries_masked:
198 /* We may not have a valid TOC pointer in here. */
199 li r11,1
200 ld r12,PACALPPACAPTR(r13)
201 stb r11,LPPACADECRINT(r12)
202 LOAD_REG_IMMEDIATE(r12, tb_ticks_per_jiffy)
203 lwz r12,0(r12)
204 mtspr SPRN_DEC,r12
205 /* fall through */
206
207hardware_interrupt_iSeries_masked:
208 mtcrf 0x80,r9 /* Restore regs */
209 ld r12,PACALPPACAPTR(r13)
210 ld r11,LPPACASRR0(r12)
211 ld r12,LPPACASRR1(r12)
212 mtspr SPRN_SRR0,r11
213 mtspr SPRN_SRR1,r12
214 ld r9,PACA_EXGEN+EX_R9(r13)
215 ld r10,PACA_EXGEN+EX_R10(r13)
216 ld r11,PACA_EXGEN+EX_R11(r13)
217 ld r12,PACA_EXGEN+EX_R12(r13)
218 ld r13,PACA_EXGEN+EX_R13(r13)
219 rfid
220 b . /* prevent speculative execution */
221
86_INIT_STATIC(__start_initialization_iSeries) 222_INIT_STATIC(__start_initialization_iSeries)
87 /* Clear out the BSS */ 223 /* Clear out the BSS */
88 LOAD_REG_IMMEDIATE(r11,__bss_stop) 224 LOAD_REG_IMMEDIATE(r11,__bss_stop)