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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-04-05 00:20:31 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-04-19 21:03:22 -0400
commita5d4f3ad3a28cf046836b9bfae61d532b8f77036 (patch)
tree6940ace9422e91459d819b385dacf9b2ab44bd50 /arch/powerpc/platforms/iseries/exception.S
parent2dd60d79e0202628a47af9812a84d502cc63628c (diff)
powerpc: Base support for exceptions using HSRR0/1
Pass the register type to the prolog, also provides alternate "HV" version of hardware interrupt (0x500) and adjust LPES accordingly We tag those interrupts by setting bit 0x2 in the trap number Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/iseries/exception.S')
-rw-r--r--arch/powerpc/platforms/iseries/exception.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index 32a56c6dfa72..f7a487231a11 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -155,7 +155,7 @@ BEGIN_FTR_SECTION
155 std r12,PACA_EXGEN+EX_R13(r13) 155 std r12,PACA_EXGEN+EX_R13(r13)
156 EXCEPTION_PROLOG_ISERIES_1 156 EXCEPTION_PROLOG_ISERIES_1
157FTR_SECTION_ELSE 157FTR_SECTION_ELSE
158 EXCEPTION_PROLOG_1(PACA_EXGEN) 158 EXCEPTION_PROLOG_1(PACA_EXGEN, EXC_STD)
159 EXCEPTION_PROLOG_ISERIES_1 159 EXCEPTION_PROLOG_ISERIES_1
160ALT_FTR_SECTION_END_IFCLR(CPU_FTR_SLB) 160ALT_FTR_SECTION_END_IFCLR(CPU_FTR_SLB)
161 b data_access_common 161 b data_access_common