diff options
author | Paul Mackerras <paulus@samba.org> | 2006-08-25 00:56:07 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-08-25 00:56:07 -0400 |
commit | ea0763a7e62f60f3e166327268a80f16ad806718 (patch) | |
tree | de54ec5e5d5a49b3cba81b096b7572852aa6f5a9 /arch/powerpc/platforms/embedded6xx | |
parent | 271c511db9d37d6797745adb1f151a8bd2838c6f (diff) | |
parent | c85c41ad73c6db4cf4cc98c595cc5e2fdbdb53d5 (diff) |
Merge branch 'merge'
Diffstat (limited to 'arch/powerpc/platforms/embedded6xx')
-rw-r--r-- | arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | 73 |
1 files changed, 24 insertions, 49 deletions
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c index 69c998cb4f1b..673ee69c62e3 100644 --- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c +++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * mpc7448_hpc2.c | 2 | * mpc7448_hpc2.c |
3 | * | 3 | * |
4 | * Board setup routines for the Freescale Taiga platform | 4 | * Board setup routines for the Freescale mpc7448hpc2(taiga) platform |
5 | * | 5 | * |
6 | * Author: Jacob Pan | 6 | * Author: Jacob Pan |
7 | * jacob.pan@freescale.com | 7 | * jacob.pan@freescale.com |
@@ -12,10 +12,10 @@ | |||
12 | * | 12 | * |
13 | * Copyright 2004-2006 Freescale Semiconductor, Inc. | 13 | * Copyright 2004-2006 Freescale Semiconductor, Inc. |
14 | * | 14 | * |
15 | * This file is licensed under | 15 | * This program is free software; you can redistribute it and/or |
16 | * the terms of the GNU General Public License version 2. This program | 16 | * modify it under the terms of the GNU General Public License |
17 | * is licensed "as is" without any warranty of any kind, whether express | 17 | * as published by the Free Software Foundation; either version |
18 | * or implied. | 18 | * 2 of the License, or (at your option) any later version. |
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <linux/config.h> | 21 | #include <linux/config.h> |
@@ -62,43 +62,8 @@ pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET; | |||
62 | extern int tsi108_setup_pci(struct device_node *dev); | 62 | extern int tsi108_setup_pci(struct device_node *dev); |
63 | extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); | 63 | extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); |
64 | extern void tsi108_pci_int_init(void); | 64 | extern void tsi108_pci_int_init(void); |
65 | extern int tsi108_irq_cascade(struct pt_regs *regs, void *unused); | 65 | extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc, |
66 | 66 | struct pt_regs *regs); | |
67 | /* | ||
68 | * Define all of the IRQ senses and polarities. Taken from the | ||
69 | * mpc7448hpc manual. | ||
70 | * Note: Likely, this table and the following function should be | ||
71 | * obtained and derived from the OF Device Tree. | ||
72 | */ | ||
73 | |||
74 | static u_char mpc7448_hpc2_pic_initsenses[] __initdata = { | ||
75 | /* External on-board sources */ | ||
76 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[0] XINT0 from FPGA */ | ||
77 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[1] XINT1 from FPGA */ | ||
78 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[2] PHY_INT from both GIGE */ | ||
79 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[3] RESERVED */ | ||
80 | /* Internal Tsi108/109 interrupt sources */ | ||
81 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
82 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
83 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
84 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
85 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA0 */ | ||
86 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA1 */ | ||
87 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA2 */ | ||
88 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA3 */ | ||
89 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART0 */ | ||
90 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART1 */ | ||
91 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* I2C */ | ||
92 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* GPIO */ | ||
93 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE0 */ | ||
94 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE1 */ | ||
95 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
96 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* HLP */ | ||
97 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* SDC */ | ||
98 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Processor IF */ | ||
99 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
100 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* PCI/X block */ | ||
101 | }; | ||
102 | 67 | ||
103 | int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn) | 68 | int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn) |
104 | { | 69 | { |
@@ -229,6 +194,8 @@ static void __init mpc7448_hpc2_init_IRQ(void) | |||
229 | { | 194 | { |
230 | struct mpic *mpic; | 195 | struct mpic *mpic; |
231 | phys_addr_t mpic_paddr = 0; | 196 | phys_addr_t mpic_paddr = 0; |
197 | unsigned int cascade_pci_irq; | ||
198 | struct device_node *tsi_pci; | ||
232 | struct device_node *tsi_pic; | 199 | struct device_node *tsi_pic; |
233 | 200 | ||
234 | tsi_pic = of_find_node_by_type(NULL, "open-pic"); | 201 | tsi_pic = of_find_node_by_type(NULL, "open-pic"); |
@@ -246,24 +213,31 @@ static void __init mpc7448_hpc2_init_IRQ(void) | |||
246 | DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__, | 213 | DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__, |
247 | (u32) mpic_paddr); | 214 | (u32) mpic_paddr); |
248 | 215 | ||
249 | mpic = mpic_alloc(mpic_paddr, | 216 | mpic = mpic_alloc(tsi_pic, mpic_paddr, |
250 | MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET | | 217 | MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET | |
251 | MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108), | 218 | MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108), |
252 | 0, /* num_sources used */ | 219 | 0, /* num_sources used */ |
253 | TSI108_IRQ_BASE, | ||
254 | 0, /* num_sources used */ | 220 | 0, /* num_sources used */ |
255 | NR_IRQS - 4 /* XXXX */, | 221 | "Tsi108_PIC"); |
256 | mpc7448_hpc2_pic_initsenses, | ||
257 | sizeof(mpc7448_hpc2_pic_initsenses), "Tsi108_PIC"); | ||
258 | 222 | ||
259 | BUG_ON(mpic == NULL); /* XXXX */ | 223 | BUG_ON(mpic == NULL); /* XXXX */ |
260 | |||
261 | mpic_init(mpic); | 224 | mpic_init(mpic); |
262 | mpic_setup_cascade(IRQ_TSI108_PCI, tsi108_irq_cascade, mpic); | 225 | |
226 | tsi_pci = of_find_node_by_type(NULL, "pci"); | ||
227 | if (tsi_pci == 0) { | ||
228 | printk("%s: No tsi108 pci node found !\n", __FUNCTION__); | ||
229 | return; | ||
230 | } | ||
231 | |||
232 | cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0); | ||
233 | set_irq_data(cascade_pci_irq, mpic); | ||
234 | set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade); | ||
235 | |||
263 | tsi108_pci_int_init(); | 236 | tsi108_pci_int_init(); |
264 | 237 | ||
265 | /* Configure MPIC outputs to CPU0 */ | 238 | /* Configure MPIC outputs to CPU0 */ |
266 | tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); | 239 | tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); |
240 | of_node_put(tsi_pic); | ||
267 | } | 241 | } |
268 | 242 | ||
269 | void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) | 243 | void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) |
@@ -320,6 +294,7 @@ static int mpc7448_machine_check_exception(struct pt_regs *regs) | |||
320 | return 0; | 294 | return 0; |
321 | 295 | ||
322 | } | 296 | } |
297 | |||
323 | define_machine(mpc7448_hpc2){ | 298 | define_machine(mpc7448_hpc2){ |
324 | .name = "MPC7448 HPC2", | 299 | .name = "MPC7448 HPC2", |
325 | .probe = mpc7448_hpc2_probe, | 300 | .probe = mpc7448_hpc2_probe, |