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authorArnd Bergmann <arnd@arndb.de>2008-11-28 04:51:24 -0500
committerPaul Mackerras <paulus@samba.org>2008-11-30 17:40:18 -0500
commit960cedb4e3eedec6394f224fc832c7a23f35a799 (patch)
tree09c0a325ac79ff81d4968ec6f4e22d88efbcfcb5 /arch/powerpc/platforms/cell
parentcc353c30bbdb84f4317a6c149ebb11cde2232e40 (diff)
powerpc/cell: Fix GDB watchpoints, again
An earlier patch from Jens Osterkamp attempted to fix GDB watchpoints by enabling the DABRX register at boot time. Unfortunately, this did not work on SMP setups, where secondary CPUs were still using the power-on DABRX value. This introduces the same change for secondary CPUs on cell as well. Reported-by: Ulrich Weigand <Ulrich.Weigand@de.ibm.com> Tested-by: Ulrich Weigand <Ulrich.Weigand@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/cell')
-rw-r--r--arch/powerpc/platforms/cell/smp.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c
index c0d86e1f56ea..9046803c8276 100644
--- a/arch/powerpc/platforms/cell/smp.c
+++ b/arch/powerpc/platforms/cell/smp.c
@@ -129,10 +129,15 @@ static int __init smp_iic_probe(void)
129 return cpus_weight(cpu_possible_map); 129 return cpus_weight(cpu_possible_map);
130} 130}
131 131
132static void __devinit smp_iic_setup_cpu(int cpu) 132static void __devinit smp_cell_setup_cpu(int cpu)
133{ 133{
134 if (cpu != boot_cpuid) 134 if (cpu != boot_cpuid)
135 iic_setup_cpu(); 135 iic_setup_cpu();
136
137 /*
138 * change default DABRX to allow user watchpoints
139 */
140 mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);
136} 141}
137 142
138static DEFINE_SPINLOCK(timebase_lock); 143static DEFINE_SPINLOCK(timebase_lock);
@@ -192,7 +197,7 @@ static struct smp_ops_t bpa_iic_smp_ops = {
192 .message_pass = smp_iic_message_pass, 197 .message_pass = smp_iic_message_pass,
193 .probe = smp_iic_probe, 198 .probe = smp_iic_probe,
194 .kick_cpu = smp_cell_kick_cpu, 199 .kick_cpu = smp_cell_kick_cpu,
195 .setup_cpu = smp_iic_setup_cpu, 200 .setup_cpu = smp_cell_setup_cpu,
196 .cpu_bootable = smp_cell_cpu_bootable, 201 .cpu_bootable = smp_cell_cpu_bootable,
197}; 202};
198 203