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author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-04 22:22:33 -0500 |
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committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-04 22:22:33 -0500 |
commit | 15a4cb9c25df05a5d4844e80a1aea83d66165868 (patch) | |
tree | bcb4f7c6e84f501ee6ce8c7a740cc7c4ec92447d /arch/powerpc/platforms/cell/setup.c | |
parent | ff51a98799931256b555446b2f5675db08de6229 (diff) | |
parent | d8594d639135b500bf6010f981ea854092d54030 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc
* master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc: (194 commits)
[POWERPC] Add missing EXPORTS for mpc52xx support
[POWERPC] Remove obsolete PPC_52xx and update CLASSIC32 comment
[POWERPC] ps3: add a default zImage target
[POWERPC] Add of_platform_bus support to mpc52xx psc uart driver
[POWERPC] typo fix and whitespace cleanup on mpc52xx-uart driver
[POWERPC] Fix debug printks for 32-bit resources in the PCI code
[POWERPC] Replace kmalloc+memset with kzalloc
[POWERPC] Linkstation / kurobox support
[POWERPC] Add the e300c3 core to the CPU table.
[POWERPC] ppc: m48t35 add missing bracket
[POWERPC] iSeries: don't build head_64.o unnecessarily
[POWERPC] iSeries: stop dt_mod.o being rebuilt unnecessarily
[POWERPC] Fix cputable.h for combined build
[POWERPC] Allow CONFIG_BOOTX_TEXT on iSeries
[POWERPC] Allow xmon to build on legacy iSeries
[POWERPC] Change ppc64_defconfig to use AUTOFS_V4 not V3
[POWERPC] Tell firmware we can handle POWER6 compatible mode
[POWERPC] Clean images in arch/powerpc/boot
[POWERPC] Fix OF pci flags parsing
[POWERPC] defconfig for lite5200 board
...
Diffstat (limited to 'arch/powerpc/platforms/cell/setup.c')
-rw-r--r-- | arch/powerpc/platforms/cell/setup.c | 78 |
1 files changed, 56 insertions, 22 deletions
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c index 22c228a49c33..36989c2eee66 100644 --- a/arch/powerpc/platforms/cell/setup.c +++ b/arch/powerpc/platforms/cell/setup.c | |||
@@ -50,9 +50,10 @@ | |||
50 | #include <asm/spu.h> | 50 | #include <asm/spu.h> |
51 | #include <asm/spu_priv1.h> | 51 | #include <asm/spu_priv1.h> |
52 | #include <asm/udbg.h> | 52 | #include <asm/udbg.h> |
53 | #include <asm/mpic.h> | ||
54 | #include <asm/of_platform.h> | ||
53 | 55 | ||
54 | #include "interrupt.h" | 56 | #include "interrupt.h" |
55 | #include "iommu.h" | ||
56 | #include "cbe_regs.h" | 57 | #include "cbe_regs.h" |
57 | #include "pervasive.h" | 58 | #include "pervasive.h" |
58 | #include "ras.h" | 59 | #include "ras.h" |
@@ -80,24 +81,72 @@ static void cell_progress(char *s, unsigned short hex) | |||
80 | printk("*** %04x : %s\n", hex, s ? s : ""); | 81 | printk("*** %04x : %s\n", hex, s ? s : ""); |
81 | } | 82 | } |
82 | 83 | ||
83 | static void __init cell_pcibios_fixup(void) | 84 | static int __init cell_publish_devices(void) |
84 | { | 85 | { |
85 | struct pci_dev *dev = NULL; | 86 | if (!machine_is(cell)) |
87 | return 0; | ||
88 | |||
89 | /* Publish OF platform devices for southbridge IOs */ | ||
90 | of_platform_bus_probe(NULL, NULL, NULL); | ||
91 | |||
92 | return 0; | ||
93 | } | ||
94 | device_initcall(cell_publish_devices); | ||
95 | |||
96 | static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc) | ||
97 | { | ||
98 | struct mpic *mpic = desc->handler_data; | ||
99 | unsigned int virq; | ||
100 | |||
101 | virq = mpic_get_one_irq(mpic); | ||
102 | if (virq != NO_IRQ) | ||
103 | generic_handle_irq(virq); | ||
104 | desc->chip->eoi(irq); | ||
105 | } | ||
86 | 106 | ||
87 | for_each_pci_dev(dev) | 107 | static void __init mpic_init_IRQ(void) |
88 | pci_read_irq_line(dev); | 108 | { |
109 | struct device_node *dn; | ||
110 | struct mpic *mpic; | ||
111 | unsigned int virq; | ||
112 | |||
113 | for (dn = NULL; | ||
114 | (dn = of_find_node_by_name(dn, "interrupt-controller"));) { | ||
115 | if (!device_is_compatible(dn, "CBEA,platform-open-pic")) | ||
116 | continue; | ||
117 | |||
118 | /* The MPIC driver will get everything it needs from the | ||
119 | * device-tree, just pass 0 to all arguments | ||
120 | */ | ||
121 | mpic = mpic_alloc(dn, 0, 0, 0, 0, " MPIC "); | ||
122 | if (mpic == NULL) | ||
123 | continue; | ||
124 | mpic_init(mpic); | ||
125 | |||
126 | virq = irq_of_parse_and_map(dn, 0); | ||
127 | if (virq == NO_IRQ) | ||
128 | continue; | ||
129 | |||
130 | printk(KERN_INFO "%s : hooking up to IRQ %d\n", | ||
131 | dn->full_name, virq); | ||
132 | set_irq_data(virq, mpic); | ||
133 | set_irq_chained_handler(virq, cell_mpic_cascade); | ||
134 | } | ||
89 | } | 135 | } |
90 | 136 | ||
137 | |||
91 | static void __init cell_init_irq(void) | 138 | static void __init cell_init_irq(void) |
92 | { | 139 | { |
93 | iic_init_IRQ(); | 140 | iic_init_IRQ(); |
94 | spider_init_IRQ(); | 141 | spider_init_IRQ(); |
142 | mpic_init_IRQ(); | ||
95 | } | 143 | } |
96 | 144 | ||
97 | static void __init cell_setup_arch(void) | 145 | static void __init cell_setup_arch(void) |
98 | { | 146 | { |
99 | #ifdef CONFIG_SPU_BASE | 147 | #ifdef CONFIG_SPU_BASE |
100 | spu_priv1_ops = &spu_priv1_mmio_ops; | 148 | spu_priv1_ops = &spu_priv1_mmio_ops; |
149 | spu_management_ops = &spu_management_of_ops; | ||
101 | #endif | 150 | #endif |
102 | 151 | ||
103 | cbe_regs_init(); | 152 | cbe_regs_init(); |
@@ -109,7 +158,6 @@ static void __init cell_setup_arch(void) | |||
109 | #ifdef CONFIG_SMP | 158 | #ifdef CONFIG_SMP |
110 | smp_init_cell(); | 159 | smp_init_cell(); |
111 | #endif | 160 | #endif |
112 | |||
113 | /* init to some ~sane value until calibrate_delay() runs */ | 161 | /* init to some ~sane value until calibrate_delay() runs */ |
114 | loops_per_jiffy = 50000000; | 162 | loops_per_jiffy = 50000000; |
115 | 163 | ||
@@ -129,19 +177,6 @@ static void __init cell_setup_arch(void) | |||
129 | mmio_nvram_init(); | 177 | mmio_nvram_init(); |
130 | } | 178 | } |
131 | 179 | ||
132 | /* | ||
133 | * Early initialization. Relocation is on but do not reference unbolted pages | ||
134 | */ | ||
135 | static void __init cell_init_early(void) | ||
136 | { | ||
137 | DBG(" -> cell_init_early()\n"); | ||
138 | |||
139 | cell_init_iommu(); | ||
140 | |||
141 | DBG(" <- cell_init_early()\n"); | ||
142 | } | ||
143 | |||
144 | |||
145 | static int __init cell_probe(void) | 180 | static int __init cell_probe(void) |
146 | { | 181 | { |
147 | unsigned long root = of_get_flat_dt_root(); | 182 | unsigned long root = of_get_flat_dt_root(); |
@@ -168,7 +203,6 @@ define_machine(cell) { | |||
168 | .name = "Cell", | 203 | .name = "Cell", |
169 | .probe = cell_probe, | 204 | .probe = cell_probe, |
170 | .setup_arch = cell_setup_arch, | 205 | .setup_arch = cell_setup_arch, |
171 | .init_early = cell_init_early, | ||
172 | .show_cpuinfo = cell_show_cpuinfo, | 206 | .show_cpuinfo = cell_show_cpuinfo, |
173 | .restart = rtas_restart, | 207 | .restart = rtas_restart, |
174 | .power_off = rtas_power_off, | 208 | .power_off = rtas_power_off, |
@@ -180,7 +214,7 @@ define_machine(cell) { | |||
180 | .check_legacy_ioport = cell_check_legacy_ioport, | 214 | .check_legacy_ioport = cell_check_legacy_ioport, |
181 | .progress = cell_progress, | 215 | .progress = cell_progress, |
182 | .init_IRQ = cell_init_irq, | 216 | .init_IRQ = cell_init_irq, |
183 | .pcibios_fixup = cell_pcibios_fixup, | 217 | .pci_setup_phb = rtas_setup_phb, |
184 | #ifdef CONFIG_KEXEC | 218 | #ifdef CONFIG_KEXEC |
185 | .machine_kexec = default_machine_kexec, | 219 | .machine_kexec = default_machine_kexec, |
186 | .machine_kexec_prepare = default_machine_kexec_prepare, | 220 | .machine_kexec_prepare = default_machine_kexec_prepare, |