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authorScott Wood <scottwood@freescale.com>2007-09-14 15:22:36 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-10-03 21:36:35 -0400
commitfb533d0c5a9783ecafa9a177bace6384c47282a9 (patch)
tree7be09cf401674b176455530ab4fec98bf9681751 /arch/powerpc/platforms/8xx
parentccf0d68e835003f19d5a9463d5a8c1e092d3a31a (diff)
[POWERPC] 8xx: Infrastructure code cleanup.
1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/8xx')
-rw-r--r--arch/powerpc/platforms/8xx/m8xx_setup.c90
-rw-r--r--arch/powerpc/platforms/8xx/mpc86xads.h3
-rw-r--r--arch/powerpc/platforms/8xx/mpc86xads_setup.c10
-rw-r--r--arch/powerpc/platforms/8xx/mpc885ads.h3
-rw-r--r--arch/powerpc/platforms/8xx/mpc885ads_setup.c10
5 files changed, 22 insertions, 94 deletions
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index b2b98dd8be6a..d35eda80e9e6 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -10,57 +10,33 @@
10 * bootup setup stuff.. 10 * bootup setup stuff..
11 */ 11 */
12 12
13#include <linux/errno.h>
14#include <linux/sched.h>
15#include <linux/kernel.h> 13#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
19#include <linux/ptrace.h>
20#include <linux/slab.h> 14#include <linux/slab.h>
21#include <linux/user.h>
22#include <linux/a.out.h>
23#include <linux/tty.h>
24#include <linux/major.h>
25#include <linux/interrupt.h> 15#include <linux/interrupt.h>
26#include <linux/reboot.h>
27#include <linux/init.h> 16#include <linux/init.h>
28#include <linux/initrd.h>
29#include <linux/ioport.h>
30#include <linux/bootmem.h>
31#include <linux/seq_file.h>
32#include <linux/root_dev.h>
33#include <linux/time.h> 17#include <linux/time.h>
34#include <linux/rtc.h> 18#include <linux/rtc.h>
35#include <linux/fsl_devices.h>
36 19
37#include <asm/mmu.h>
38#include <asm/reg.h>
39#include <asm/io.h> 20#include <asm/io.h>
40#include <asm/pgtable.h>
41#include <asm/mpc8xx.h> 21#include <asm/mpc8xx.h>
42#include <asm/8xx_immap.h> 22#include <asm/8xx_immap.h>
43#include <asm/machdep.h>
44#include <asm/time.h>
45#include <asm/prom.h> 23#include <asm/prom.h>
46#include <asm/fs_pd.h> 24#include <asm/fs_pd.h>
47#include <mm/mmu_decl.h> 25#include <mm/mmu_decl.h>
48 26
49#include "sysdev/mpc8xx_pic.h" 27#include <sysdev/mpc8xx_pic.h>
28#include <sysdev/commproc.h>
50 29
51#ifdef CONFIG_PCMCIA_M8XX 30#ifdef CONFIG_PCMCIA_M8XX
52struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops; 31struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops;
53#endif 32#endif
54 33
55void m8xx_calibrate_decr(void); 34void m8xx_calibrate_decr(void);
56#ifdef CONFIG_8xx_WDT
57extern void m8xx_wdt_handler_install(bd_t *bp);
58#endif
59extern int cpm_pic_init(void); 35extern int cpm_pic_init(void);
60extern int cpm_get_irq(void); 36extern int cpm_get_irq(void);
61 37
62/* A place holder for time base interrupts, if they are ever enabled. */ 38/* A place holder for time base interrupts, if they are ever enabled. */
63irqreturn_t timebase_interrupt(int irq, void * dev) 39static irqreturn_t timebase_interrupt(int irq, void *dev)
64{ 40{
65 printk ("timebase_interrupt()\n"); 41 printk ("timebase_interrupt()\n");
66 42
@@ -77,7 +53,7 @@ static struct irqaction tbint_irqaction = {
77void __init __attribute__ ((weak)) 53void __init __attribute__ ((weak))
78init_internal_rtc(void) 54init_internal_rtc(void)
79{ 55{
80 sit8xx_t *sys_tmr = (sit8xx_t *) immr_map(im_sit); 56 sit8xx_t __iomem *sys_tmr = immr_map(im_sit);
81 57
82 /* Disable the RTC one second and alarm interrupts. */ 58 /* Disable the RTC one second and alarm interrupts. */
83 clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE)); 59 clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));
@@ -116,13 +92,13 @@ static int __init get_freq(char *name, unsigned long *val)
116void __init mpc8xx_calibrate_decr(void) 92void __init mpc8xx_calibrate_decr(void)
117{ 93{
118 struct device_node *cpu; 94 struct device_node *cpu;
119 cark8xx_t *clk_r1; 95 cark8xx_t __iomem *clk_r1;
120 car8xx_t *clk_r2; 96 car8xx_t __iomem *clk_r2;
121 sitk8xx_t *sys_tmr1; 97 sitk8xx_t __iomem *sys_tmr1;
122 sit8xx_t *sys_tmr2; 98 sit8xx_t __iomem *sys_tmr2;
123 int irq, virq; 99 int irq, virq;
124 100
125 clk_r1 = (cark8xx_t *) immr_map(im_clkrstk); 101 clk_r1 = immr_map(im_clkrstk);
126 102
127 /* Unlock the SCCR. */ 103 /* Unlock the SCCR. */
128 out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY); 104 out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY);
@@ -130,7 +106,7 @@ void __init mpc8xx_calibrate_decr(void)
130 immr_unmap(clk_r1); 106 immr_unmap(clk_r1);
131 107
132 /* Force all 8xx processors to use divide by 16 processor clock. */ 108 /* Force all 8xx processors to use divide by 16 processor clock. */
133 clk_r2 = (car8xx_t *) immr_map(im_clkrst); 109 clk_r2 = immr_map(im_clkrst);
134 setbits32(&clk_r2->car_sccr, 0x02000000); 110 setbits32(&clk_r2->car_sccr, 0x02000000);
135 immr_unmap(clk_r2); 111 immr_unmap(clk_r2);
136 112
@@ -164,7 +140,7 @@ void __init mpc8xx_calibrate_decr(void)
164 * we guarantee the registers are locked, then we unlock them 140 * we guarantee the registers are locked, then we unlock them
165 * for our use. 141 * for our use.
166 */ 142 */
167 sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk); 143 sys_tmr1 = immr_map(im_sitk);
168 out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY); 144 out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY);
169 out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY); 145 out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY);
170 out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY); 146 out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY);
@@ -184,20 +160,13 @@ void __init mpc8xx_calibrate_decr(void)
184 virq= irq_of_parse_and_map(cpu, 0); 160 virq= irq_of_parse_and_map(cpu, 0);
185 irq = irq_map[virq].hwirq; 161 irq = irq_map[virq].hwirq;
186 162
187 sys_tmr2 = (sit8xx_t *) immr_map(im_sit); 163 sys_tmr2 = immr_map(im_sit);
188 out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) | 164 out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) |
189 (TBSCR_TBF | TBSCR_TBE)); 165 (TBSCR_TBF | TBSCR_TBE));
190 immr_unmap(sys_tmr2); 166 immr_unmap(sys_tmr2);
191 167
192 if (setup_irq(virq, &tbint_irqaction)) 168 if (setup_irq(virq, &tbint_irqaction))
193 panic("Could not allocate timer IRQ!"); 169 panic("Could not allocate timer IRQ!");
194
195#ifdef CONFIG_8xx_WDT
196 /* Install watchdog timer handler early because it might be
197 * already enabled by the bootloader
198 */
199 m8xx_wdt_handler_install(binfo);
200#endif
201} 170}
202 171
203/* The RTC on the MPC8xx is an internal register. 172/* The RTC on the MPC8xx is an internal register.
@@ -207,12 +176,12 @@ void __init mpc8xx_calibrate_decr(void)
207 176
208int mpc8xx_set_rtc_time(struct rtc_time *tm) 177int mpc8xx_set_rtc_time(struct rtc_time *tm)
209{ 178{
210 sitk8xx_t *sys_tmr1; 179 sitk8xx_t __iomem *sys_tmr1;
211 sit8xx_t *sys_tmr2; 180 sit8xx_t __iomem *sys_tmr2;
212 int time; 181 int time;
213 182
214 sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk); 183 sys_tmr1 = immr_map(im_sitk);
215 sys_tmr2 = (sit8xx_t *) immr_map(im_sit); 184 sys_tmr2 = immr_map(im_sit);
216 time = mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday, 185 time = mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday,
217 tm->tm_hour, tm->tm_min, tm->tm_sec); 186 tm->tm_hour, tm->tm_min, tm->tm_sec);
218 187
@@ -228,7 +197,7 @@ int mpc8xx_set_rtc_time(struct rtc_time *tm)
228void mpc8xx_get_rtc_time(struct rtc_time *tm) 197void mpc8xx_get_rtc_time(struct rtc_time *tm)
229{ 198{
230 unsigned long data; 199 unsigned long data;
231 sit8xx_t *sys_tmr = (sit8xx_t *) immr_map(im_sit); 200 sit8xx_t __iomem *sys_tmr = immr_map(im_sit);
232 201
233 /* Get time from the RTC. */ 202 /* Get time from the RTC. */
234 data = in_be32(&sys_tmr->sit_rtc); 203 data = in_be32(&sys_tmr->sit_rtc);
@@ -241,8 +210,7 @@ void mpc8xx_get_rtc_time(struct rtc_time *tm)
241 210
242void mpc8xx_restart(char *cmd) 211void mpc8xx_restart(char *cmd)
243{ 212{
244 __volatile__ unsigned char dummy; 213 car8xx_t __iomem *clk_r = immr_map(im_clkrst);
245 car8xx_t * clk_r = (car8xx_t *) immr_map(im_clkrst);
246 214
247 215
248 local_irq_disable(); 216 local_irq_disable();
@@ -252,26 +220,8 @@ void mpc8xx_restart(char *cmd)
252 */ 220 */
253 mtmsr(mfmsr() & ~0x1000); 221 mtmsr(mfmsr() & ~0x1000);
254 222
255 dummy = in_8(&clk_r->res[0]); 223 in_8(&clk_r->res[0]);
256 printk("Restart failed\n"); 224 panic("Restart failed\n");
257 while(1);
258}
259
260void mpc8xx_show_cpuinfo(struct seq_file *m)
261{
262 struct device_node *root;
263 uint memsize = total_memory;
264 const char *model = "";
265
266 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
267
268 root = of_find_node_by_path("/");
269 if (root)
270 model = of_get_property(root, "model", NULL);
271 seq_printf(m, "Machine\t\t: %s\n", model);
272 of_node_put(root);
273
274 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
275} 225}
276 226
277static void cpm_cascade(unsigned int irq, struct irq_desc *desc) 227static void cpm_cascade(unsigned int irq, struct irq_desc *desc)
diff --git a/arch/powerpc/platforms/8xx/mpc86xads.h b/arch/powerpc/platforms/8xx/mpc86xads.h
index dd10cd20b6a7..cffa194ccf1f 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads.h
+++ b/arch/powerpc/platforms/8xx/mpc86xads.h
@@ -29,9 +29,6 @@
29#define CFG_PHYDEV_ADDR ((uint)0xff0a0000) 29#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)
30#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300)) 30#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300))
31 31
32#define IMAP_ADDR (get_immrbase())
33#define IMAP_SIZE ((uint)(64 * 1024))
34
35#define MPC8xx_CPM_OFFSET (0x9c0) 32#define MPC8xx_CPM_OFFSET (0x9c0)
36#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET) 33#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET)
37#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver 34#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index 8f64f48698ab..49012835f453 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -37,14 +37,7 @@
37#include <asm/fs_pd.h> 37#include <asm/fs_pd.h>
38#include <asm/prom.h> 38#include <asm/prom.h>
39 39
40extern void cpm_reset(void); 40#include <sysdev/commproc.h>
41extern void mpc8xx_show_cpuinfo(struct seq_file*);
42extern void mpc8xx_restart(char *cmd);
43extern void mpc8xx_calibrate_decr(void);
44extern int mpc8xx_set_rtc_time(struct rtc_time *tm);
45extern void mpc8xx_get_rtc_time(struct rtc_time *tm);
46extern void m8xx_pic_init(void);
47extern unsigned int mpc8xx_get_irq(void);
48 41
49static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi); 42static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi);
50static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi); 43static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi);
@@ -277,7 +270,6 @@ define_machine(mpc86x_ads) {
277 .probe = mpc86xads_probe, 270 .probe = mpc86xads_probe,
278 .setup_arch = mpc86xads_setup_arch, 271 .setup_arch = mpc86xads_setup_arch,
279 .init_IRQ = m8xx_pic_init, 272 .init_IRQ = m8xx_pic_init,
280 .show_cpuinfo = mpc8xx_show_cpuinfo,
281 .get_irq = mpc8xx_get_irq, 273 .get_irq = mpc8xx_get_irq,
282 .restart = mpc8xx_restart, 274 .restart = mpc8xx_restart,
283 .calibrate_decr = mpc8xx_calibrate_decr, 275 .calibrate_decr = mpc8xx_calibrate_decr,
diff --git a/arch/powerpc/platforms/8xx/mpc885ads.h b/arch/powerpc/platforms/8xx/mpc885ads.h
index 14db12417064..a21e528f26c6 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads.h
+++ b/arch/powerpc/platforms/8xx/mpc885ads.h
@@ -29,9 +29,6 @@
29#define CFG_PHYDEV_ADDR ((uint)0xff0a0000) 29#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)
30#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300)) 30#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300))
31 31
32#define IMAP_ADDR (get_immrbase())
33#define IMAP_SIZE ((uint)(64 * 1024))
34
35#define MPC8xx_CPM_OFFSET (0x9c0) 32#define MPC8xx_CPM_OFFSET (0x9c0)
36#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET) 33#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET)
37#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver 34#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index a1dab4cfd3de..bad08683f7ae 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -38,14 +38,7 @@
38#include <asm/fs_pd.h> 38#include <asm/fs_pd.h>
39#include <asm/prom.h> 39#include <asm/prom.h>
40 40
41extern void cpm_reset(void); 41#include <sysdev/commproc.h>
42extern void mpc8xx_show_cpuinfo(struct seq_file *);
43extern void mpc8xx_restart(char *cmd);
44extern void mpc8xx_calibrate_decr(void);
45extern int mpc8xx_set_rtc_time(struct rtc_time *tm);
46extern void mpc8xx_get_rtc_time(struct rtc_time *tm);
47extern void m8xx_pic_init(void);
48extern unsigned int mpc8xx_get_irq(void);
49 42
50static void init_smc1_uart_ioports(struct fs_uart_platform_info *fpi); 43static void init_smc1_uart_ioports(struct fs_uart_platform_info *fpi);
51static void init_smc2_uart_ioports(struct fs_uart_platform_info *fpi); 44static void init_smc2_uart_ioports(struct fs_uart_platform_info *fpi);
@@ -430,7 +423,6 @@ define_machine(mpc885_ads)
430 .probe = mpc885ads_probe, 423 .probe = mpc885ads_probe,
431 .setup_arch = mpc885ads_setup_arch, 424 .setup_arch = mpc885ads_setup_arch,
432 .init_IRQ = m8xx_pic_init, 425 .init_IRQ = m8xx_pic_init,
433 .show_cpuinfo = mpc8xx_show_cpuinfo,
434 .get_irq = mpc8xx_get_irq, 426 .get_irq = mpc8xx_get_irq,
435 .restart = mpc8xx_restart, 427 .restart = mpc8xx_restart,
436 .calibrate_decr = mpc8xx_calibrate_decr, 428 .calibrate_decr = mpc8xx_calibrate_decr,