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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-03-20 00:58:27 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-03-20 00:58:27 -0400
commit8d73f102d9606fe217a9577a437f84b9fed6d45d (patch)
tree6a186af04bf971e3abf85e13ae191c3dc781dda1 /arch/powerpc/platforms/86xx
parenta7d2dac802a7ff0677b0a5c2fdb9fe0d3fdaee0c (diff)
parente41c615a70f2a91ca35b455fdcf025f78e11207e (diff)
Merge commit 'kumar/next' into next
Diffstat (limited to 'arch/powerpc/platforms/86xx')
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig10
-rw-r--r--arch/powerpc/platforms/86xx/Makefile1
-rw-r--r--arch/powerpc/platforms/86xx/gef_ppc9a.c223
-rw-r--r--arch/powerpc/platforms/86xx/gef_sbc310.c4
4 files changed, 237 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 349278450736..fdaf4ddaa955 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -31,6 +31,14 @@ config MPC8610_HPCD
31 help 31 help
32 This option enables support for the MPC8610 HPCD board. 32 This option enables support for the MPC8610 HPCD board.
33 33
34config GEF_PPC9A
35 bool "GE Fanuc PPC9A"
36 select DEFAULT_UIMAGE
37 select GENERIC_GPIO
38 select ARCH_REQUIRE_GPIOLIB
39 help
40 This option enables support for GE Fanuc's PPC9A.
41
34config GEF_SBC310 42config GEF_SBC310
35 bool "GE Fanuc SBC310" 43 bool "GE Fanuc SBC310"
36 select DEFAULT_UIMAGE 44 select DEFAULT_UIMAGE
@@ -56,7 +64,7 @@ config MPC8641
56 select FSL_PCI if PCI 64 select FSL_PCI if PCI
57 select PPC_UDBG_16550 65 select PPC_UDBG_16550
58 select MPIC 66 select MPIC
59 default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 67 default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A
60 68
61config MPC8610 69config MPC8610
62 bool 70 bool
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 7c080da4523a..4b0d7b1aa005 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
10gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o 10gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o
11obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y) 11obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y)
12obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o gef_pic.o $(gef-gpio-y) 12obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o gef_pic.o $(gef-gpio-y)
13obj-$(CONFIG_GEF_PPC9A) += gef_ppc9a.o gef_pic.o $(gef-gpio-y)
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
new file mode 100644
index 000000000000..830fd9a23b5a
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -0,0 +1,223 @@
1/*
2 * GE Fanuc PPC9A board support
3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com>
5 *
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 *
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/pci.h>
22#include <linux/kdev_t.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/of_platform.h>
26
27#include <asm/system.h>
28#include <asm/time.h>
29#include <asm/machdep.h>
30#include <asm/pci-bridge.h>
31#include <asm/mpc86xx.h>
32#include <asm/prom.h>
33#include <mm/mmu_decl.h>
34#include <asm/udbg.h>
35
36#include <asm/mpic.h>
37
38#include <sysdev/fsl_pci.h>
39#include <sysdev/fsl_soc.h>
40
41#include "mpc86xx.h"
42#include "gef_pic.h"
43
44#undef DEBUG
45
46#ifdef DEBUG
47#define DBG (fmt...) do { printk(KERN_ERR "PPC9A: " fmt); } while (0)
48#else
49#define DBG (fmt...) do { } while (0)
50#endif
51
52void __iomem *ppc9a_regs;
53
54static void __init gef_ppc9a_init_irq(void)
55{
56 struct device_node *cascade_node = NULL;
57
58 mpc86xx_init_irq();
59
60 /*
61 * There is a simple interrupt handler in the main FPGA, this needs
62 * to be cascaded into the MPIC
63 */
64 cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic-1.00");
65 if (!cascade_node) {
66 printk(KERN_WARNING "PPC9A: No FPGA PIC\n");
67 return;
68 }
69
70 gef_pic_init(cascade_node);
71 of_node_put(cascade_node);
72}
73
74static void __init gef_ppc9a_setup_arch(void)
75{
76 struct device_node *regs;
77#ifdef CONFIG_PCI
78 struct device_node *np;
79
80 for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
81 fsl_add_bridge(np, 1);
82 }
83#endif
84
85 printk(KERN_INFO "GE Fanuc Intelligent Platforms PPC9A 6U VME SBC\n");
86
87#ifdef CONFIG_SMP
88 mpc86xx_smp_init();
89#endif
90
91 /* Remap basic board registers */
92 regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs");
93 if (regs) {
94 ppc9a_regs = of_iomap(regs, 0);
95 if (ppc9a_regs == NULL)
96 printk(KERN_WARNING "Unable to map board registers\n");
97 of_node_put(regs);
98 }
99}
100
101/* Return the PCB revision */
102static unsigned int gef_ppc9a_get_pcb_rev(void)
103{
104 unsigned int reg;
105
106 reg = ioread32(ppc9a_regs);
107 return (reg >> 8) & 0xff;
108}
109
110/* Return the board (software) revision */
111static unsigned int gef_ppc9a_get_board_rev(void)
112{
113 unsigned int reg;
114
115 reg = ioread32(ppc9a_regs);
116 return (reg >> 16) & 0xff;
117}
118
119/* Return the FPGA revision */
120static unsigned int gef_ppc9a_get_fpga_rev(void)
121{
122 unsigned int reg;
123
124 reg = ioread32(ppc9a_regs);
125 return (reg >> 24) & 0xf;
126}
127
128static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
129{
130 uint svid = mfspr(SPRN_SVR);
131
132 seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
133
134 seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(),
135 ('A' + gef_ppc9a_get_board_rev() - 1));
136 seq_printf(m, "FPGA Revision\t: %u\n", gef_ppc9a_get_fpga_rev());
137
138 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
139}
140
141static void __init gef_ppc9a_nec_fixup(struct pci_dev *pdev)
142{
143 unsigned int val;
144
145 /* Do not do the fixup on other platforms! */
146 if (!machine_is(gef_ppc9a))
147 return;
148
149 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
150
151 /* Ensure ports 1, 2, 3, 4 & 5 are enabled */
152 pci_read_config_dword(pdev, 0xe0, &val);
153 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5);
154
155 /* System clock is 48-MHz Oscillator and EHCI Enabled. */
156 pci_write_config_dword(pdev, 0xe4, 1 << 5);
157}
158DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
159 gef_ppc9a_nec_fixup);
160
161/*
162 * Called very early, device-tree isn't unflattened
163 *
164 * This function is called to determine whether the BSP is compatible with the
165 * supplied device-tree, which is assumed to be the correct one for the actual
166 * board. It is expected thati, in the future, a kernel may support multiple
167 * boards.
168 */
169static int __init gef_ppc9a_probe(void)
170{
171 unsigned long root = of_get_flat_dt_root();
172
173 if (of_flat_dt_is_compatible(root, "gef,ppc9a"))
174 return 1;
175
176 return 0;
177}
178
179static long __init mpc86xx_time_init(void)
180{
181 unsigned int temp;
182
183 /* Set the time base to zero */
184 mtspr(SPRN_TBWL, 0);
185 mtspr(SPRN_TBWU, 0);
186
187 temp = mfspr(SPRN_HID0);
188 temp |= HID0_TBEN;
189 mtspr(SPRN_HID0, temp);
190 asm volatile("isync");
191
192 return 0;
193}
194
195static __initdata struct of_device_id of_bus_ids[] = {
196 { .compatible = "simple-bus", },
197 {},
198};
199
200static int __init declare_of_platform_devices(void)
201{
202 printk(KERN_DEBUG "Probe platform devices\n");
203 of_platform_bus_probe(NULL, of_bus_ids, NULL);
204
205 return 0;
206}
207machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
208
209define_machine(gef_ppc9a) {
210 .name = "GE Fanuc PPC9A",
211 .probe = gef_ppc9a_probe,
212 .setup_arch = gef_ppc9a_setup_arch,
213 .init_IRQ = gef_ppc9a_init_irq,
214 .show_cpuinfo = gef_ppc9a_show_cpuinfo,
215 .get_irq = mpic_get_irq,
216 .restart = fsl_rstcr_restart,
217 .time_init = mpc86xx_time_init,
218 .calibrate_decr = generic_calibrate_decr,
219 .progress = udbg_progress,
220#ifdef CONFIG_PCI
221 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
222#endif
223};
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
index 0f20172af84b..ba3ce4381611 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc310.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -153,6 +153,10 @@ static void __init gef_sbc310_nec_fixup(struct pci_dev *pdev)
153{ 153{
154 unsigned int val; 154 unsigned int val;
155 155
156 /* Do not do the fixup on other platforms! */
157 if (!machine_is(gef_sbc310))
158 return;
159
156 printk(KERN_INFO "Running NEC uPD720101 Fixup\n"); 160 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
157 161
158 /* Ensure only ports 1 & 2 are enabled */ 162 /* Ensure only ports 1 & 2 are enabled */